mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 21:38:14 +00:00
554 lines
15 KiB
C++
554 lines
15 KiB
C++
/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifdef NRF24L01_INSTALLED
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#include "iface_nrf24l01.h"
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#include "iface_xn297.h"
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//---------------------------
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// NRF24L01+ SPI Specific Functions
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//---------------------------
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uint8_t rf_setup;
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void NRF24L01_Initialize()
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{
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rf_setup = 0x09;
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prev_power = 0x00; // Make sure prev_power is inline with current power
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XN297_SetScrambledMode(XN297_SCRAMBLED);
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//Load most likely default NRF config
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NRF24L01_FlushTx();
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
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NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
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NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x03); // 5 bytes rx/tx address
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NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0x00); // no retransmits
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NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
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NRF24L01_WriteReg(NRF24L01_1C_DYNPD, 0x00); // Disable dynamic payload length on all pipes
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NRF24L01_WriteReg(NRF24L01_1D_FEATURE, 0x01); // Set feature bits off and enable the command NRF24L01_B0_TX_PYLD_NOACK
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NRF24L01_SetPower();
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NRF24L01_SetTxRxMode(TX_EN); // Clear data ready, data sent, retransmit and enable CRC 16bits, ready for TX
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}
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void NRF24L01_WriteReg(uint8_t reg, uint8_t data)
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{
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NRF_CSN_off;
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SPI_Write(W_REGISTER | (REGISTER_MASK & reg));
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SPI_Write(data);
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NRF_CSN_on;
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}
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void NRF24L01_WriteRegisterMulti(uint8_t reg, uint8_t * data, uint8_t length)
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{
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NRF_CSN_off;
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SPI_Write(W_REGISTER | ( REGISTER_MASK & reg));
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for (uint8_t i = 0; i < length; i++)
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SPI_Write(data[i]);
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NRF_CSN_on;
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}
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void NRF24L01_WritePayload(uint8_t * data, uint8_t length)
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{
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NRF_CSN_off;
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SPI_Write(W_TX_PAYLOAD);
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for (uint8_t i = 0; i < length; i++)
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SPI_Write(data[i]);
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NRF_CSN_on;
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}
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uint8_t NRF24L01_ReadReg(uint8_t reg)
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{
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NRF_CSN_off;
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SPI_Write(R_REGISTER | (REGISTER_MASK & reg));
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uint8_t data = SPI_Read();
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NRF_CSN_on;
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return data;
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}
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/*static void NRF24L01_ReadRegisterMulti(uint8_t reg, uint8_t * data, uint8_t length)
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{
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NRF_CSN_off;
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SPI_Write(R_REGISTER | (REGISTER_MASK & reg));
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for(uint8_t i = 0; i < length; i++)
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data[i] = SPI_Read();
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NRF_CSN_on;
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}
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*/
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static void NRF24L01_ReadPayload(uint8_t * data, uint8_t length)
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{
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NRF_CSN_off;
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SPI_Write(R_RX_PAYLOAD);
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for(uint8_t i = 0; i < length; i++)
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data[i] = SPI_Read();
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NRF_CSN_on;
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}
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static void NRF24L01_Strobe(uint8_t state)
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{
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NRF_CSN_off;
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SPI_Write(state);
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NRF_CSN_on;
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}
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void NRF24L01_FlushTx()
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{
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NRF24L01_Strobe(FLUSH_TX);
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}
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void NRF24L01_FlushRx()
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{
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NRF24L01_Strobe(FLUSH_RX);
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}
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static uint8_t __attribute__((unused)) NRF24L01_GetStatus()
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{
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return SPI_Read();
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}
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static uint8_t NRF24L01_GetDynamicPayloadSize()
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{
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NRF_CSN_off;
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SPI_Write(R_RX_PL_WID);
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uint8_t len = SPI_Read();
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NRF_CSN_on;
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return len;
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}
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/*void NRF24L01_Activate(uint8_t code)
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{
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NRF_CSN_off;
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SPI_Write(ACTIVATE);
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SPI_Write(code);
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NRF_CSN_on;
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}*/
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void NRF24L01_SetBitrate(uint8_t bitrate)
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{
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// Note that bitrate 250kbps (and bit RF_DR_LOW) is valid only
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// for nRF24L01+. There is no way to programmatically tell it from
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// older version, nRF24L01, but the older is practically phased out
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// by Nordic, so we assume that we deal with modern version.
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// Bit 0 goes to RF_DR_HIGH, bit 1 - to RF_DR_LOW
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rf_setup = (rf_setup & 0xD7) | ((bitrate & 0x02) << 4) | ((bitrate & 0x01) << 3);
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prev_power=(rf_setup>>1)&0x03; // Make sure prev_power is inline with current power
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NRF24L01_WriteReg(NRF24L01_06_RF_SETUP, rf_setup);
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}
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/*
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static void NRF24L01_SetPower_Value(uint8_t power)
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{
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uint8_t nrf_power = 0;
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switch(power) {
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case TXPOWER_100uW: nrf_power = 0; break;
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case TXPOWER_300uW: nrf_power = 0; break;
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case TXPOWER_1mW: nrf_power = 0; break;
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case TXPOWER_3mW: nrf_power = 1; break;
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case TXPOWER_10mW: nrf_power = 1; break;
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case TXPOWER_30mW: nrf_power = 2; break;
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case TXPOWER_100mW: nrf_power = 3; break;
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case TXPOWER_150mW: nrf_power = 3; break;
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default: nrf_power = 0; break;
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};
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// Power is in range 0..3 for nRF24L01
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rf_setup = (rf_setup & 0xF9) | ((nrf_power & 0x03) << 1);
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NRF24L01_WriteReg(NRF24L01_06_RF_SETUP, rf_setup);
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}
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*/
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void NRF24L01_SetPower()
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{
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uint8_t power=NRF_BIND_POWER;
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if(IS_BIND_DONE)
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#ifdef NRF24L01_ENABLE_LOW_POWER
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power=IS_POWER_FLAG_on?NRF_HIGH_POWER:NRF_LOW_POWER;
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#else
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power=NRF_HIGH_POWER;
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#endif
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if(IS_RANGE_FLAG_on)
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power=NRF_POWER_0;
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if(prev_power != power)
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{
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rf_setup = (rf_setup & 0xF9) | (power << 1);
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if(power==3)
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rf_setup |=0x01; // Si24r01 full power, unused bit for NRF
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else
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rf_setup &=0xFE;
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NRF24L01_WriteReg(NRF24L01_06_RF_SETUP, rf_setup);
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prev_power=power;
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}
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}
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void NRF24L01_SetTxRxMode(enum TXRX_State mode)
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{
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if(mode == TX_EN) {
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NRF_CE_off;
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NRF24L01_WriteReg(NRF24L01_07_STATUS, (1 << NRF24L01_07_RX_DR) //reset the flag(s)
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| (1 << NRF24L01_07_TX_DS)
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| (1 << NRF24L01_07_MAX_RT));
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (1 << NRF24L01_00_EN_CRC) // switch to TX mode
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP));
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delayMicroseconds(130);
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NRF_CE_on;
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}
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else
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if (mode == RX_EN)
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{
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NRF_CE_off;
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NRF24L01_WriteReg(NRF24L01_07_STATUS, (1 << NRF24L01_07_RX_DR) //reset the flag(s)
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| (1 << NRF24L01_07_TX_DS)
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| (1 << NRF24L01_07_MAX_RT));
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (1 << NRF24L01_00_EN_CRC) // switch to RX mode
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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delayMicroseconds(130);
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NRF_CE_on;
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}
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else
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{
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (1 << NRF24L01_00_EN_CRC)); //PowerDown
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NRF_CE_off;
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}
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}
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void NRF24L01_Reset()
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{
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NRF24L01_FlushTx();
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NRF24L01_FlushRx();
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NRF24L01_Strobe(0xff); // NOP
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NRF24L01_ReadReg(NRF24L01_07_STATUS);
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NRF24L01_SetTxRxMode(TXRX_OFF);
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delayMicroseconds(100);
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}
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uint8_t NRF24L01_packet_ack()
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{
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switch (NRF24L01_ReadReg(NRF24L01_07_STATUS) & (_BV(NRF24L01_07_TX_DS) | _BV(NRF24L01_07_MAX_RT)))
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{
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case _BV(NRF24L01_07_TX_DS):
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return PKT_ACKED;
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case _BV(NRF24L01_07_MAX_RT):
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return PKT_TIMEOUT;
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}
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return PKT_PENDING;
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}
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//
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// HS6200 emulation layer
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///////////////////////////
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static uint8_t hs6200_crc;
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static uint16_t hs6200_crc_init;
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static uint8_t hs6200_tx_addr[5];
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static uint8_t hs6200_address_length;
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static const uint8_t hs6200_scramble[] = {
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0x80,0xf5,0x3b,0x0d,0x6d,0x2a,0xf9,0xbc,
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0x51,0x8e,0x4c,0xfd,0xc1,0x65,0xd0 }; // todo: find all 32 bytes ...
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void HS6200_SetTXAddr(const uint8_t* addr, uint8_t len)
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{
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if(len < 4)
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len = 4;
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else if(len > 5)
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len = 5;
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// use nrf24 address field as a longer preamble
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if(addr[len-1] & 0x80)
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NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, (uint8_t*)"\x55\x55\x55\x55\x55", 5);
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else
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NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, (uint8_t*)"\xaa\xaa\xaa\xaa\xaa", 5);
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// precompute address crc
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crc = 0xffff;
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for(int i=0; i<len; i++)
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crc16_update(addr[len-1-i], 8);
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hs6200_crc_init=crc;
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memcpy(hs6200_tx_addr, addr, len);
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hs6200_address_length = len;
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}
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static uint16_t hs6200_calc_crc(uint8_t* msg, uint8_t len)
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{
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uint8_t pos;
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crc = hs6200_crc_init;
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// pcf + payload
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for(pos=0; pos < len-1; pos++)
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crc16_update(msg[pos], 8);
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// last byte (1 bit only)
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if(len > 0)
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crc16_update(msg[pos+1], 1);
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return crc;
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}
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void HS6200_Configure(uint8_t flags)
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{
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hs6200_crc = !!(flags & _BV(NRF24L01_00_EN_CRC));
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flags &= ~(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO));
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, flags & 0xff);
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}
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void HS6200_WritePayload(uint8_t* msg, uint8_t len)
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{
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uint8_t payload[32];
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const uint8_t no_ack = 1; // never ask for an ack
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static uint8_t pid;
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uint8_t pos = 0;
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if(len > sizeof(hs6200_scramble))
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len = sizeof(hs6200_scramble);
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// address
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for(int i=hs6200_address_length-1; i>=0; i--)
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payload[pos++] = hs6200_tx_addr[i];
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// guard bytes
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payload[pos++] = hs6200_tx_addr[0];
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payload[pos++] = hs6200_tx_addr[0];
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// packet control field
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payload[pos++] = ((len & 0x3f) << 2) | (pid & 0x03);
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payload[pos] = (no_ack & 0x01) << 7;
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pid++;
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// scrambled payload
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if(len > 0)
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{
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payload[pos++] |= (msg[0] ^ hs6200_scramble[0]) >> 1;
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for(uint8_t i=1; i<len; i++)
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payload[pos++] = ((msg[i-1] ^ hs6200_scramble[i-1]) << 7) | ((msg[i] ^ hs6200_scramble[i]) >> 1);
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payload[pos] = (msg[len-1] ^ hs6200_scramble[len-1]) << 7;
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}
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// crc
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if(hs6200_crc)
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{
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uint16_t crc = hs6200_calc_crc(&payload[hs6200_address_length+2], len+2);
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uint8_t hcrc = crc >> 8;
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uint8_t lcrc = crc & 0xff;
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payload[pos++] |= (hcrc >> 1);
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payload[pos++] = (hcrc << 7) | (lcrc >> 1);
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payload[pos++] = lcrc << 7;
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}
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NRF24L01_WritePayload(payload, pos);
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delayMicroseconds(option+20);
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NRF24L01_WritePayload(payload, pos);
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}
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//
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// End of HS6200 emulation
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////////////////////////////
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///////////////
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// LT8900 emulation layer
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uint8_t LT8900_buffer[64];
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uint8_t LT8900_buffer_start;
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uint16_t LT8900_buffer_overhead_bits;
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uint8_t LT8900_addr[8];
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uint8_t LT8900_addr_size;
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uint8_t LT8900_Preamble_Len;
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uint8_t LT8900_Tailer_Len;
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uint8_t LT8900_CRC_Initial_Data;
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uint8_t LT8900_Flags;
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#define LT8900_CRC_ON 6
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#define LT8900_SCRAMBLE_ON 5
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#define LT8900_PACKET_LENGTH_EN 4
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#define LT8900_DATA_PACKET_TYPE_1 3
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#define LT8900_DATA_PACKET_TYPE_0 2
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#define LT8900_FEC_TYPE_1 1
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#define LT8900_FEC_TYPE_0 0
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void LT8900_Config(uint8_t preamble_len, uint8_t trailer_len, uint8_t flags, uint8_t crc_init)
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{
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//Preamble 1 to 8 bytes
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LT8900_Preamble_Len=preamble_len;
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//Trailer 4 to 18 bits
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LT8900_Tailer_Len=trailer_len;
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//Flags
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// CRC_ON: 1 on, 0 off
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// SCRAMBLE_ON: 1 on, 0 off
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// PACKET_LENGTH_EN: 1 1st byte of payload is payload size
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// DATA_PACKET_TYPE: 00 NRZ, 01 Manchester, 10 8bit/10bit line code, 11 interleave data type
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// FEC_TYPE: 00 No FEC, 01 FEC13, 10 FEC23, 11 reserved
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LT8900_Flags=flags;
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//CRC init constant
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LT8900_CRC_Initial_Data=crc_init;
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}
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void LT8900_SetChannel(uint8_t channel)
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{
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NRF24L01_WriteReg(NRF24L01_05_RF_CH, channel +2); //NRF24L01 is 2400+channel but LT8900 is 2402+channel
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}
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void LT8900_SetTxRxMode(enum TXRX_State mode)
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{
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if(mode == TX_EN)
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{
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//Switch to TX
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(TX_EN);
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//Disable CRC
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (1 << NRF24L01_00_PWR_UP));
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}
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else
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if (mode == RX_EN)
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{
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NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
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NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, 32);
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//Switch to RX
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_FlushRx();
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NRF24L01_SetTxRxMode(RX_EN);
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// Disable CRC
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (1 << NRF24L01_00_PWR_UP) | (1 << NRF24L01_00_PRIM_RX) );
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}
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else
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NRF24L01_SetTxRxMode(TXRX_OFF);
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}
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void LT8900_BuildOverhead()
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{
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uint8_t pos;
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//Build overhead
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//preamble
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memset(LT8900_buffer,LT8900_addr[0]&0x01?0xAA:0x55,LT8900_Preamble_Len-1);
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pos=LT8900_Preamble_Len-1;
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//address
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for(uint8_t i=0;i<LT8900_addr_size;i++)
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{
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LT8900_buffer[pos]=bit_reverse(LT8900_addr[i]);
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pos++;
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}
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//trailer
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memset(LT8900_buffer+pos,(LT8900_buffer[pos-1]&0x01)==0?0xAA:0x55,3);
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LT8900_buffer_overhead_bits=pos*8+LT8900_Tailer_Len;
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//nrf address length max is 5
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pos+=LT8900_Tailer_Len/8;
|
|
LT8900_buffer_start=pos>5?5:pos;
|
|
}
|
|
|
|
void LT8900_SetAddress(uint8_t *address,uint8_t addr_size)
|
|
{
|
|
uint8_t addr[5];
|
|
|
|
//Address size (SyncWord) 2 to 8 bytes, 16/32/48/64 bits
|
|
LT8900_addr_size=addr_size;
|
|
for (uint8_t i = 0; i < addr_size; i++)
|
|
LT8900_addr[i] = address[addr_size-1-i];
|
|
|
|
//Build overhead
|
|
LT8900_BuildOverhead();
|
|
|
|
//Set NRF RX&TX address based on overhead content
|
|
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, LT8900_buffer_start-2);
|
|
for(uint8_t i=0;i<LT8900_buffer_start;i++) // reverse bytes order
|
|
addr[i]=LT8900_buffer[LT8900_buffer_start-i-1];
|
|
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, addr,LT8900_buffer_start);
|
|
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, addr,LT8900_buffer_start);
|
|
}
|
|
|
|
uint8_t LT8900_ReadPayload(uint8_t* msg, uint8_t len)
|
|
{
|
|
uint8_t i,pos=0,shift,end,buffer[32];
|
|
unsigned int a;
|
|
crc=LT8900_CRC_Initial_Data;
|
|
pos=LT8900_buffer_overhead_bits/8-LT8900_buffer_start;
|
|
end=pos+len+(LT8900_Flags&_BV(LT8900_PACKET_LENGTH_EN)?1:0)+(LT8900_Flags&_BV(LT8900_CRC_ON)?2:0);
|
|
//Read payload
|
|
NRF24L01_ReadPayload(buffer,end+1);
|
|
//Check address + trail
|
|
for(i=0;i<pos;i++)
|
|
if(LT8900_buffer[LT8900_buffer_start+i]!=buffer[i])
|
|
return 0; // wrong address...
|
|
//Shift buffer to remove trail bits
|
|
shift=LT8900_buffer_overhead_bits&0x7;
|
|
for(i=pos;i<end;i++)
|
|
{
|
|
a=(buffer[i]<<8)+buffer[i+1];
|
|
a<<=shift;
|
|
buffer[i]=(a>>8)&0xFF;
|
|
}
|
|
//Check len
|
|
if(LT8900_Flags&_BV(LT8900_PACKET_LENGTH_EN))
|
|
{
|
|
crc16_update(buffer[pos],8);
|
|
if(bit_reverse(len)!=buffer[pos++])
|
|
return 0; // wrong len...
|
|
}
|
|
//Decode message
|
|
for(i=0;i<len;i++)
|
|
{
|
|
crc16_update(buffer[pos],8);
|
|
msg[i]=bit_reverse(buffer[pos++]);
|
|
}
|
|
//Check CRC
|
|
if(LT8900_Flags&_BV(LT8900_CRC_ON))
|
|
{
|
|
if(buffer[pos++]!=((crc>>8)&0xFF)) return 0; // wrong CRC...
|
|
if(buffer[pos]!=(crc&0xFF)) return 0; // wrong CRC...
|
|
}
|
|
//Everything ok
|
|
return 1;
|
|
}
|
|
|
|
void LT8900_WritePayload(uint8_t* msg, uint8_t len)
|
|
{
|
|
unsigned int a,mask;
|
|
uint8_t i, pos=0,tmp, buffer[64], pos_final,shift;
|
|
crc=LT8900_CRC_Initial_Data;
|
|
//Add packet len
|
|
if(LT8900_Flags&_BV(LT8900_PACKET_LENGTH_EN))
|
|
{
|
|
tmp=bit_reverse(len);
|
|
buffer[pos++]=tmp;
|
|
crc16_update(tmp,8);
|
|
}
|
|
//Add payload
|
|
for(i=0;i<len;i++)
|
|
{
|
|
tmp=bit_reverse(msg[i]);
|
|
buffer[pos++]=tmp;
|
|
crc16_update(tmp,8);
|
|
}
|
|
//Add CRC
|
|
if(LT8900_Flags&_BV(LT8900_CRC_ON))
|
|
{
|
|
buffer[pos++]=crc>>8;
|
|
buffer[pos++]=crc;
|
|
}
|
|
//Shift everything to fit behind the trailer (4 to 18 bits)
|
|
shift=LT8900_buffer_overhead_bits&0x7;
|
|
pos_final=LT8900_buffer_overhead_bits/8;
|
|
mask=~(0xFF<<(8-shift));
|
|
LT8900_buffer[pos_final+pos]=0xFF;
|
|
for(i=pos-1;i!=0xFF;i--)
|
|
{
|
|
a=buffer[i]<<(8-shift);
|
|
LT8900_buffer[pos_final+i]=(LT8900_buffer[pos_final+i]&mask>>8)|a>>8;
|
|
LT8900_buffer[pos_final+i+1]=(LT8900_buffer[pos_final+i+1]&mask)|a;
|
|
}
|
|
if(shift)
|
|
pos++;
|
|
//Send everything
|
|
NRF24L01_WritePayload(LT8900_buffer+LT8900_buffer_start,pos_final+pos-LT8900_buffer_start);
|
|
}
|
|
// End of LT8900 emulation
|
|
#endif |