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			323 lines
		
	
	
		
			8.8 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			323 lines
		
	
	
		
			8.8 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
| /*
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|  This project is free software: you can redistribute it and/or modify
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|  it under the terms of the GNU General Public License as published by
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|  the Free Software Foundation, either version 3 of the License, or
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|  (at your option) any later version.
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| 
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|  Multiprotocol is distributed in the hope that it will be useful,
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|  but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  GNU General Public License for more details.
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| 
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|  You should have received a copy of the GNU General Public License
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|  along with Multiprotocol.  If not, see <http://www.gnu.org/licenses/>.
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|  */
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| #ifdef CYRF6936_INSTALLED
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| #include "iface_cyrf6936.h"
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| 
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| void CYRF_WriteRegister(uint8_t address, uint8_t data)
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| {
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| 	CYRF_CSN_off;
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| 	SPI_Write(0x80 | address);
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| 	SPI_Write(data);
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| 	CYRF_CSN_on;
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| }
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| 
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| static void CYRF_WriteRegisterMulti(uint8_t address, const uint8_t data[], uint8_t length)
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| {
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| 	uint8_t i;
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| 
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| 	CYRF_CSN_off;
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| 	SPI_Write(0x80 | address);
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| 	for(i = 0; i < length; i++)
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| 		SPI_Write(data[i]);
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| 	CYRF_CSN_on;
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| }
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| 
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| static void CYRF_ReadRegisterMulti(uint8_t address, uint8_t data[], uint8_t length)
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| {
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| 	uint8_t i;
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| 
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| 	CYRF_CSN_off;
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| 	SPI_Write(address);
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| 	for(i = 0; i < length; i++)
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| 		data[i] = SPI_Read();
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| 	CYRF_CSN_on;
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| }
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| 
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| uint8_t CYRF_ReadRegister(uint8_t address)
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| {
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| 	uint8_t data;
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| 	CYRF_CSN_off;
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| 	SPI_Write(address);
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| 	data = SPI_Read();
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| 	CYRF_CSN_on;
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| 	return data;
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| }
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| //
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| 
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| uint8_t CYRF_Reset()
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| {
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| #ifdef CYRF_RST_HI
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| 	CYRF_RST_HI;										//Hardware reset
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| 	delayMicroseconds(100);
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| 	CYRF_RST_LO;
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| 	delayMicroseconds(100);		  
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| #endif
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| 	CYRF_WriteRegister(CYRF_1D_MODE_OVERRIDE, 0x01);	//Software reset
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| 	delayMicroseconds(200);
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| 	CYRF_WriteRegister(CYRF_0C_XTAL_CTRL, 0xC0);		//Enable XOUT as GPIO
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| 	CYRF_WriteRegister(CYRF_0D_IO_CFG, 0x04);			//Enable PACTL as GPIO
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| 	CYRF_SetTxRxMode(TXRX_OFF);
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| 	//Verify the CYRF chip is responding
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| 	return (CYRF_ReadRegister(CYRF_10_FRAMING_CFG) == 0xa5);
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| }
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| 
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| /*
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| *
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| */
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| void CYRF_GetMfgData(uint8_t data[])
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| {
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| #ifndef FORCE_CYRF_ID
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| 	/* Fuses power on */
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| 	CYRF_WriteRegister(CYRF_25_MFG_ID, 0xFF);
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| 
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| 	CYRF_ReadRegisterMulti(CYRF_25_MFG_ID, data, 6);
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| 
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| 	/* Fuses power off */
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| 	CYRF_WriteRegister(CYRF_25_MFG_ID, 0x00); 
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| #else
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| 	memcpy(data,FORCE_CYRF_ID,6);
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| #endif
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| }
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| 
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| /*
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| * 1 - Tx else Rx
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| */
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| void CYRF_SetTxRxMode(uint8_t mode)
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| {
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| 	if(mode==TXRX_OFF)
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| 	{
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| 		if(protocol!=PROTO_WFLY)
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| 			CYRF_WriteRegister(CYRF_0F_XACT_CFG, 0x24); // 4=IDLE, 8=TX, C=RX
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| 		CYRF_WriteRegister(CYRF_0E_GPIO_CTRL,0x00); // XOUT=0 PACTL=0
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| 	}
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| 	else
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| 	{
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| 		//Set the post tx/rx state
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| 		if(protocol!=PROTO_WFLY)
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| 			CYRF_WriteRegister(CYRF_0F_XACT_CFG, mode == TX_EN ? 0x28 : 0x2C); // 4=IDLE, 8=TX, C=RX
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| 		if(mode == TX_EN)
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| #ifdef ORANGE_TX_BLUE
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| 			CYRF_WriteRegister(CYRF_0E_GPIO_CTRL,0x20); // XOUT=1, PACTL=0
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| 		else
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| 			CYRF_WriteRegister(CYRF_0E_GPIO_CTRL,0x80);	// XOUT=0, PACTL=1
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| #else
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| 			CYRF_WriteRegister(CYRF_0E_GPIO_CTRL,0x80); // XOUT=1, PACTL=0
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| 		else
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| 			CYRF_WriteRegister(CYRF_0E_GPIO_CTRL,0x20);	// XOUT=0, PACTL=1
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| #endif
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| 	}
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| }
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| /*
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| *
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| */
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| void CYRF_ConfigRFChannel(uint8_t ch)
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| {
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| 	CYRF_WriteRegister(CYRF_00_CHANNEL,ch);
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| }
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| 
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| /*
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| static void CYRF_SetPower_Value(uint8_t power)
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| {
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| 	uint8_t val = CYRF_ReadRegister(CYRF_03_TX_CFG) & 0xF8;
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| 	CYRF_WriteRegister(CYRF_03_TX_CFG, val | (power & 0x07));
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| }
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| */
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| 
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| void CYRF_SetPower(uint8_t val)
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| {
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| 	uint8_t power=CYRF_BIND_POWER;
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| 	if(IS_BIND_DONE)
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| 		#ifdef CYRF6936_ENABLE_LOW_POWER
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| 			power=IS_POWER_FLAG_on?CYRF_HIGH_POWER:CYRF_LOW_POWER;
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| 		#else
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| 			power=CYRF_HIGH_POWER;
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| 		#endif
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| 	if(IS_RANGE_FLAG_on)
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| 		power=CYRF_RANGE_POWER;
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| 	power|=val;
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| 	if(prev_power != power)
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| 	{
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| 		CYRF_WriteRegister(CYRF_03_TX_CFG,power);
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| 		prev_power=power;
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| 	}
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| 
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| 	#ifdef USE_CYRF6936_CH15_TUNING
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| 		static uint16_t Channel15=1024;
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| 		if(Channel15!=Channel_data[CH15])
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| 		{ // adjust frequency
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| 			Channel15=Channel_data[CH15]+0x155;	// default value is 0x555 = 0x400 + 0x155
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| 			CYRF_WriteRegister(CYRF_1B_TX_OFFSET_LSB, Channel15&0xFF);
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| 			CYRF_WriteRegister(CYRF_1C_TX_OFFSET_MSB, Channel15>>8);
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| 			Channel15-=0x155;
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| 		}
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| 	#endif
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| }
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| 
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| /*
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| *
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| */
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| void CYRF_ConfigCRCSeed(uint16_t crc)
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| {
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| 	CYRF_WriteRegister(CYRF_15_CRC_SEED_LSB,crc & 0xff);
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| 	CYRF_WriteRegister(CYRF_16_CRC_SEED_MSB,crc >> 8);
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| }
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| /*
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| * these are the recommended sop codes from Cyrpress
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| * See "WirelessUSB LP/LPstar and PRoC LP/LPstar Technical Reference Manual"
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| */
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| void CYRF_ConfigSOPCode(const uint8_t *sopcodes)
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| {
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| 	//NOTE: This can also be implemented as:
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| 	//for(i = 0; i < 8; i++) WriteRegister)0x23, sopcodes[i];
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| 	CYRF_WriteRegisterMulti(CYRF_22_SOP_CODE, sopcodes, 8);
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| }
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| 
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| void CYRF_ConfigDataCode(const uint8_t *datacodes, uint8_t len)
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| {
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| 	//NOTE: This can also be implemented as:
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| 	//for(i = 0; i < len; i++) WriteRegister)0x23, datacodes[i];
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| 	CYRF_WriteRegisterMulti(CYRF_23_DATA_CODE, datacodes, len);
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| }
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| 
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| void CYRF_WritePreamble(uint32_t preamble)
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| {
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| 	CYRF_CSN_off;
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| 	SPI_Write(0x80 | 0x24);
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| 	SPI_Write(preamble & 0xff);
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| 	SPI_Write((preamble >> 8) & 0xff);
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| 	SPI_Write((preamble >> 16) & 0xff);
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| 	CYRF_CSN_on;
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| }
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| /*
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| *
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| */
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| /*static void CYRF_ReadDataPacket(uint8_t dpbuffer[])
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| {
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| 	CYRF_ReadRegisterMulti(CYRF_21_RX_BUFFER, dpbuffer, 0x10);
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| }
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| */
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| void CYRF_ReadDataPacketLen(uint8_t dpbuffer[], uint8_t length)
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| {
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|     CYRF_ReadRegisterMulti(CYRF_21_RX_BUFFER, dpbuffer, length);
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| }
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| 
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| static void CYRF_WriteDataPacketLen(const uint8_t dpbuffer[], uint8_t len)
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| {
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| 	CYRF_WriteRegister(CYRF_01_TX_LENGTH, len);
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| 	CYRF_WriteRegister(CYRF_02_TX_CTRL, 0x43);	// 0x40
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| 	CYRF_WriteRegisterMulti(CYRF_20_TX_BUFFER, dpbuffer, len);
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| 	CYRF_WriteRegister(CYRF_02_TX_CTRL, 0x83);	// 0xBF
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| }
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| 
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| void CYRF_WriteDataPacket(const uint8_t dpbuffer[])
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| {
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| 	CYRF_WriteDataPacketLen(dpbuffer, 16);
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| }
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| 
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| /*static uint8_t CYRF_ReadRSSI(uint8_t dodummyread)
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| {
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| 	uint8_t result;
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| 	if(dodummyread)
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| 		CYRF_ReadRegister(CYRF_13_RSSI);
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| 	result = CYRF_ReadRegister(CYRF_13_RSSI);
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| 	if(result & 0x80)
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| 		result = CYRF_ReadRegister(CYRF_13_RSSI);
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| 	return (result & 0x0F);
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| }
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| */
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| //NOTE: This routine will reset the CRC Seed
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| void CYRF_FindBestChannels(uint8_t *channels, uint8_t len, uint8_t minspace, uint8_t min, uint8_t max)
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| {
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| 	#define NUM_FREQ 80
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| 	#define FREQ_OFFSET 4
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| 	uint8_t rssi[NUM_FREQ];
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| 
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| 	if (min < FREQ_OFFSET)
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| 		min = FREQ_OFFSET;
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| 	if (max > NUM_FREQ)
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| 		max = NUM_FREQ;
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| 
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| 	uint8_t i;
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| 	int8_t j;
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| 	memset(channels, 0, sizeof(uint8_t) * len);
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| 	CYRF_ConfigCRCSeed(0x0000);
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| 	CYRF_SetTxRxMode(RX_EN);
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| 	//Wait for pre-amp to switch from send to receive
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| 	delayMilliseconds(1);
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| 	for(i = 0; i < NUM_FREQ; i++)
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| 	{
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| 		CYRF_ConfigRFChannel(i);
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| 		delayMicroseconds(270);					//slow channel require 270usec for synthesizer to settle
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|         if( !(CYRF_ReadRegister(CYRF_05_RX_CTRL) & 0x80)) {
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|             CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x80); //Prepare to receive
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|             delayMicroseconds(15);
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|             CYRF_ReadRegister(CYRF_13_RSSI);	//dummy read
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|             delayMicroseconds(15);				//The conversion can occur as often as once every 12us
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|         }
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| 		rssi[i] = CYRF_ReadRegister(CYRF_13_RSSI)&0x1F;
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| 	}
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| 
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| 	for (i = 0; i < len; i++)
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| 	{
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| 		channels[i] = min;
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| 		for (j = min; j < max; j++)
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| 			if (rssi[j] < rssi[channels[i]])
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| 				channels[i] = j;
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| 		for (j = channels[i] - minspace; j < channels[i] + minspace; j++) {
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| 			//Ensure we don't reuse any channels within minspace of the selected channel again
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| 			if (j < 0 || j >= NUM_FREQ)
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| 				continue;
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| 			rssi[j] = 0xff;
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| 		}
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| 	}
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| 	CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20);		// Abort RX operation
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| 	CYRF_SetTxRxMode(TX_EN);
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| 	CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00);		// Clear abort RX
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| }
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| 
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| #if defined(DEVO_CYRF6936_INO) || defined(J6PRO_CYRF6936_INO)
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| const uint8_t PROGMEM DEVO_j6pro_sopcodes[][8] = {
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|     /* Note these are in order transmitted (LSB 1st) */
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|     {0x3C, 0x37, 0xCC, 0x91, 0xE2, 0xF8, 0xCC, 0x91},
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|     {0x9B, 0xC5, 0xA1, 0x0F, 0xAD, 0x39, 0xA2, 0x0F},
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|     {0xEF, 0x64, 0xB0, 0x2A, 0xD2, 0x8F, 0xB1, 0x2A},
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|     {0x66, 0xCD, 0x7C, 0x50, 0xDD, 0x26, 0x7C, 0x50},
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|     {0x5C, 0xE1, 0xF6, 0x44, 0xAD, 0x16, 0xF6, 0x44},
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|     {0x5A, 0xCC, 0xAE, 0x46, 0xB6, 0x31, 0xAE, 0x46},
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|     {0xA1, 0x78, 0xDC, 0x3C, 0x9E, 0x82, 0xDC, 0x3C},
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|     {0xB9, 0x8E, 0x19, 0x74, 0x6F, 0x65, 0x18, 0x74},
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|     {0xDF, 0xB1, 0xC0, 0x49, 0x62, 0xDF, 0xC1, 0x49},
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|     {0x97, 0xE5, 0x14, 0x72, 0x7F, 0x1A, 0x14, 0x72},
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| #if defined(J6PRO_CYRF6936_INO)
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|     {0x82, 0xC7, 0x90, 0x36, 0x21, 0x03, 0xFF, 0x17},
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|     {0xE2, 0xF8, 0xCC, 0x91, 0x3C, 0x37, 0xCC, 0x91}, //Note: the '03' was '9E' in the Cypress recommended table
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|     {0xAD, 0x39, 0xA2, 0x0F, 0x9B, 0xC5, 0xA1, 0x0F}, //The following are the same as the 1st 8 above,
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|     {0xD2, 0x8F, 0xB1, 0x2A, 0xEF, 0x64, 0xB0, 0x2A}, //but with the upper and lower word swapped
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|     {0xDD, 0x26, 0x7C, 0x50, 0x66, 0xCD, 0x7C, 0x50},
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|     {0xAD, 0x16, 0xF6, 0x44, 0x5C, 0xE1, 0xF6, 0x44},
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|     {0xB6, 0x31, 0xAE, 0x46, 0x5A, 0xCC, 0xAE, 0x46},
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|     {0x9E, 0x82, 0xDC, 0x3C, 0xA1, 0x78, 0xDC, 0x3C},
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|     {0x6F, 0x65, 0x18, 0x74, 0xB9, 0x8E, 0x19, 0x74},
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| #endif
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| };
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| #endif
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| static void __attribute__((unused)) CYRF_PROGMEM_ConfigSOPCode(const uint8_t *data)
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| {
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| 	uint8_t code[8];
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| 	for(uint8_t i=0;i<8;i++)
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| 		code[i]=pgm_read_byte_near(&data[i]);
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| 	CYRF_ConfigSOPCode(code);
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| }
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| #endif |