mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 21:38:14 +00:00
6a83cb5577
* Restore previous cc2500 register init * Fix failsafe packets locks * Fix D8 checksum check
230 lines
6.2 KiB
C++
230 lines
6.2 KiB
C++
/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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/******************************/
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/** FrSky D and X routines **/
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/******************************/
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#if defined(FRSKYX_CC2500_INO) || defined(FRSKY_RX_CC2500_INO)
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//**CRC**
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const uint16_t PROGMEM FrSkyX_CRC_Short[]={
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0x0000, 0x1189, 0x2312, 0x329B, 0x4624, 0x57AD, 0x6536, 0x74BF,
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0x8C48, 0x9DC1, 0xAF5A, 0xBED3, 0xCA6C, 0xDBE5, 0xE97E, 0xF8F7 };
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static uint16_t __attribute__((unused)) FrSkyX_CRCTable(uint8_t val)
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{
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uint16_t word ;
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word = pgm_read_word(&FrSkyX_CRC_Short[val&0x0F]) ;
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val /= 16 ;
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return word ^ (0x1081 * val) ;
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}
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uint16_t FrSkyX_crc(uint8_t *data, uint8_t len)
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{
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uint16_t crc = 0;
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for(uint8_t i=0; i < len; i++)
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crc = (crc<<8) ^ FrSkyX_CRCTable((uint8_t)(crc>>8) ^ *data++);
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return crc;
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}
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#endif
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#if defined(FRSKYD_CC2500_INO) || defined(FRSKYX_CC2500_INO)
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enum {
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FRSKY_BIND = 0,
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FRSKY_BIND_DONE = 1000,
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FRSKY_DATA1,
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FRSKY_DATA2,
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FRSKY_DATA3,
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FRSKY_DATA4,
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FRSKY_DATA5
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};
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void Frsky_init_hop(void)
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{
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uint8_t val;
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uint8_t channel = rx_tx_addr[0]&0x07;
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uint8_t channel_spacing = rx_tx_addr[1];
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//Filter bad tables
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if(channel_spacing<0x02) channel_spacing+=0x02;
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if(channel_spacing>0xE9) channel_spacing-=0xE7;
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if(channel_spacing%0x2F==0) channel_spacing++;
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hopping_frequency[0]=channel;
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for(uint8_t i=1;i<50;i++)
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{
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channel=(channel+channel_spacing) % 0xEB;
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val=channel;
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if((val==0x00) || (val==0x5A) || (val==0xDC))
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val++;
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hopping_frequency[i]=i>46?0:val;
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}
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}
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#endif
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/******************************/
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/** FrSky V, D and X routines **/
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/******************************/
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#if defined(FRSKYV_CC2500_INO) || defined(FRSKYD_CC2500_INO) || defined(FRSKYX_CC2500_INO)
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const PROGMEM uint8_t FRSKY_common_startreg_cc2500_conf[]= {
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CC2500_02_IOCFG0 ,
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CC2500_00_IOCFG2 ,
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CC2500_17_MCSM1 ,
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CC2500_18_MCSM0 ,
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CC2500_06_PKTLEN ,
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CC2500_07_PKTCTRL1 ,
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CC2500_08_PKTCTRL0 ,
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CC2500_3E_PATABLE ,
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CC2500_0B_FSCTRL1 ,
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CC2500_0C_FSCTRL0 , // replaced by option value
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CC2500_0D_FREQ2 ,
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CC2500_0E_FREQ1 ,
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CC2500_0F_FREQ0 ,
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CC2500_10_MDMCFG4 ,
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CC2500_11_MDMCFG3 ,
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CC2500_12_MDMCFG2 ,
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CC2500_13_MDMCFG1 ,
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CC2500_14_MDMCFG0 ,
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CC2500_15_DEVIATN };
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#if defined(FRSKYV_CC2500_INO)
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const PROGMEM uint8_t FRSKYV_cc2500_conf[]= {
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/*02_IOCFG0*/ 0x06 ,
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/*00_IOCFG2*/ 0x06 ,
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/*17_MCSM1*/ 0x0c ,
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/*18_MCSM0*/ 0x18 ,
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/*06_PKTLEN*/ 0xff ,
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/*07_PKTCTRL1*/ 0x04 ,
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/*08_PKTCTRL0*/ 0x05 ,
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/*3E_PATABLE*/ 0xfe ,
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/*0B_FSCTRL1*/ 0x08 ,
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/*0C_FSCTRL0*/ 0x00 ,
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/*0D_FREQ2*/ 0x5c ,
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/*0E_FREQ1*/ 0x58 ,
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/*0F_FREQ0*/ 0x9d ,
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/*10_MDMCFG4*/ 0xAA ,
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/*11_MDMCFG3*/ 0x10 ,
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/*12_MDMCFG2*/ 0x93 ,
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/*13_MDMCFG1*/ 0x23 ,
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/*14_MDMCFG0*/ 0x7a ,
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/*15_DEVIATN*/ 0x41 };
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#endif
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#if defined(FRSKYD_CC2500_INO)
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const PROGMEM uint8_t FRSKYD_cc2500_conf[]= {
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/*02_IOCFG0*/ 0x06 ,
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/*00_IOCFG2*/ 0x06 ,
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/*17_MCSM1*/ 0x0c ,
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/*18_MCSM0*/ 0x18 ,
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/*06_PKTLEN*/ 0x19 ,
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/*07_PKTCTRL1*/ 0x04 ,
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/*08_PKTCTRL0*/ 0x05 ,
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/*3E_PATABLE*/ 0xff ,
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/*0B_FSCTRL1*/ 0x08 ,
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/*0C_FSCTRL0*/ 0x00 ,
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/*0D_FREQ2*/ 0x5c ,
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/*0E_FREQ1*/ 0x76 ,
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/*0F_FREQ0*/ 0x27 ,
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/*10_MDMCFG4*/ 0xAA ,
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/*11_MDMCFG3*/ 0x39 ,
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/*12_MDMCFG2*/ 0x11 ,
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/*13_MDMCFG1*/ 0x23 ,
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/*14_MDMCFG0*/ 0x7a ,
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/*15_DEVIATN*/ 0x42 };
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#endif
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#if defined(FRSKYX_CC2500_INO)
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const PROGMEM uint8_t FRSKYX_cc2500_conf[]= {
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//FRSKYX
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/*02_IOCFG0*/ 0x06 ,
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/*00_IOCFG2*/ 0x06 ,
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/*17_MCSM1*/ 0x0c ,
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/*18_MCSM0*/ 0x18 ,
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/*06_PKTLEN*/ 0x1E ,
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/*07_PKTCTRL1*/ 0x04 ,
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/*08_PKTCTRL0*/ 0x01 ,
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/*3E_PATABLE*/ 0xff ,
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/*0B_FSCTRL1*/ 0x0A ,
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/*0C_FSCTRL0*/ 0x00 ,
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/*0D_FREQ2*/ 0x5c ,
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/*0E_FREQ1*/ 0x76 ,
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/*0F_FREQ0*/ 0x27 ,
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/*10_MDMCFG4*/ 0x7B ,
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/*11_MDMCFG3*/ 0x61 ,
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/*12_MDMCFG2*/ 0x13 ,
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/*13_MDMCFG1*/ 0x23 ,
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/*14_MDMCFG0*/ 0x7a ,
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/*15_DEVIATN*/ 0x51 };
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const PROGMEM uint8_t FRSKYXEU_cc2500_conf[]= {
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/*02_IOCFG0*/ 0x06 ,
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/*00_IOCFG2*/ 0x06 ,
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/*17_MCSM1*/ 0x0E ,
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/*18_MCSM0*/ 0x18 ,
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/*06_PKTLEN*/ 0x23 ,
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/*07_PKTCTRL1*/ 0x04 ,
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/*08_PKTCTRL0*/ 0x01 ,
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/*3E_PATABLE*/ 0xff ,
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/*0B_FSCTRL1*/ 0x08 ,
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/*0C_FSCTRL0*/ 0x00 ,
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/*0D_FREQ2*/ 0x5c ,
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/*0E_FREQ1*/ 0x80 ,
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/*0F_FREQ0*/ 0x00 ,
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/*10_MDMCFG4*/ 0x7B ,
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/*11_MDMCFG3*/ 0xF8 ,
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/*12_MDMCFG2*/ 0x03 ,
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/*13_MDMCFG1*/ 0x23 ,
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/*14_MDMCFG0*/ 0x7a ,
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/*15_DEVIATN*/ 0x53 };
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#endif
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const PROGMEM uint8_t FRSKY_common_end_cc2500_conf[][2]= {
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{ CC2500_19_FOCCFG, 0x16 },
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{ CC2500_1A_BSCFG, 0x6c },
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{ CC2500_1B_AGCCTRL2, 0x43 },
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{ CC2500_1C_AGCCTRL1, 0x40 },
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{ CC2500_1D_AGCCTRL0, 0x91 },
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{ CC2500_21_FREND1, 0x56 },
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{ CC2500_22_FREND0, 0x10 },
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{ CC2500_23_FSCAL3, 0xa9 },
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{ CC2500_24_FSCAL2, 0x0A },
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{ CC2500_25_FSCAL1, 0x00 },
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{ CC2500_26_FSCAL0, 0x11 },
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{ CC2500_29_FSTEST, 0x59 },
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{ CC2500_2C_TEST2, 0x88 },
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{ CC2500_2D_TEST1, 0x31 },
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{ CC2500_2E_TEST0, 0x0B },
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{ CC2500_03_FIFOTHR, 0x07 },
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{ CC2500_09_ADDR, 0x00 } };
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void FRSKY_init_cc2500(const uint8_t *ptr)
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{
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for(uint8_t i=0;i<19;i++)
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{
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uint8_t reg=pgm_read_byte_near(&FRSKY_common_startreg_cc2500_conf[i]);
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uint8_t val=pgm_read_byte_near(&ptr[i]);
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if(reg==CC2500_0C_FSCTRL0)
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val=option;
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CC2500_WriteReg(reg,val);
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}
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prev_option = option ; // Save option to monitor FSCTRL0 change
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for(uint8_t i=0;i<17;i++)
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{
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uint8_t reg=pgm_read_byte_near(&FRSKY_common_end_cc2500_conf[i][0]);
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uint8_t val=pgm_read_byte_near(&FRSKY_common_end_cc2500_conf[i][1]);
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CC2500_WriteReg(reg,val);
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}
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CC2500_SetTxRxMode(TX_EN);
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CC2500_SetPower();
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CC2500_Strobe(CC2500_SIDLE); // Go to idle...
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}
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#endif
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