mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 19:58:13 +00:00
229 lines
6.2 KiB
C++
229 lines
6.2 KiB
C++
/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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#if defined(AFHDS2A_RX_A7105_INO)
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#include "iface_a7105.h"
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#define AFHDS2A_RX_TXPACKET_SIZE 38
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#define AFHDS2A_RX_RXPACKET_SIZE 37
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#define AFHDS2A_RX_NUMFREQ 16
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enum {
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AFHDS2A_RX_BIND1,
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AFHDS2A_RX_BIND2,
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AFHDS2A_RX_BIND3,
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AFHDS2A_RX_DATA
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};
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static void __attribute__((unused)) AFHDS2A_RX_build_telemetry_packet()
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{
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uint32_t bits = 0;
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uint8_t bitsavailable = 0;
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uint8_t idx = 0;
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packet_in[idx++] = RX_LQI; // 0 - 130
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packet_in[idx++] = RX_RSSI;
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packet_in[idx++] = 0; // start channel
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packet_in[idx++] = 14; // number of channels in packet
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// pack channels
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for (uint8_t i = 0; i < 14; i++) {
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uint32_t val = packet[9+i*2] | (((packet[10+i*2])&0x0F) << 8);
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if (val < 860)
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val = 860;
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// convert ppm (860-2140) to Multi (0-2047)
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val = min(((val-860)<<3)/5, 2047);
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bits |= val << bitsavailable;
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bitsavailable += 11;
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while (bitsavailable >= 8) {
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packet_in[idx++] = bits & 0xff;
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bits >>= 8;
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bitsavailable -= 8;
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}
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}
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}
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static uint8_t __attribute__((unused)) AFHDS2A_RX_data_ready()
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{
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// check if FECF+CRCF Ok
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return !(A7105_ReadReg(A7105_00_MODE) & (1 << 5 | 1 << 6 | 1 << 0));
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}
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void AFHDS2A_RX_init()
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{
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uint8_t i;
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A7105_Init();
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hopping_frequency_no = 0;
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packet_count = 0;
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rx_data_started = false;
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rx_disable_lna = IS_POWER_FLAG_on;
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A7105_SetTxRxMode(rx_disable_lna ? TXRX_OFF : RX_EN);
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A7105_Strobe(A7105_RX);
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if (IS_BIND_IN_PROGRESS) {
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phase = AFHDS2A_RX_BIND1;
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}
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else {
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uint16_t temp = AFHDS2A_RX_EEPROM_OFFSET;
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for (i = 0; i < 4; i++)
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rx_id[i] = eeprom_read_byte((EE_ADDR)temp++);
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for (i = 0; i < AFHDS2A_RX_NUMFREQ; i++)
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hopping_frequency[i] = eeprom_read_byte((EE_ADDR)temp++);
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phase = AFHDS2A_RX_DATA;
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}
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}
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#define AFHDS2A_RX_WAIT_WRITE 0x80
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uint16_t AFHDS2A_RX_callback()
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{
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static int8_t read_retry;
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int16_t temp;
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uint8_t i;
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#ifndef FORCE_AFHDS2A_TUNING
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A7105_AdjustLOBaseFreq(1);
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#endif
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if (rx_disable_lna != IS_POWER_FLAG_on) {
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rx_disable_lna = IS_POWER_FLAG_on;
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A7105_SetTxRxMode(rx_disable_lna ? TXRX_OFF : RX_EN);
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}
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switch(phase) {
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case AFHDS2A_RX_BIND1:
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if(IS_BIND_DONE)
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{
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AFHDS2A_RX_init(); // Abort bind
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break;
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}
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debugln("bind p=%d", phase+1);
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if (AFHDS2A_RX_data_ready()) {
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A7105_ReadData(AFHDS2A_RX_TXPACKET_SIZE);
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if ((packet[0] == 0xbb && packet[9] == 0x01) || (packet[0] == 0xbc && packet[9] <= 0x02)) {
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memcpy(rx_id, &packet[1], 4); // TX id actually
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memcpy(hopping_frequency, &packet[11], AFHDS2A_RX_NUMFREQ);
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phase = AFHDS2A_RX_BIND2;
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debugln("phase bind2");
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}
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}
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A7105_WriteReg(A7105_0F_PLL_I, (packet_count++ & 1) ? 0x0D : 0x8C); // bind channels
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A7105_Strobe(A7105_RX);
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return 10000;
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case AFHDS2A_RX_BIND2:
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if(IS_BIND_DONE)
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{
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AFHDS2A_RX_init(); // Abort bind
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break;
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}
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// got 2nd bind packet from tx ?
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if (AFHDS2A_RX_data_ready()) {
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A7105_ReadData(AFHDS2A_RX_TXPACKET_SIZE);
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if ((packet[0] == 0xBC && packet[9] == 0x02 && packet[10] == 0x00) &&
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(memcmp(rx_id, &packet[1], 4) == 0) &&
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(memcmp(rx_tx_addr, &packet[5], 4) == 0)) {
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// save tx info to eeprom
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temp = AFHDS2A_RX_EEPROM_OFFSET;
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for (i = 0; i < 4; i++)
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eeprom_write_byte((EE_ADDR)temp++, rx_id[i]);
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for (i = 0; i < AFHDS2A_RX_NUMFREQ; i++)
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eeprom_write_byte((EE_ADDR)temp++, hopping_frequency[i]);
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phase = AFHDS2A_RX_BIND3;
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debugln("phase bind3");
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packet_count = 0;
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}
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}
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case AFHDS2A_RX_BIND3:
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debugln("bind p=%d", phase+1);
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// transmit response packet
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packet[0] = 0xBC;
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memcpy(&packet[1], rx_id, 4);
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memcpy(&packet[5], rx_tx_addr, 4);
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//packet[9] = 0x01;
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packet[10] = 0x00;
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memset(&packet[11], 0xFF, 26);
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A7105_SetTxRxMode(TX_EN);
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rx_disable_lna = !IS_POWER_FLAG_on;
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A7105_WriteData(AFHDS2A_RX_RXPACKET_SIZE, packet_count++ & 1 ? 0x0D : 0x8C);
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if(phase == AFHDS2A_RX_BIND3 && packet_count > 20)
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{
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debugln("done");
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BIND_DONE;
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AFHDS2A_RX_init(); // Restart protocol
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break;
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}
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phase |= AFHDS2A_RX_WAIT_WRITE;
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return 1700;
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case AFHDS2A_RX_BIND2 | AFHDS2A_RX_WAIT_WRITE:
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//Wait for TX completion
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pps_timer = micros();
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while ((uint32_t)(micros() - pps_timer) < 700) // Wait max 700µs, using serial+telemetry exit in about 120µs
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if (!(A7105_ReadReg(A7105_00_MODE) & 0x01))
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break;
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A7105_Strobe(A7105_RX);
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case AFHDS2A_RX_BIND3 | AFHDS2A_RX_WAIT_WRITE:
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phase &= ~AFHDS2A_RX_WAIT_WRITE;
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return 10000;
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case AFHDS2A_RX_DATA:
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if (AFHDS2A_RX_data_ready()) {
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A7105_ReadData(AFHDS2A_RX_TXPACKET_SIZE);
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if (memcmp(&packet[1], rx_id, 4) == 0 && memcmp(&packet[5], rx_tx_addr, 4) == 0) {
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if (packet[0] == 0x58 && packet[37] == 0x00 && (telemetry_link&0x7F) == 0) { // standard packet, send channels to TX
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int rssi = min(A7105_ReadReg(A7105_1D_RSSI_THOLD),160);
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RX_RSSI = map16b(rssi, 160, 8, 0, 128);
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AFHDS2A_RX_build_telemetry_packet();
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telemetry_link = 1;
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#ifdef SEND_CPPM
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if(sub_protocol>0)
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telemetry_link |= 0x80; // Disable telemetry output
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#endif
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}
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rx_data_started = true;
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read_retry = 10; // hop to next channel
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pps_counter++;
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}
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}
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// packets per second
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if (millis() - pps_timer >= 1000) {
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pps_timer = millis();
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debugln("%d pps", pps_counter);
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RX_LQI = pps_counter / 2;
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pps_counter = 0;
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}
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// frequency hopping
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if (read_retry++ >= 10) {
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hopping_frequency_no++;
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if(hopping_frequency_no >= AFHDS2A_RX_NUMFREQ)
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hopping_frequency_no = 0;
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A7105_WriteReg(A7105_0F_PLL_I, hopping_frequency[hopping_frequency_no]);
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A7105_Strobe(A7105_RX);
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if (rx_data_started)
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read_retry = 0;
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else
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read_retry = -127; // retry longer until first packet is catched
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}
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return 385;
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}
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return 3850; // never reached
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}
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#endif
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