mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-03-15 12:59:09 +00:00
184 lines
4.4 KiB
C++
184 lines
4.4 KiB
C++
/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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//Models: UDIRC UD160x(PRO), Pinecone Models SG-160x, Eachine EAT15
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#if defined(UDIRC_CCNRF_INO)
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#include "iface_xn297.h"
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#define FORCE_UDIRC_ORIGINAL_ID
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#define UDIRC_PAYLOAD_SIZE 15
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#define UDIRC_RF_NUM_CHANNELS 4
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#define UDIRC_PACKET_PERIOD 21000
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#define UDIRC_BIND_COUNT 2000
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#define UDIRC_P1_P2_TIME 5000
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#define UDIRC_WRITE_TIME 1500
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enum {
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UDIRC_DATA1=0,
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UDIRC_DATA2,
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UDIRC_RX,
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};
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static void __attribute__((unused)) UDIRC_send_packet()
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{
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if(rf_ch_num==0)
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{
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XN297_Hopping(hopping_frequency_no);
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debug("H %d ",hopping_frequency_no);
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hopping_frequency_no++;
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hopping_frequency_no &= 3;
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}
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memset(&packet[3], 0x00, 12);
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if(bind_counter)
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{//Bind in progress
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bind_counter--;
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if(bind_counter)
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{//Bind
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packet[0] = 0x01;
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memcpy(&packet[1],rx_tx_addr,5);
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}
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else
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{//Switch to normal
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BIND_DONE;
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XN297_SetTXAddr(rx_tx_addr, 5);
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XN297_SetRXAddr(rx_tx_addr, UDIRC_PAYLOAD_SIZE);
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}
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}
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if(!bind_counter)
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{//Normal
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packet[0] = 0x08;
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//Channels SG-16xx: ST/TH/CH4 /CH3 /UNK/UNK/UNK/UNK/GYRO/ST_TRIM/ST_DR
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//Channels EAT15 : ST/TH/RATE/LIGHT/UNK/UNK/UNK/UNK/GYRO/ST_TRIM/ST_DR
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for(uint8_t i=0; i<9; i++)
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packet[i+1] = convert_channel_16b_limit(i,0,200);
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//Just for now let's set the additional channels to 0
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packet[5] = packet[6] = packet[7] = packet[8] = 0;
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}
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packet[12] = GET_FLAG(CH12_SW, 0x40) //TH.REV
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|GET_FLAG(CH13_SW, 0x80); //ST.REV
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//packet[13] = 00; //Unknown, future flags?
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for(uint8_t i=0;i<UDIRC_PAYLOAD_SIZE-1;i++)
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packet[14] += packet[i];
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// Send
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XN297_SetFreqOffset();
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XN297_SetPower();
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XN297_SetTxRxMode(TX_EN);
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XN297_WriteEnhancedPayload(packet, UDIRC_PAYLOAD_SIZE,false);
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#ifdef DEBUG_SERIAL
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for(uint8_t i=0; i < UDIRC_PAYLOAD_SIZE; i++)
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debug("%02X ", packet[i]);
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debugln();
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#endif
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}
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static void __attribute__((unused)) UDIRC_initialize_txid()
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{
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#ifdef FORCE_UDIRC_ORIGINAL_ID
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if(RX_num)
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{
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rx_tx_addr[0] = 0xD0;
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rx_tx_addr[1] = 0x06;
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rx_tx_addr[2] = 0x00;
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rx_tx_addr[3] = 0x00;
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rx_tx_addr[4] = 0x81;
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}
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else
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{
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rx_tx_addr[0] = 0xF6;
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rx_tx_addr[1] = 0x96;
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rx_tx_addr[2] = 0x01;
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rx_tx_addr[3] = 0x00;
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rx_tx_addr[4] = 0x81;
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}
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hopping_frequency[0] = 45;
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hopping_frequency[1] = 59;
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hopping_frequency[2] = 52;
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hopping_frequency[3] = 67;
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#endif
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}
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static void __attribute__((unused)) UDIRC_RF_init()
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{
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XN297_Configure(XN297_CRCEN, XN297_SCRAMBLED, XN297_250K);
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//Bind address
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XN297_SetTXAddr((uint8_t*)"\x01\x03\x05\x07\x09", 5);
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XN297_SetRXAddr((uint8_t*)"\x01\x03\x05\x07\x09", UDIRC_PAYLOAD_SIZE);
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XN297_HoppingCalib(UDIRC_RF_NUM_CHANNELS);
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}
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uint16_t UDIRC_callback()
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{
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bool rx;
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switch(phase)
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{
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case UDIRC_DATA1:
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rx = XN297_IsRX();
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XN297_SetTxRxMode(TXRX_OFF);
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#ifdef MULTI_SYNC
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telemetry_set_input_sync(UDIRC_PACKET_PERIOD);
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#endif
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UDIRC_send_packet();
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if(rx)
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{
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uint8_t val=XN297_ReadEnhancedPayload(packet_in, UDIRC_PAYLOAD_SIZE);
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debug("RX %d",val);
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if(val != 255)
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{
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rf_ch_num = 1;
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if(bind_counter)
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bind_counter=1;
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#ifdef DEBUG_SERIAL
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for(uint8_t i=0; i < UDIRC_PAYLOAD_SIZE; i++)
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debug(" %02X", packet_in[i]);
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debugln();
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#endif
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}
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debugln("");
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}
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phase++;
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return UDIRC_P1_P2_TIME;
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case UDIRC_DATA2:
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//Resend packet
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XN297_ReSendPayload();
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phase++;
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return UDIRC_WRITE_TIME;
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default: //UDIRC_RX
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//Wait for the packet transmission to finish
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while(XN297_IsPacketSent()==false);
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//Switch to RX
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XN297_SetTxRxMode(TXRX_OFF);
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XN297_SetTxRxMode(RX_EN);
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phase = UDIRC_DATA1;
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return UDIRC_PACKET_PERIOD - UDIRC_P1_P2_TIME - UDIRC_WRITE_TIME;
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}
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return 0;
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}
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void UDIRC_init()
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{
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UDIRC_initialize_txid();
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UDIRC_RF_init();
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bind_counter = IS_BIND_IN_PROGRESS ? UDIRC_BIND_COUNT : 1;
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phase = UDIRC_DATA1;
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hopping_frequency_no = 0;
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rf_ch_num = 0;
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}
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#endif
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