mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 21:58:10 +00:00
4a626eaf14
Loads of protocols have been touched by this change. Some testing has been done but please test on all your models. The XN297 emulation selects in this order: - the CC2500 if it is available and bitrate=250K. Configure the option field automatically for RF tune. - the NRF for all bitrates if it is available - if NRF is not available and bitrate=1M then an invalid protocol is sent automatically to the radio. CC2500 @250K can now receive normal and enhanced payloads. OMP protocol supports telemetry on CC2500 and is also for NRF only modules including telemetry. Separation of E016H (new protocol) from E01X due to different structure. MJXQ, MT99XX, Q303 and XK: some sub protocols available on CC2500 only.
290 lines
9.7 KiB
C++
290 lines
9.7 KiB
C++
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/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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//-------------------------------
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//-------------------------------
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//CC2500 SPI routines
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//-------------------------------
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//-------------------------------
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#ifdef CC2500_INSTALLED
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#include "iface_cc2500.h"
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//----------------------------
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void CC2500_WriteReg(uint8_t address, uint8_t data)
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{
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CC25_CSN_off;
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SPI_Write(address);
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NOP();
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SPI_Write(data);
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CC25_CSN_on;
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}
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//----------------------
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static void CC2500_ReadRegisterMulti(uint8_t address, uint8_t data[], uint8_t length)
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{
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CC25_CSN_off;
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SPI_Write(CC2500_READ_BURST | address);
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for(uint8_t i = 0; i < length; i++)
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data[i] = SPI_Read();
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CC25_CSN_on;
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}
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//--------------------------------------------
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static uint8_t CC2500_ReadReg(uint8_t address)
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{
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uint8_t result;
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CC25_CSN_off;
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SPI_Write(CC2500_READ_SINGLE | address);
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result = SPI_Read();
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CC25_CSN_on;
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return(result);
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}
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//------------------------
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void CC2500_ReadData(uint8_t *dpbuffer, uint8_t len)
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{
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CC2500_ReadRegisterMulti(CC2500_3F_RXFIFO, dpbuffer, len);
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}
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//*********************************************
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void CC2500_Strobe(uint8_t state)
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{
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CC25_CSN_off;
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SPI_Write(state);
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CC25_CSN_on;
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}
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static void CC2500_WriteRegisterMulti(uint8_t address, const uint8_t data[], uint8_t length)
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{
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CC25_CSN_off;
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SPI_Write(CC2500_WRITE_BURST | address);
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for(uint8_t i = 0; i < length; i++)
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SPI_Write(data[i]);
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CC25_CSN_on;
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}
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void CC2500_WriteData(uint8_t *dpbuffer, uint8_t len)
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{
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CC2500_Strobe(CC2500_SFTX);
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, dpbuffer, len);
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CC2500_Strobe(CC2500_STX);
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}
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void CC2500_SetTxRxMode(uint8_t mode)
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{
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if(mode == TX_EN)
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{//from deviation firmware
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CC2500_WriteReg(CC2500_00_IOCFG2, 0x2F);
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CC2500_WriteReg(CC2500_02_IOCFG0, 0x2F | 0x40);
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}
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else
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if (mode == RX_EN)
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{
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CC2500_WriteReg(CC2500_02_IOCFG0, 0x2F);
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CC2500_WriteReg(CC2500_00_IOCFG2, 0x2F | 0x40);
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}
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else
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{
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CC2500_WriteReg(CC2500_02_IOCFG0, 0x2F);
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CC2500_WriteReg(CC2500_00_IOCFG2, 0x2F);
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}
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}
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//------------------------
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/*static void cc2500_resetChip(void)
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{
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// Toggle chip select signal
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CC25_CSN_on;
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delayMicroseconds(30);
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CC25_CSN_off;
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delayMicroseconds(30);
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CC25_CSN_on;
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delayMicroseconds(45);
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CC2500_Strobe(CC2500_SRES);
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_delay_ms(100);
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}
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*/
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uint8_t CC2500_Reset()
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{
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CC2500_Strobe(CC2500_SRES);
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delayMilliseconds(1);
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CC2500_SetTxRxMode(TXRX_OFF);
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return CC2500_ReadReg(CC2500_0E_FREQ1) == 0xC4;//check if reset
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}
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/*
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static void CC2500_SetPower_Value(uint8_t power)
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{
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const unsigned char patable[8]= {
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0xC5, // -12dbm
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0x97, // -10dbm
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0x6E, // -8dbm
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0x7F, // -6dbm
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0xA9, // -4dbm
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0xBB, // -2dbm
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0xFE, // 0dbm
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0xFF // 1.5dbm
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};
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if (power > 7)
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power = 7;
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CC2500_WriteReg(CC2500_3E_PATABLE, patable[power]);
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}
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*/
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void CC2500_SetPower()
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{
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uint8_t power=CC2500_BIND_POWER;
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if(IS_BIND_DONE)
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#ifdef CC2500_ENABLE_LOW_POWER
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power=IS_POWER_FLAG_on?CC2500_HIGH_POWER:CC2500_LOW_POWER;
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#else
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power=CC2500_HIGH_POWER;
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#endif
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if(IS_LBT_POWER_on)
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{
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power=CC2500_LBT_POWER;
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LBT_POWER_off; // Only accept once
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}
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if(IS_RANGE_FLAG_on)
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power=CC2500_RANGE_POWER;
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if(prev_power != power)
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{
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CC2500_WriteReg(CC2500_3E_PATABLE, power);
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prev_power=power;
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}
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}
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void __attribute__((unused)) CC2500_SetFreqOffset()
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{
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if(prev_option != option)
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{
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prev_option = option;
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option);
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}
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}
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void __attribute__((unused)) CC2500_250K_Init()
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{
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CC2500_Strobe(CC2500_SIDLE);
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// Address Config = No address check
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// Base Frequency = 2400
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// CRC Autoflush = false
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// CRC Enable = false
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// Channel Spacing = 333.251953
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// Data Format = Normal mode
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// Data Rate = 249.939
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// Deviation = 126.953125
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// Device Address = 0
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// Manchester Enable = false
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// Modulated = true
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// Modulation Format = GFSK
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// Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word
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// RX Filter BW = 203.125000
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// Sync Word Qualifier Mode = No preamble/sync
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// TX Power = 0
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// Whitening = false
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// Fast Frequency Hopping - no PLL auto calibration
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/* //Previous config
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01); // Packet Automation Control
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // Frequency Control Word, High Byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // Frequency Control Word, Middle Byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xC3); // Frequency Control Word, Low Byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x8D); // Modem Configuration
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x3B); // Modem Configuration
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // Modem Configuration
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // Modem Configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x62); // Modem Deviation Setting
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x1C); // Bit Synchronization Configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0xC7); // AGC Control
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x00); // AGC Control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0xB0); // AGC Control
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CC2500_WriteReg(CC2500_21_FREND1, 0xB6); // Front End RX Configuration
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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*/
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // Packet Automation Control, address check true auto append RSSI & LQI
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x00); // Packet Automation Control, fixed packet len
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control (IF Frequency)
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CC2500_WriteReg(CC2500_0C_FSCTRL0, 0x00); // Frequency Synthesizer Control
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // Frequency Control Word, High Byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // Frequency Control Word, Middle Byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xC5); // Frequency Control Word, Low Byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x3D); // Modem Configuration Set to 406kHz BW filter
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x3B); // Modem Configuration
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration, GFSK, no preambule and no sync word -> TX by default
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x03); // Modem Configuration, 2 bytes of preamble
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // Modem Configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x62); // Modem Deviation Setting
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x1C); // Bit Synchronization Configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0xC7); // AGC Control
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x00); // AGC Control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0xB0); // AGC Control
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CC2500_WriteReg(CC2500_21_FREND1, 0xB6); // Front End RX Configuration
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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//Prep RX
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// Set first 3 bytes of rx addr in [0]->SYNC1, [1]->SYNC0 and [2]->ADDR
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// CC2500_WriteReg(CC2500_04_SYNC1, [0]); // Sync word, high byte
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// CC2500_WriteReg(CC2500_05_SYNC0, [1]); // Sync word, low byte
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// CC2500_WriteReg(CC2500_09_ADDR, [2]); // Set addr
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//RX
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// CC2500_WriteReg(CC2500_12_MDMCFG2, 0x12); // Modem Configuration, GFSK, 16/16 Sync Word TX&RX
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//TX
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// CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration, GFSK, no preambule and no sync word
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// need to set packet length before sending/receiving
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// CC2500_WriteReg(CC2500_06_PKTLEN, cc2500_packet_len); // Packet len, fix packet len
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CC2500_SetTxRxMode(TX_EN);
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CC2500_SetPower();
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}
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void __attribute__((unused)) CC2500_250K_HoppingCalib(uint8_t num_freq)
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{
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for (uint8_t i = 0; i < num_freq; i++)
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{
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CC2500_Strobe(CC2500_SIDLE);
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// spacing is 333.25 kHz, must multiply channel by 3
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[i]*3);
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// calibrate
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CC2500_Strobe(CC2500_SCAL);
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delayMicroseconds(900);
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calData[i]=CC2500_ReadReg(CC2500_25_FSCAL1);
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}
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}
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void __attribute__((unused)) CC2500_250K_Hopping(uint8_t index)
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{
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// spacing is 333.25 kHz, must multiply channel by 3
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[index] * 3);
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// set PLL calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, calData[index]);
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}
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void __attribute__((unused)) CC2500_250K_RFChannel(uint8_t number)
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{
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CC2500_Strobe(CC2500_SIDLE);
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// spacing is 333.25 kHz, must multiply channel by 3
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CC2500_WriteReg(CC2500_0A_CHANNR, number*3);
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// calibrate
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CC2500_Strobe(CC2500_SCAL);
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delayMicroseconds(900);
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}
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#endif |