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No commits in common. "af87b0f6d16ab042fb3c1f5a101aee00e4fd3272" and "a3ef2b94d43c626c8cadaab26e34dc508911969a" have entirely different histories.

4 changed files with 43 additions and 83 deletions

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@ -169,7 +169,7 @@ uint16_t SGF22_callback()
} }
else else
{//send 3 times in total the same packet {//send 3 times in total the same packet
XN297_ReSendPayload(); NRF24L01_Strobe(REUSE_TX_PL);
phase++; phase++;
if(phase > 2) if(phase > 2)
{ {

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@ -12,8 +12,6 @@ Multiprotocol is distributed in the hope that it will be useful,
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>. along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
*/ */
//Models: UDIRC UD160x(PRO), Pinecone Models SG-160x, Eachine EAT15
#if defined(UDIRC_CCNRF_INO) #if defined(UDIRC_CCNRF_INO)
#include "iface_xn297.h" #include "iface_xn297.h"
@ -22,15 +20,12 @@ Multiprotocol is distributed in the hope that it will be useful,
#define UDIRC_PAYLOAD_SIZE 15 #define UDIRC_PAYLOAD_SIZE 15
#define UDIRC_RF_NUM_CHANNELS 4 #define UDIRC_RF_NUM_CHANNELS 4
#define UDIRC_PACKET_PERIOD 21000 #define UDIRC_PACKET_PERIOD 8000
#define UDIRC_BIND_COUNT 2000 #define UDIRC_BIND_COUNT 2000
#define UDIRC_P1_P2_TIME 5000
#define UDIRC_WRITE_TIME 1500 #define UDIRC_WRITE_TIME 1500
enum { enum {
UDIRC_DATA1=0, UDIRC_DATA=0,
UDIRC_DATA2,
UDIRC_DATA3,
UDIRC_RX, UDIRC_RX,
}; };
@ -55,7 +50,6 @@ static void __attribute__((unused)) UDIRC_send_packet()
} }
else else
{//Switch to normal {//Switch to normal
rf_ch_num = 1;
BIND_DONE; BIND_DONE;
XN297_SetTXAddr(rx_tx_addr, 5); XN297_SetTXAddr(rx_tx_addr, 5);
XN297_SetRXAddr(rx_tx_addr, UDIRC_PAYLOAD_SIZE); XN297_SetRXAddr(rx_tx_addr, UDIRC_PAYLOAD_SIZE);
@ -64,20 +58,21 @@ static void __attribute__((unused)) UDIRC_send_packet()
if(!bind_counter) if(!bind_counter)
{//Normal {//Normal
packet[0] = 0x08; packet[0] = 0x08;
//Channels SG-16xx: ST/TH/CH4 /CH3 /UNK/UNK/UNK/UNK/GYRO/ST_TRIM/ST_DR packet[1] = convert_channel_16b_limit(AILERON,0,200); //ST
//Channels EAT15 : ST/TH/RATE/LIGHT/UNK/UNK/UNK/UNK/GYRO/ST_TRIM/ST_DR packet[2] = convert_channel_16b_limit(THROTTLE,0,200); //TH
for(uint8_t i=0; i<12; i++) packet[3] = convert_channel_16b_limit(ELEVATOR,0,200); //CH4
packet[i+1] = convert_channel_16b_limit(i,0,200); packet[4] = convert_channel_16b_limit(RUDDER,0,200); //CH3
//Just for now let's set the additional channels to 0
packet[5] = packet[6] = packet[7] = packet[8] = 0;
} }
packet[12] = GET_FLAG(CH12_SW, 0x40) //TH.REV //packet[5/6..8] = 00 unknown
|GET_FLAG(CH13_SW, 0x80); //ST.REV packet[9] = convert_channel_16b_limit(CH5,0,200); //ESP
//packet[13] = 00; //Unknown, future flags? packet[10] = convert_channel_16b_limit(CH6,0,200); //ST_TRIM
packet[11] = convert_channel_16b_limit(CH7,0,200); //ST_DR
packet[12] = GET_FLAG(CH8_SW, 0x40) //TH.REV
|GET_FLAG(CH9_SW, 0x80); //ST.REV
//packet[13] = 00 unknown
for(uint8_t i=0;i<UDIRC_PAYLOAD_SIZE-1;i++) for(uint8_t i=0;i<UDIRC_PAYLOAD_SIZE-1;i++)
packet[14] += packet[i]; packet[14] += packet[i];
// Send // Send
XN297_SetFreqOffset();
XN297_SetPower(); XN297_SetPower();
XN297_SetTxRxMode(TX_EN); XN297_SetTxRxMode(TX_EN);
XN297_WriteEnhancedPayload(packet, UDIRC_PAYLOAD_SIZE,false); XN297_WriteEnhancedPayload(packet, UDIRC_PAYLOAD_SIZE,false);
@ -91,22 +86,11 @@ static void __attribute__((unused)) UDIRC_send_packet()
static void __attribute__((unused)) UDIRC_initialize_txid() static void __attribute__((unused)) UDIRC_initialize_txid()
{ {
#ifdef FORCE_UDIRC_ORIGINAL_ID #ifdef FORCE_UDIRC_ORIGINAL_ID
if(RX_num) rx_tx_addr[0] = 0xD0;
{ rx_tx_addr[1] = 0x06;
rx_tx_addr[0] = 0xD0; rx_tx_addr[2] = 0x00;
rx_tx_addr[1] = 0x06; rx_tx_addr[3] = 0x00;
rx_tx_addr[2] = 0x00; rx_tx_addr[4] = 0x81;
rx_tx_addr[3] = 0x00;
rx_tx_addr[4] = 0x81;
}
else
{
rx_tx_addr[0] = 0xF6;
rx_tx_addr[1] = 0x96;
rx_tx_addr[2] = 0x01;
rx_tx_addr[3] = 0x00;
rx_tx_addr[4] = 0x81;
}
hopping_frequency[0] = 45; hopping_frequency[0] = 45;
hopping_frequency[1] = 59; hopping_frequency[1] = 59;
hopping_frequency[2] = 52; hopping_frequency[2] = 52;
@ -128,7 +112,7 @@ uint16_t UDIRC_callback()
bool rx; bool rx;
switch(phase) switch(phase)
{ {
case UDIRC_DATA1: case UDIRC_DATA:
rx = XN297_IsRX(); rx = XN297_IsRX();
XN297_SetTxRxMode(TXRX_OFF); XN297_SetTxRxMode(TXRX_OFF);
#ifdef MULTI_SYNC #ifdef MULTI_SYNC
@ -138,25 +122,26 @@ uint16_t UDIRC_callback()
if(rx) if(rx)
{ {
uint8_t val=XN297_ReadEnhancedPayload(packet_in, UDIRC_PAYLOAD_SIZE); uint8_t val=XN297_ReadEnhancedPayload(packet_in, UDIRC_PAYLOAD_SIZE);
debug("RX(%d):",val); debug("RX %d",val);
if(val != 255) if(val==0)
{ {
rf_ch_num = 1; rf_ch_num = 1;
if(bind_counter) if(bind_counter)
bind_counter=1; bind_counter=1;
}
else
{
#ifdef DEBUG_SERIAL #ifdef DEBUG_SERIAL
for(uint8_t i=0; i < UDIRC_PAYLOAD_SIZE; i++) for(uint8_t i=0; i < UDIRC_PAYLOAD_SIZE; i++)
debug(" %02X", packet_in[i]); debug(" %02X", packet_in[i]);
debugln();
#endif #endif
} }
//else
// debug(" NOK");
debugln(""); debugln("");
} }
phase++; phase++;
return UDIRC_P1_P2_TIME;
case UDIRC_DATA2:
//Resend packet
XN297_ReSendPayload();
phase++;
return UDIRC_WRITE_TIME; return UDIRC_WRITE_TIME;
default: //UDIRC_RX default: //UDIRC_RX
//Wait for the packet transmission to finish //Wait for the packet transmission to finish
@ -164,8 +149,8 @@ uint16_t UDIRC_callback()
//Switch to RX //Switch to RX
XN297_SetTxRxMode(TXRX_OFF); XN297_SetTxRxMode(TXRX_OFF);
XN297_SetTxRxMode(RX_EN); XN297_SetTxRxMode(RX_EN);
phase = UDIRC_DATA1; phase = UDIRC_DATA;
return UDIRC_PACKET_PERIOD - UDIRC_P1_P2_TIME - UDIRC_WRITE_TIME; return UDIRC_PACKET_PERIOD - UDIRC_WRITE_TIME;
} }
return 0; return 0;
} }
@ -176,7 +161,7 @@ void UDIRC_init()
UDIRC_RF_init(); UDIRC_RF_init();
bind_counter = IS_BIND_IN_PROGRESS ? UDIRC_BIND_COUNT : 1; bind_counter = IS_BIND_IN_PROGRESS ? UDIRC_BIND_COUNT : 1;
phase = UDIRC_DATA1; phase = UDIRC_DATA;
hopping_frequency_no = 0; hopping_frequency_no = 0;
rf_ch_num = 0; rf_ch_num = 0;
} }

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@ -207,27 +207,6 @@ static void __attribute__((unused)) XN297_SetTxRxMode(enum TXRX_State mode)
#endif #endif
} }
#ifdef CC2500_INSTALLED
uint8_t XN297_Buffer[32];
uint8_t XN297_Buffer_Len = 0;
static void __attribute__((unused)) XN297_SendCC2500Payload()
{
// stop TX/RX
CC2500_Strobe(CC2500_SIDLE);
// flush tx FIFO
CC2500_Strobe(CC2500_SFTX);
// packet length
CC2500_WriteReg(CC2500_06_PKTLEN, XN297_Buffer_Len + 4); // Packet len, fix packet len
// xn297L preamble
CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, (uint8_t*)"\x0C\x71\x0F\x55", 4);
// xn297 packet
CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, XN297_Buffer, XN297_Buffer_Len);
// transmit
CC2500_Strobe(CC2500_STX);
}
#endif
static void __attribute__((unused)) XN297_SendPayload(uint8_t* msg, uint8_t len) static void __attribute__((unused)) XN297_SendPayload(uint8_t* msg, uint8_t len)
{ {
#ifdef NRF24L01_INSTALLED #ifdef NRF24L01_INSTALLED
@ -241,25 +220,22 @@ static void __attribute__((unused)) XN297_SendPayload(uint8_t* msg, uint8_t len)
#ifdef CC2500_INSTALLED #ifdef CC2500_INSTALLED
if(xn297_rf == XN297_CC2500) if(xn297_rf == XN297_CC2500)
{ {
memcpy(XN297_Buffer, msg, len); // stop TX/RX
XN297_Buffer_Len = len; CC2500_Strobe(CC2500_SIDLE);
XN297_SendCC2500Payload(); // flush tx FIFO
CC2500_Strobe(CC2500_SFTX);
// packet length
CC2500_WriteReg(CC2500_06_PKTLEN, len + 4); // Packet len, fix packet len
// xn297L preamble
CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, (uint8_t*)"\x0C\x71\x0F\x55", 4);
// xn297 packet
CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, msg, len);
// transmit
CC2500_Strobe(CC2500_STX);
} }
#endif #endif
} }
static void __attribute__((unused)) XN297_ReSendPayload()
{
#ifdef NRF24L01_INSTALLED
if(xn297_rf == XN297_NRF)
NRF24L01_Strobe(NRF24L01_E3_REUSE_TX_PL);
#endif
#ifdef CC2500_INSTALLED
if(xn297_rf == XN297_CC2500)
XN297_SendCC2500Payload();
#endif
}
static void __attribute__((unused)) XN297_WritePayload(uint8_t* msg, uint8_t len) static void __attribute__((unused)) XN297_WritePayload(uint8_t* msg, uint8_t len)
{ {
uint8_t buf[32]; uint8_t buf[32];

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@ -28,7 +28,6 @@ static void __attribute__((unused)) XN297_SetTXAddr(const uint8_t*, uint8_t);
static void __attribute__((unused)) XN297_SetRXAddr(const uint8_t*, uint8_t); static void __attribute__((unused)) XN297_SetRXAddr(const uint8_t*, uint8_t);
static void __attribute__((unused)) XN297_SetTxRxMode(enum TXRX_State); static void __attribute__((unused)) XN297_SetTxRxMode(enum TXRX_State);
static void __attribute__((unused)) XN297_SendPayload(uint8_t*, uint8_t); static void __attribute__((unused)) XN297_SendPayload(uint8_t*, uint8_t);
static void __attribute__((unused)) XN297_ReSendPayload();
static void __attribute__((unused)) XN297_WritePayload(uint8_t*, uint8_t); static void __attribute__((unused)) XN297_WritePayload(uint8_t*, uint8_t);
static void __attribute__((unused)) XN297_WriteEnhancedPayload(uint8_t*, uint8_t, uint8_t); static void __attribute__((unused)) XN297_WriteEnhancedPayload(uint8_t*, uint8_t, uint8_t);
static bool __attribute__((unused)) XN297_IsRX(); static bool __attribute__((unused)) XN297_IsRX();