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44 Commits

Author SHA1 Message Date
pascallanger
d96ba9fa46 Flysky Flash space optimization 2016-09-04 16:49:00 +02:00
pascallanger
2261d655ea DEVO/J6pro Flash space optimization 2016-09-04 16:49:00 +02:00
pascallanger
8b67049863 Added NRF24L01_ReadPayloadLength 2016-09-04 16:49:00 +02:00
pascallanger
48258dd9dd Renamed FrSky protocols 2016-09-03 11:57:40 +02:00
pascallanger
e04c573726 Renamed FrSky protocols 2016-09-03 11:56:39 +02:00
pascallanger
4daec3794e Renamed FrSky protocols to match with receivers 2016-09-03 11:49:25 +02:00
pascallanger
f0646dde32 FrSky1 Fix 2016-09-03 10:12:30 +02:00
pascallanger
ec2086e0f7 Fixed invert serial compilation 2016-09-01 20:12:17 +02:00
pascallanger
2ac704178c FRSKY1 2016-09-01 18:12:35 +02:00
pascallanger
7c43c38e28 FRSKY1 2016-09-01 18:09:35 +02:00
pascallanger
043a8336e5 Code cleaning (XMEGA) 2016-09-01 17:41:38 +02:00
pascallanger
ee27535b82 Update README.md 2016-09-01 14:42:56 +02:00
pascallanger
89e6ae2475 Update Protocols_Details.md 2016-09-01 14:40:17 +02:00
pascallanger
e51615f520 DSM2 renamed to DSM 2016-09-01 14:00:49 +02:00
pascallanger
6e59897587 Update Protocols_Details.md 2016-09-01 13:53:48 +02:00
pascallanger
bd0644a261 Update Protocols_Details.md 2016-09-01 13:53:10 +02:00
pascallanger
d7825e1bf8 Update README.md 2016-09-01 13:47:42 +02:00
pascallanger
97956b6c5e FrSky1 CRC messed up... 2016-09-01 13:42:33 +02:00
pascallanger
8150504ea0 NRF CE 2016-09-01 13:05:56 +02:00
pascallanger
942dec81c7 Typo 2016-09-01 08:08:00 +02:00
pascallanger
dcbc377c62 FrSky1 optim 2016-08-31 15:54:24 +02:00
pascallanger
7b65233699 FrSky 1way protocol + cosmetic 2016-08-31 15:43:45 +02:00
pascallanger
eabfd8b5c4 Important changes of the scheduler and interrupts 2016-08-31 10:26:27 +02:00
pascallanger
b7b2799611 FrSky option applied live 2016-08-31 10:22:36 +02:00
pascallanger
ece59ac374 FrSky ppm option value default 40 2016-08-31 10:20:56 +02:00
pascallanger
83cc8b772c Merge branch 'master' of https://github.com/pascallanger/DIY-Multiprotocol-TX-Module 2016-08-31 10:19:59 +02:00
pascallanger
8b5bc18142 YD717 4-in-1 V2 compatibility 2016-08-31 10:19:55 +02:00
pascallanger
e1413baa9a Update Protocols_Details.md 2016-08-30 23:30:18 +02:00
pascallanger
03640e6d37 Changed update_serial_data 2016-08-29 17:32:21 +02:00
pascallanger
2588011524 Orange DSM module update 2016-08-29 09:51:34 +02:00
pascallanger
0c16a6804a E010 2016-08-29 08:29:57 +02:00
pascallanger
e2021fdf5d Update README.md 2016-08-29 08:24:52 +02:00
pascallanger
33b5694d35 MJXQ/E010 mod 2016-08-29 08:23:17 +02:00
pascallanger
af7d04fef6 Added E010 2016-08-28 14:05:21 +02:00
pascallanger
14e3419e4c Added MJXQ / E010 2016-08-28 14:03:22 +02:00
pascallanger
f6c5252376 DEVO PPM fixed id mode 2016-08-27 11:38:07 +02:00
pascallanger
78ee77444f Update README.md 2016-08-27 08:26:05 +02:00
pascallanger
fb022970b5 Update Protocols_Details.md 2016-08-26 21:02:50 +02:00
pascallanger
e5d378dc93 Update Protocols_Details.md 2016-08-26 18:46:03 +02:00
pascallanger
5969902263 MJXQ fix 2016-08-26 17:21:21 +02:00
pascallanger
d5894de142 Merge branch 'master' of https://github.com/pascallanger/DIY-Multiprotocol-TX-Module 2016-08-26 16:18:58 +02:00
pascallanger
059c6baa4e FrSkyX/SFHSS rfcal & second channel ASSAN 2016-08-26 16:18:50 +02:00
pascallanger
bbf9331baf Update README.md 2016-08-26 10:56:27 +02:00
pascallanger
a5b084f506 Update README.md 2016-08-26 10:55:13 +02:00
21 changed files with 1161 additions and 914 deletions

View File

@@ -23,12 +23,12 @@
void A7105_WriteData(uint8_t len, uint8_t channel)
{
uint8_t i;
CS_off;
A7105_CS_off;
SPI_Write(A7105_RST_WRPTR);
SPI_Write(0x05);
for (i = 0; i < len; i++)
SPI_Write(packet[i]);
CS_on;
A7105_CS_on;
A7105_WriteReg(0x0F, channel);
A7105_Strobe(A7105_TX);
}
@@ -36,27 +36,27 @@ void A7105_WriteData(uint8_t len, uint8_t channel)
void A7105_ReadData() {
uint8_t i;
A7105_Strobe(0xF0); //A7105_RST_RDPTR
CS_off;
A7105_CS_off;
SPI_Write(0x45);
for (i=0;i<16;i++)
packet[i]=A7105_Read();
CS_on;
A7105_CS_on;
}
void A7105_WriteReg(uint8_t address, uint8_t data) {
CS_off;
A7105_CS_off;
SPI_Write(address);
NOP();
SPI_Write(data);
CS_on;
A7105_CS_on;
}
uint8_t A7105_ReadReg(uint8_t address) {
uint8_t result;
CS_off;
A7105_CS_off;
SPI_Write(address |=0x40); //bit 6 =1 for reading
result = A7105_Read();
CS_on;
A7105_CS_on;
return(result);
}
@@ -110,13 +110,13 @@ uint8_t A7105_Reset()
}
void A7105_WriteID(uint32_t ida) {
CS_off;
A7105_CS_off;
SPI_Write(0x06);//ex id=0x5475c52a ;txid3txid2txid1txid0
SPI_Write((ida>>24)&0xff);//53
SPI_Write((ida>>16)&0xff);//75
SPI_Write((ida>>8)&0xff);//c5
SPI_Write((ida>>0)&0xff);//2a
CS_on;
A7105_CS_on;
}
/*
@@ -162,9 +162,9 @@ void A7105_SetPower()
}
void A7105_Strobe(uint8_t address) {
CS_off;
A7105_CS_off;
SPI_Write(address);
CS_on;
A7105_CS_on;
}
const uint8_t PROGMEM HUBSAN_A7105_regs[] = {

View File

@@ -140,7 +140,7 @@ static void __attribute__((unused)) ASSAN_initialize_txid()
packet[21]=0xFA;
packet[20]=0x53; */
// Using packet[20..23] to store the ID1 and packet[24..27] to store the ID2
uint8_t freq=0;
uint8_t freq=0,freq2;
for(uint8_t i=0;i<4;i++)
{
uint8_t temp=rx_tx_addr[0];
@@ -153,9 +153,15 @@ static void __attribute__((unused)) ASSAN_initialize_txid()
freq=((freq%25)+2)<<1;
if(freq&0x02) freq|=0x01;
hopping_frequency[0]=freq;
// Alternate frequency
hopping_frequency[1]=freq*2-6;
hopping_frequency[1]+=analogRead(A6)%12; // Add some random to the second channel
// Alternate frequency has some random
do
{
randomSeed((uint32_t)analogRead(A6) << 10 | analogRead(A7));
freq2=random(0xfefefefe)%9;
freq2+=freq*2-5;
}
while( (freq2>118) || (freq2<freq+1) || (freq2==2*freq) );
hopping_frequency[1]=freq2; // Add some random to the second channel
}
uint16_t initASSAN()

View File

@@ -258,3 +258,37 @@ void CYRF_FindBestChannels(uint8_t *channels, uint8_t len, uint8_t minspace, uin
}
CYRF_SetTxRxMode(TX_EN);
}
#if defined(DEVO_CYRF6936_INO) || defined(J6PRO_CYRF6936_INO)
const uint8_t PROGMEM DEVO_j6pro_sopcodes[][8] = {
/* Note these are in order transmitted (LSB 1st) */
{0x3C, 0x37, 0xCC, 0x91, 0xE2, 0xF8, 0xCC, 0x91},
{0x9B, 0xC5, 0xA1, 0x0F, 0xAD, 0x39, 0xA2, 0x0F},
{0xEF, 0x64, 0xB0, 0x2A, 0xD2, 0x8F, 0xB1, 0x2A},
{0x66, 0xCD, 0x7C, 0x50, 0xDD, 0x26, 0x7C, 0x50},
{0x5C, 0xE1, 0xF6, 0x44, 0xAD, 0x16, 0xF6, 0x44},
{0x5A, 0xCC, 0xAE, 0x46, 0xB6, 0x31, 0xAE, 0x46},
{0xA1, 0x78, 0xDC, 0x3C, 0x9E, 0x82, 0xDC, 0x3C},
{0xB9, 0x8E, 0x19, 0x74, 0x6F, 0x65, 0x18, 0x74},
{0xDF, 0xB1, 0xC0, 0x49, 0x62, 0xDF, 0xC1, 0x49},
{0x97, 0xE5, 0x14, 0x72, 0x7F, 0x1A, 0x14, 0x72},
#if defined(J6PRO_CYRF6936_INO)
{0x82, 0xC7, 0x90, 0x36, 0x21, 0x03, 0xFF, 0x17},
{0xE2, 0xF8, 0xCC, 0x91, 0x3C, 0x37, 0xCC, 0x91}, //Note: the '03' was '9E' in the Cypress recommended table
{0xAD, 0x39, 0xA2, 0x0F, 0x9B, 0xC5, 0xA1, 0x0F}, //The following are the same as the 1st 8 above,
{0xD2, 0x8F, 0xB1, 0x2A, 0xEF, 0x64, 0xB0, 0x2A}, //but with the upper and lower word swapped
{0xDD, 0x26, 0x7C, 0x50, 0x66, 0xCD, 0x7C, 0x50},
{0xAD, 0x16, 0xF6, 0x44, 0x5C, 0xE1, 0xF6, 0x44},
{0xB6, 0x31, 0xAE, 0x46, 0x5A, 0xCC, 0xAE, 0x46},
{0x9E, 0x82, 0xDC, 0x3C, 0xA1, 0x78, 0xDC, 0x3C},
{0x6F, 0x65, 0x18, 0x74, 0xB9, 0x8E, 0x19, 0x74},
#endif
};
#endif
static void __attribute__((unused)) CYRF_PROGMEM_ConfigSOPCode(const uint8_t *data)
{
uint8_t code[8];
for(uint8_t i=0;i<8;i++)
code[i]=pgm_read_byte_near(&data[i]);
CYRF_ConfigSOPCode(code);
}

View File

@@ -13,7 +13,7 @@
along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
*/
#if defined(DSM2_CYRF6936_INO)
#if defined(DSM_CYRF6936_INO)
#include "iface_cyrf6936.h"
@@ -408,7 +408,7 @@ static void __attribute__((unused)) calc_dsmx_channel()
}
}
uint16_t ReadDsm2()
uint16_t ReadDsm()
{
#define DSM_CH1_CH2_DELAY 4010 // Time between write of channel 1 and channel 2
#define DSM_WRITE_DELAY 1550 // Time after write to verify write complete
@@ -536,7 +536,7 @@ uint16_t ReadDsm2()
return 0;
}
uint16_t initDsm2()
uint16_t initDsm()
{
CYRF_Reset();
CYRF_GetMfgData(cyrfmfg_id);//

View File

@@ -43,28 +43,6 @@ enum {
DEVO_BOUND_10,
};
const uint8_t PROGMEM DEVO_sopcodes[][8] = {
/* Note these are in order transmitted (LSB 1st) */
/* 0 */ {0x3C,0x37,0xCC,0x91,0xE2,0xF8,0xCC,0x91}, //0x91CCF8E291CC373C
/* 1 */ {0x9B,0xC5,0xA1,0x0F,0xAD,0x39,0xA2,0x0F}, //0x0FA239AD0FA1C59B
/* 2 */ {0xEF,0x64,0xB0,0x2A,0xD2,0x8F,0xB1,0x2A}, //0x2AB18FD22AB064EF
/* 3 */ {0x66,0xCD,0x7C,0x50,0xDD,0x26,0x7C,0x50}, //0x507C26DD507CCD66
/* 4 */ {0x5C,0xE1,0xF6,0x44,0xAD,0x16,0xF6,0x44}, //0x44F616AD44F6E15C
/* 5 */ {0x5A,0xCC,0xAE,0x46,0xB6,0x31,0xAE,0x46}, //0x46AE31B646AECC5A
/* 6 */ {0xA1,0x78,0xDC,0x3C,0x9E,0x82,0xDC,0x3C}, //0x3CDC829E3CDC78A1
/* 7 */ {0xB9,0x8E,0x19,0x74,0x6F,0x65,0x18,0x74}, //0x7418656F74198EB9
/* 8 */ {0xDF,0xB1,0xC0,0x49,0x62,0xDF,0xC1,0x49}, //0x49C1DF6249C0B1DF
/* 9 */ {0x97,0xE5,0x14,0x72,0x7F,0x1A,0x14,0x72}, //0x72141A7F7214E597
};
static void __attribute__((unused)) DEVO_ConfigSOPCode(uint8_t val)
{
uint8_t code[8];
for(uint8_t i=0;i<8;i++)
code[i]=pgm_read_byte_near(&DEVO_sopcodes[val][i]);
CYRF_ConfigSOPCode(code);
}
static void __attribute__((unused)) DEVO_scramble_pkt()
{
#ifdef NO_SCRAMBLE
@@ -78,7 +56,20 @@ static void __attribute__((unused)) DEVO_scramble_pkt()
static void __attribute__((unused)) DEVO_add_pkt_suffix()
{
uint8_t bind_state;
if(prev_option!=option)
#ifdef ENABLE_PPM
if(mode_select && option==0 && IS_BIND_DONE_on) //PPM mode and option not already set and bind is finished
{
BIND_SET_INPUT;
BIND_SET_PULLUP; // set pullup
if(IS_BIND_BUTTON_on)
{
eeprom_write_byte((uint8_t*)(30+mode_select),0x01); // Set fixed id mode for the current model
option=1;
}
BIND_SET_OUTPUT;
}
#endif //ENABLE_PPM
if(prev_option!=option && IS_BIND_DONE_on)
{
MProtocol_id = RX_num + MProtocol_id_master;
bind_counter=DEVO_BIND_COUNT;
@@ -168,7 +159,7 @@ static void __attribute__((unused)) DEVO_cyrf_set_bound_sop_code()
uint8_t sopidx = (0xff &((cyrfmfg_id[0] << 2) + cyrfmfg_id[1] + cyrfmfg_id[2])) % 10;
CYRF_SetTxRxMode(TX_EN);
CYRF_ConfigCRCSeed((crc << 8) + crc);
DEVO_ConfigSOPCode(sopidx);
CYRF_PROGMEM_ConfigSOPCode(DEVO_j6pro_sopcodes[sopidx]);
CYRF_SetPower(0x08);
}
@@ -300,7 +291,7 @@ uint16_t DevoInit()
CYRF_GetMfgData(cyrfmfg_id);
CYRF_SetTxRxMode(TX_EN);
CYRF_ConfigCRCSeed(0x0000);
DEVO_ConfigSOPCode(0);
CYRF_PROGMEM_ConfigSOPCode(DEVO_j6pro_sopcodes[0]);
DEVO_set_radio_channels();
hopping_frequency_ptr = hopping_frequency;

View File

@@ -50,10 +50,6 @@ enum {
FLAG_V912_BTMBTN= 0x80,
};
uint8_t chanrow;
uint8_t chancol;
uint8_t chanoffset;
const uint8_t PROGMEM V912_X17_SEQ[10] = { 0x14, 0x31, 0x40, 0x49, 0x49, // sometime first byte is 0x15 ?
0x49, 0x49, 0x49, 0x49, 0x49, };
@@ -151,25 +147,6 @@ static void __attribute__((unused)) flysky_build_packet(uint8_t init)
flysky_apply_extension_flags();
}
const uint8_t PROGMEM tx_channels[16][16] = {
{0x0a, 0x5a, 0x14, 0x64, 0x1e, 0x6e, 0x28, 0x78, 0x32, 0x82, 0x3c, 0x8c, 0x46, 0x96, 0x50, 0xa0},
{0xa0, 0x50, 0x96, 0x46, 0x8c, 0x3c, 0x82, 0x32, 0x78, 0x28, 0x6e, 0x1e, 0x64, 0x14, 0x5a, 0x0a},
{0x0a, 0x5a, 0x50, 0xa0, 0x14, 0x64, 0x46, 0x96, 0x1e, 0x6e, 0x3c, 0x8c, 0x28, 0x78, 0x32, 0x82},
{0x82, 0x32, 0x78, 0x28, 0x8c, 0x3c, 0x6e, 0x1e, 0x96, 0x46, 0x64, 0x14, 0xa0, 0x50, 0x5a, 0x0a},
{0x28, 0x78, 0x0a, 0x5a, 0x50, 0xa0, 0x14, 0x64, 0x1e, 0x6e, 0x3c, 0x8c, 0x32, 0x82, 0x46, 0x96},
{0x96, 0x46, 0x82, 0x32, 0x8c, 0x3c, 0x6e, 0x1e, 0x64, 0x14, 0xa0, 0x50, 0x5a, 0x0a, 0x78, 0x28},
{0x50, 0xa0, 0x28, 0x78, 0x0a, 0x5a, 0x1e, 0x6e, 0x3c, 0x8c, 0x32, 0x82, 0x46, 0x96, 0x14, 0x64},
{0x64, 0x14, 0x96, 0x46, 0x82, 0x32, 0x8c, 0x3c, 0x6e, 0x1e, 0x5a, 0x0a, 0x78, 0x28, 0xa0, 0x50},
{0x50, 0xa0, 0x46, 0x96, 0x3c, 0x8c, 0x28, 0x78, 0x0a, 0x5a, 0x32, 0x82, 0x1e, 0x6e, 0x14, 0x64},
{0x64, 0x14, 0x6e, 0x1e, 0x82, 0x32, 0x5a, 0x0a, 0x78, 0x28, 0x8c, 0x3c, 0x96, 0x46, 0xa0, 0x50},
{0x46, 0x96, 0x3c, 0x8c, 0x50, 0xa0, 0x28, 0x78, 0x0a, 0x5a, 0x1e, 0x6e, 0x32, 0x82, 0x14, 0x64},
{0x64, 0x14, 0x82, 0x32, 0x6e, 0x1e, 0x5a, 0x0a, 0x78, 0x28, 0xa0, 0x50, 0x8c, 0x3c, 0x96, 0x46},
{0x46, 0x96, 0x0a, 0x5a, 0x3c, 0x8c, 0x14, 0x64, 0x50, 0xa0, 0x28, 0x78, 0x1e, 0x6e, 0x32, 0x82},
{0x82, 0x32, 0x6e, 0x1e, 0x78, 0x28, 0xa0, 0x50, 0x64, 0x14, 0x8c, 0x3c, 0x5a, 0x0a, 0x96, 0x46},
{0x46, 0x96, 0x0a, 0x5a, 0x50, 0xa0, 0x3c, 0x8c, 0x28, 0x78, 0x1e, 0x6e, 0x32, 0x82, 0x14, 0x64},
{0x64, 0x14, 0x82, 0x32, 0x6e, 0x1e, 0x78, 0x28, 0x8c, 0x3c, 0xa0, 0x50, 0x5a, 0x0a, 0x96, 0x46},
};
uint16_t ReadFlySky()
{
if (bind_counter)
@@ -183,28 +160,56 @@ uint16_t ReadFlySky()
else
{
flysky_build_packet(0);
A7105_WriteData(21, pgm_read_byte_near(&tx_channels[chanrow][chancol])-chanoffset);
chancol = (chancol + 1) % 16;
if (! chancol) //Keep transmit power updated
A7105_SetPower();
A7105_WriteData(21, hopping_frequency[hopping_frequency_no]);
hopping_frequency_no = (hopping_frequency_no + 1) & 0x0F;
A7105_SetPower();
}
return 1510; //1460 on deviation but not working with the latest V911 bricks... Turnigy 9X v2 is 1533, Flysky TX for 9XR/9XR Pro is 1510, V911 TX is 1490.
}
uint16_t initFlySky() {
const uint8_t PROGMEM tx_channels[8][4] = {
{ 0x12, 0x34, 0x56, 0x78},
{ 0x18, 0x27, 0x36, 0x45},
{ 0x41, 0x82, 0x36, 0x57},
{ 0x84, 0x13, 0x65, 0x72},
{ 0x87, 0x64, 0x15, 0x32},
{ 0x76, 0x84, 0x13, 0x52},
{ 0x71, 0x62, 0x84, 0x35},
{ 0x71, 0x86, 0x43, 0x52}
};
uint16_t initFlySky()
{
uint8_t chanrow;
uint8_t chanoffset;
uint8_t temp;
A7105_Init(INIT_FLYSKY); //flysky_init();
if ((rx_tx_addr[3]&0xF0) > 0x90) // limit offset to 9 as higher values don't work with some RX (ie V912)
rx_tx_addr[3]=rx_tx_addr[3]-0x70;
chanrow=rx_tx_addr[3] & 0x0F;
chancol=0;
chanoffset=rx_tx_addr[3]/16;
// Build frequency hop table
for(uint8_t i=0;i<16;i++)
{
temp=pgm_read_byte_near(&tx_channels[chanrow>>1][i>>2]);
if(i&0x01)
temp&=0x0F;
else
temp>>=4;
temp*=0x0A;
if(i&0x02)
temp+=0x50;
hopping_frequency[((chanrow&1)?15-i:i)]=temp-chanoffset;
}
hopping_frequency_no=0;
if(IS_AUTOBIND_FLAG_on)
bind_counter = FLYSKY_BIND_COUNT;
else
bind_counter = 0;
return 2400;
}
#endif

View File

@@ -13,30 +13,13 @@
along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
*/
#if defined(FRSKY_CC2500_INO)
#if defined(FRSKYD_CC2500_INO)
#include "iface_cc2500.h"
//##########Variables########
//uint32_t state;
//uint8_t len;
/*
enum {
FRSKY_BIND = 0,
FRSKY_BIND_DONE = 1000,
FRSKY_DATA1,
FRSKY_DATA2,
FRSKY_DATA3,
FRSKY_DATA4,
FRSKY_DATA5
};
*/
static void __attribute__((unused)) frsky2way_init(uint8_t bind)
{
// Configure cc2500 for tx mode
CC2500_Reset();
//
for(uint8_t i=0;i<36;i++)
{
@@ -50,6 +33,7 @@ static void __attribute__((unused)) frsky2way_init(uint8_t bind)
val=bind ? 0x43 : 0x03;
CC2500_WriteReg(reg,val);
}
prev_option = option ;
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower();
@@ -141,9 +125,9 @@ static void __attribute__((unused)) frsky2way_data_frame()
uint16_t initFrSky_2way()
{
if(IS_AUTOBIND_FLAG_on)
{
{
frsky2way_init(1);
state = FRSKY_BIND;//
state = FRSKY_BIND;
}
else
{
@@ -208,6 +192,11 @@ uint16_t ReadFrSky_2way()
}
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR, get_chan_num(counter % 47));
if ( prev_option != option )
{
CC2500_WriteReg(CC2500_0C_FSCTRL0,option); // Frequency offset hack
prev_option = option ;
}
CC2500_WriteReg(CC2500_23_FSCAL3, 0x89);
CC2500_Strobe(CC2500_SFRX);
frsky2way_data_frame();

View File

@@ -0,0 +1,209 @@
/*
This project is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
Multiprotocol is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
*/
#if defined(FRSKYV_CC2500_INO)
#define FRSKYV_BIND_COUNT 200
enum {
FRSKYV_DATA1=0,
FRSKYV_DATA2,
FRSKYV_DATA3,
FRSKYV_DATA4,
FRSKYV_DATA5
};
#include "iface_cc2500.h"
const PROGMEM uint8_t FRSKYV_cc2500_conf[][2]={
{ CC2500_17_MCSM1, 0x0c },
{ CC2500_18_MCSM0, 0x18 },
{ CC2500_06_PKTLEN, 0xff },
{ CC2500_07_PKTCTRL1, 0x04 },
{ CC2500_08_PKTCTRL0, 0x05 },
{ CC2500_3E_PATABLE, 0xfe },
{ CC2500_0B_FSCTRL1, 0x08 },
{ CC2500_0C_FSCTRL0, 0x00 },
{ CC2500_0D_FREQ2, 0x5c },
{ CC2500_0E_FREQ1, 0x58 },
{ CC2500_0F_FREQ0, 0x9d },
{ CC2500_10_MDMCFG4, 0xaa },
{ CC2500_11_MDMCFG3, 0x10 },
{ CC2500_12_MDMCFG2, 0x93 },
{ CC2500_13_MDMCFG1, 0x23 },
{ CC2500_14_MDMCFG0, 0x7a },
{ CC2500_15_DEVIATN, 0x41 }
};
static void __attribute__((unused)) FRSKYV_init()
{
for(uint8_t i=0;i<17;i++)
{
uint8_t reg=pgm_read_byte_near(&FRSKYV_cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&FRSKYV_cc2500_conf[i][1]);
if(reg==CC2500_0C_FSCTRL0)
val=option;
CC2500_WriteReg(reg,val);
}
prev_option = option ;
for(uint8_t i=19;i<36;i++)
{
uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&cc2500_conf[i][1]);
CC2500_WriteReg(reg,val);
}
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower();
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
}
static uint8_t __attribute__((unused)) FRSKYV_crc8(uint8_t result, uint8_t *data, uint8_t len)
{
for(uint8_t i = 0; i < len; i++)
{
result = result ^ data[i];
for(uint8_t j = 0; j < 8; j++)
if(result & 0x80)
result = (result << 1) ^ 0x07;
else
result = result << 1;
}
return result;
}
static uint8_t __attribute__((unused)) FRSKYV_crc8_le(uint8_t *data, uint8_t len)
{
uint8_t result = 0xD6;
for(uint8_t i = 0; i < len; i++)
{
result = result ^ data[i];
for(uint8_t j = 0; j < 8; j++)
if(result & 0x01)
result = (result >> 1) ^ 0x83;
else
result = result >> 1;
}
return result;
}
static void __attribute__((unused)) FRSKYV_build_bind_packet()
{
//0e 03 01 57 12 00 06 0b 10 15 1a 00 00 00 61
packet[0] = 0x0e; //Length
packet[1] = 0x03; //Packet type
packet[2] = 0x01; //Packet type
packet[3] = rx_tx_addr[3];
packet[4] = rx_tx_addr[2];
packet[5] = (binding_idx % 10) * 5;
packet[6] = packet[5] * 5 + 6;
packet[7] = packet[5] * 5 + 11;
packet[8] = packet[5] * 5 + 16;
packet[9] = packet[5] * 5 + 21;
packet[10] = packet[5] * 5 + 26;
packet[11] = 0x00;
packet[12] = 0x00;
packet[13] = 0x00;
packet[14] = FRSKYV_crc8(0x93, packet, 14);
}
static uint8_t __attribute__((unused)) FRSKYV_calc_channel()
{
uint32_t temp=seed;
temp = (temp * 0xaa) % 0x7673;
seed = temp;
return (seed & 0xff) % 0x32;
}
static void __attribute__((unused)) FRSKYV_build_data_packet()
{
uint8_t idx = 0; // transmit lower channels
packet[0] = 0x0e;
packet[1] = rx_tx_addr[3];
packet[2] = rx_tx_addr[2];
packet[3] = seed & 0xff;
packet[4] = seed >> 8;
if (phase == FRSKYV_DATA1 || phase == FRSKYV_DATA3)
packet[5] = 0x0f;
else
if(phase == FRSKYV_DATA2 || phase == FRSKYV_DATA4)
{
packet[5] = 0xf0;
idx=4; // transmit upper channels
}
else
packet[5] = 0x00;
for(uint8_t i = 0; i < 4; i++)
{
uint16_t value = convert_channel_frsky(i+idx);
packet[2*i + 6] = value & 0xff;
packet[2*i + 7] = value >> 8;
}
packet[14] = FRSKYV_crc8(crc8, packet, 14);
}
uint16_t ReadFRSKYV()
{
if(IS_BIND_DONE_on)
{ // Normal operation
uint8_t chan = FRSKYV_calc_channel();
CC2500_Strobe(CC2500_SIDLE);
if (option != prev_option)
{
CC2500_WriteReg(CC2500_0C_FSCTRL0, option);
prev_option=option;
}
CC2500_WriteReg(CC2500_0A_CHANNR, chan * 5 + 6);
FRSKYV_build_data_packet();
if (phase == FRSKYV_DATA5)
{
CC2500_SetPower();
phase = FRSKYV_DATA1;
}
else
phase++;
CC2500_WriteData(packet, packet[0]+1);
return 9006;
}
// Bind mode
FRSKYV_build_bind_packet();
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR, 0x00);
CC2500_WriteData(packet, packet[0]+1);
binding_idx++;
if(binding_idx>=FRSKYV_BIND_COUNT)
BIND_DONE;
return 53460;
}
uint16_t initFRSKYV()
{
//ID is 15 bits. Using rx_tx_addr[2] and rx_tx_addr[3] since we want to use RX_Num for model match
rx_tx_addr[2]&=0x7F;
crc8 = FRSKYV_crc8_le(rx_tx_addr+2, 2);
FRSKYV_init();
seed = 1;
binding_idx=0;
phase = FRSKYV_DATA1;
return 10000;
}
#endif

View File

@@ -21,10 +21,8 @@
#include "iface_cc2500.h"
uint8_t chanskip;
uint8_t channr;
uint8_t counter_rst;
uint8_t ctr;
uint8_t FS_flag=0;
uint8_t seq_last_sent;
uint8_t seq_last_rcvd;
@@ -49,16 +47,12 @@ static uint8_t __attribute__((unused)) hop(uint8_t byte)
static void __attribute__((unused)) set_start(uint8_t ch )
{
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_23_FSCAL3, calData[ch][0]);
CC2500_WriteReg(CC2500_24_FSCAL2, calData[ch][1]);
CC2500_WriteReg(CC2500_25_FSCAL1, calData[ch][2]);
CC2500_WriteReg(CC2500_0A_CHANNR, ch==47? 0:pgm_read_word(&hop_data[ch]));
CC2500_WriteReg(CC2500_25_FSCAL1, calData[ch]);
CC2500_WriteReg(CC2500_0A_CHANNR, ch==47? 0:hop(ch));
}
static void __attribute__((unused)) frskyX_init()
{
CC2500_Reset();
for(uint8_t i=0;i<36;i++)
{
uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]);
@@ -96,20 +90,16 @@ static void __attribute__((unused)) frskyX_init()
for(uint8_t c=0;c < 47;c++)
{//calibrate hop channels
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR,pgm_read_word(&hop_data[c]));
CC2500_WriteReg(CC2500_0A_CHANNR,hop(c));
CC2500_Strobe(CC2500_SCAL);
delayMicroseconds(900);//
calData[c][0] = CC2500_ReadReg(CC2500_23_FSCAL3);
calData[c][1] = CC2500_ReadReg(CC2500_24_FSCAL2);
calData[c][2] = CC2500_ReadReg(CC2500_25_FSCAL1);
calData[c] = CC2500_ReadReg(CC2500_25_FSCAL1);
}
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR,0x00);
CC2500_Strobe(CC2500_SCAL);
delayMicroseconds(900);
calData[47][0] = CC2500_ReadReg(CC2500_23_FSCAL3);
calData[47][1] = CC2500_ReadReg(CC2500_24_FSCAL2);
calData[47][2] = CC2500_ReadReg(CC2500_25_FSCAL1);
calData[47] = CC2500_ReadReg(CC2500_25_FSCAL1);
//#######END INIT########
}
@@ -158,11 +148,11 @@ static void __attribute__((unused)) frskyX_build_bind_packet()
packet[4] = rx_tx_addr[2];
int idx = ((state -FRSKY_BIND) % 10) * 5;
packet[5] = idx;
packet[6] = pgm_read_word(&hop_data[idx++]);
packet[7] = pgm_read_word(&hop_data[idx++]);
packet[8] = pgm_read_word(&hop_data[idx++]);
packet[9] = pgm_read_word(&hop_data[idx++]);
packet[10] = pgm_read_word(&hop_data[idx++]);
packet[6] = hop(idx++);
packet[7] = hop(idx++);
packet[8] = hop(idx++);
packet[9] = hop(idx++);
packet[10] = hop(idx++);
packet[11] = 0x02;
packet[12] = RX_num;
//
@@ -188,13 +178,13 @@ static void __attribute__((unused)) frskyX_data_frame()
packet[2] = rx_tx_addr[2];
packet[3] = 0x02;
//
packet[4] = (ctr<<6)+channr;
packet[4] = (ctr<<6)+hopping_frequency_no;
packet[5] = counter_rst;
packet[6] = RX_num;
//FLAGS 00 - standard packet
//packet[7] = FLAGS 00 - standard packet
//10, 12, 14, 16, 18, 1A, 1C, 1E - failsafe packet
//20 - range check packet
packet[7] = FS_flag;
packet[7] = 0;
packet[8] = 0;
//
if ( lpass & 1 )
@@ -252,7 +242,7 @@ uint16_t ReadFrSkyX()
return 9000;
case FRSKY_BIND_DONE:
initialize_data(0);
channr=0;
hopping_frequency_no=0;
BIND_DONE;
state++;
break;
@@ -262,12 +252,11 @@ uint16_t ReadFrSkyX()
CC2500_WriteReg(CC2500_0C_FSCTRL0,option); // Frequency offset hack
prev_option = option ;
}
LED_ON;
CC2500_SetTxRxMode(TX_EN);
set_start(channr);
set_start(hopping_frequency_no);
CC2500_SetPower();
CC2500_Strobe(CC2500_SFRX);
channr = (channr+chanskip)%47;
hopping_frequency_no = (hopping_frequency_no+chanskip)%47;
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteData(packet, packet[0]+1);
//
@@ -319,7 +308,7 @@ uint16_t initFrSkyX()
chanskip=random(0xfefefefe)%47;
}
while((chanskip-ctr)%4)
ctr=(ctr+1)%4;
ctr=(ctr+1)%4;
counter_rst=(chanskip-ctr)>>2;
//for test***************

View File

@@ -35,30 +35,8 @@ enum PktState {
J6PRO_CHAN_4,
};
const uint8_t j6pro_sopcodes[][8] = {
/* Note these are in order transmitted (LSB 1st) */
{0x3C, 0x37, 0xCC, 0x91, 0xE2, 0xF8, 0xCC, 0x91},
{0x9B, 0xC5, 0xA1, 0x0F, 0xAD, 0x39, 0xA2, 0x0F},
{0xEF, 0x64, 0xB0, 0x2A, 0xD2, 0x8F, 0xB1, 0x2A},
{0x66, 0xCD, 0x7C, 0x50, 0xDD, 0x26, 0x7C, 0x50},
{0x5C, 0xE1, 0xF6, 0x44, 0xAD, 0x16, 0xF6, 0x44},
{0x5A, 0xCC, 0xAE, 0x46, 0xB6, 0x31, 0xAE, 0x46},
{0xA1, 0x78, 0xDC, 0x3C, 0x9E, 0x82, 0xDC, 0x3C},
{0xB9, 0x8E, 0x19, 0x74, 0x6F, 0x65, 0x18, 0x74},
{0xDF, 0xB1, 0xC0, 0x49, 0x62, 0xDF, 0xC1, 0x49},
{0x97, 0xE5, 0x14, 0x72, 0x7F, 0x1A, 0x14, 0x72},
{0x82, 0xC7, 0x90, 0x36, 0x21, 0x03, 0xFF, 0x17},
{0xE2, 0xF8, 0xCC, 0x91, 0x3C, 0x37, 0xCC, 0x91}, //Note: the '03' was '9E' in the Cypress recommended table
{0xAD, 0x39, 0xA2, 0x0F, 0x9B, 0xC5, 0xA1, 0x0F}, //The following are the same as the 1st 8 above,
{0xD2, 0x8F, 0xB1, 0x2A, 0xEF, 0x64, 0xB0, 0x2A}, //but with the upper and lower word swapped
{0xDD, 0x26, 0x7C, 0x50, 0x66, 0xCD, 0x7C, 0x50},
{0xAD, 0x16, 0xF6, 0x44, 0x5C, 0xE1, 0xF6, 0x44},
{0xB6, 0x31, 0xAE, 0x46, 0x5A, 0xCC, 0xAE, 0x46},
{0x9E, 0x82, 0xDC, 0x3C, 0xA1, 0x78, 0xDC, 0x3C},
{0x6F, 0x65, 0x18, 0x74, 0xB9, 0x8E, 0x19, 0x74},
};
const uint8_t bind_sop_code[] = {0x62, 0xdf, 0xc1, 0x49, 0xdf, 0xb1, 0xc0, 0x49};
const uint8_t data_code[] = {0x02, 0xf9, 0x93, 0x97, 0x02, 0xfa, 0x5c, 0xe3, 0x01, 0x2b, 0xf1, 0xdb, 0x01, 0x32, 0xbe, 0x6f};
const uint8_t PROGMEM j6pro_bind_sop_code[] = {0x62, 0xdf, 0xc1, 0x49, 0xdf, 0xb1, 0xc0, 0x49};
const uint8_t j6pro_data_code[] = {0x02, 0xf9, 0x93, 0x97, 0x02, 0xfa, 0x5c, 0xe3, 0x01, 0x2b, 0xf1, 0xdb, 0x01, 0x32, 0xbe, 0x6f};
static void __attribute__((unused)) j6pro_build_bind_packet()
{
@@ -106,7 +84,7 @@ static void __attribute__((unused)) j6pro_cyrf_init()
CYRF_WriteRegister(CYRF_10_FRAMING_CFG, 0xee);
CYRF_WriteRegister(CYRF_1F_TX_OVERRIDE, 0x00);
CYRF_WriteRegister(CYRF_1E_RX_OVERRIDE, 0x00);
CYRF_ConfigDataCode(data_code, 16);
CYRF_ConfigDataCode(j6pro_data_code, 16);
CYRF_WritePreamble(0x023333);
CYRF_GetMfgData(cyrfmfg_id);
@@ -121,7 +99,7 @@ static void __attribute__((unused)) cyrf_bindinit()
CYRF_SetPower(0x28); //Deviation using max power, replaced by bind power...
CYRF_ConfigRFChannel(0x52);
CYRF_ConfigSOPCode(bind_sop_code);
CYRF_PROGMEM_ConfigSOPCode(j6pro_bind_sop_code);
CYRF_ConfigCRCSeed(0x0000);
CYRF_WriteRegister(CYRF_06_RX_CFG, 0x4a);
CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x83);
@@ -144,7 +122,7 @@ static void __attribute__((unused)) cyrf_datainit()
uint16_t crc = (0xff & (cyrfmfg_id[1] - cyrfmfg_id[4] + cyrfmfg_id[5])) |
((0xff & (cyrfmfg_id[2] + cyrfmfg_id[3] - cyrfmfg_id[4] + cyrfmfg_id[5])) << 8);
CYRF_WriteRegister(CYRF_0F_XACT_CFG, 0x25);
CYRF_ConfigSOPCode(j6pro_sopcodes[sop_idx]);
CYRF_PROGMEM_ConfigSOPCode(DEVO_j6pro_sopcodes[sop_idx]);
CYRF_ConfigCRCSeed(crc);
}

View File

@@ -12,7 +12,7 @@
You should have received a copy of the GNU General Public License
along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
*/
// compatible with MJX WLH08, X600, X800, H26D
// compatible with MJX WLH08, X600, X800, H26D, Eachine E010
// Last sync with hexfet new_protocols/mjxq_nrf24l01.c dated 2016-01-17
#if defined(MJXQ_NRF24L01_INO)
@@ -96,6 +96,7 @@ static void __attribute__((unused)) MJXQ_send_packet(uint8_t bind)
packet[10]=MJXQ_pan_tilt_value();
// fall through on purpose - no break
case WLH08:
case E010:
packet[10] += GET_FLAG(Servo_AUX6, 0x02) //RTH
| GET_FLAG(Servo_AUX5, 0x01); //HEADLESS
if (!bind)
@@ -169,12 +170,12 @@ static void __attribute__((unused)) MJXQ_init()
if (sub_protocol == WLH08)
memcpy(hopping_frequency, "\x12\x22\x32\x42", MJXQ_RF_NUM_CHANNELS);
else
if (sub_protocol == H26D)
if (sub_protocol == H26D || sub_protocol == E010)
memcpy(hopping_frequency, "\x36\x3e\x46\x2e", MJXQ_RF_NUM_CHANNELS);
else
{
memcpy(hopping_frequency, "\x0a\x35\x42\x3d", MJXQ_RF_NUM_CHANNELS);
memcpy(addr, "\x6d\x6a\x73\x73\x73", MJXQ_RF_NUM_CHANNELS);
memcpy(addr, "\x6d\x6a\x73\x73\x73", MJXQ_ADDRESS_LENGTH);
}
@@ -193,7 +194,10 @@ static void __attribute__((unused)) MJXQ_init()
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0x00); // no retransmits
NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, MJXQ_PACKET_SIZE); // rx pipe 0 (used only for blue board)
NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
if (sub_protocol == E010)
NRF24L01_SetBitrate(NRF24L01_BR_250K); // 250K
else
NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
NRF24L01_SetPower();
}
@@ -202,18 +206,25 @@ static void __attribute__((unused)) MJXQ_init2()
if (sub_protocol == H26D)
memcpy(hopping_frequency, "\x32\x3e\x42\x4e", MJXQ_RF_NUM_CHANNELS);
else
if (sub_protocol == WLH08)
if (sub_protocol != WLH08 && sub_protocol != E010)
for(uint8_t i=0;i<MJXQ_RF_NUM_CHANNELS;i++)
hopping_frequency[i]=pgm_read_byte_near( &MJXQ_map_rfchan[rx_tx_addr[4]%3][i] );
}
static void __attribute__((unused)) MJXQ_initialize_txid()
{
if (sub_protocol == WLH08)
rx_tx_addr[0]&=0xF8; // txid must be multiple of 8
if (sub_protocol == E010)
{
rx_tx_addr[0]=0x90;
rx_tx_addr[1]=0x1C;
rx_tx_addr[2]=0x00;
}
else
for(uint8_t i=0;i<3;i++)
rx_tx_addr[i]=pgm_read_byte_near( &MJXQ_map_txid[rx_tx_addr[4]%3][i] );
if (sub_protocol == WLH08)
rx_tx_addr[0]&=0xF8; // txid must be multiple of 8
else
for(uint8_t i=0;i<3;i++)
rx_tx_addr[i]=pgm_read_byte_near( &MJXQ_map_txid[rx_tx_addr[4]%3][i] );
}
uint16_t MJXQ_callback()

View File

@@ -17,7 +17,8 @@ static void module_reset(void) ;
static void update_led_status(void) ;
static void set_rx_tx_addr(uint32_t id) ;
uint16_t limit_channel_100(uint8_t ch) ;
void initTXSerial( uint8_t speed);
void Serial_write(uint8_t data);
extern void NRF24L01_Reset(void ) ;
extern void A7105_Reset(void ) ;

View File

@@ -31,10 +31,10 @@ enum PROTOCOLS
MODE_SERIAL = 0, // Serial commands
MODE_FLYSKY = 1, // =>A7105
MODE_HUBSAN = 2, // =>A7105
MODE_FRSKY = 3, // =>CC2500
MODE_FRSKYD = 3, // =>CC2500
MODE_HISKY = 4, // =>NRF24L01
MODE_V2X2 = 5, // =>NRF24L01
MODE_DSM2 = 6, // =>CYRF6936
MODE_DSM = 6, // =>CYRF6936
MODE_DEVO = 7, // =>CYRF6936
MODE_YD717 = 8, // =>NRF24L01
MODE_KN = 9, // =>NRF24L01
@@ -52,7 +52,8 @@ enum PROTOCOLS
MODE_SFHSS = 21, // =>CC2500
MODE_J6PRO = 22, // =>CYRF6936
MODE_FQ777 = 23, // =>NRF24L01
MODE_ASSAN = 24 // =>NRF24L01
MODE_ASSAN = 24, // =>NRF24L01
MODE_FRSKYV = 25 // =>CC2500
};
enum Flysky
@@ -67,7 +68,7 @@ enum Hisky
Hisky = 0,
HK310 = 1
};
enum DSM2
enum DSM
{
DSM2 = 0,
DSMX = 1
@@ -119,7 +120,8 @@ enum MJXQ
WLH08 = 0,
X600 = 1,
X800 = 2,
H26D = 3
H26D = 3,
E010 = 4
};
enum FRSKYX
@@ -144,24 +146,46 @@ struct PPM_Parameters
uint8_t option;
};
//*******************
//*** Timer ***
//*******************
#ifdef XMEGA
#define TIFR1 TCC1.INTFLAGS
#define OCF1A_bm TC1_CCAIF_bm
#define OCR1A TCC1.CCA
#define TCNT1 TCC1.CNT
#define USARTC0.DATA UDR0
#define OCF1B_bm TC1_CCBIF_bm
#define OCR1B TCC1.CCB
#define TCC1.INTCTRLB TIMSK1
#define SET_TIMSK1_OCIE1B TIMSK1 = (TIMSK1 & 0xF3) | 0x04
#define CLR_TIMSK1_OCIE1B TIMSK1 &= 0xF3
#else
#define OCF1A_bm _BV(OCF1A)
#define OCF1B_bm _BV(OCF1B)
#define SET_TIMSK1_OCIE1B TIMSK1 |= _BV(OCIE1B)
#define CLR_TIMSK1_OCIE1B TIMSK1 &=~_BV(OCIE1B)
#endif
//*******************
//*** Pinouts ***
//*******************
#define LED_pin 13 //Promini original led on B5
#define PPM_pin 3 //PPM-D3
#define LED_pin 5 //D13 = PB5
#define BIND_pin 5 //D13 = PB5
#define PPM_pin 3 //D3 = PD3
#ifdef XMEGA
#define SDI_pin 6 //SDIO-D6
#define SDI_pin 6 //SDIO-D6
#else
#define SDI_pin 5 //SDIO-D5
#define SDI_pin 5 //D5 = PD5
#endif
#define SCLK_pin 4 //SCK-D4
#define CS_pin 2 //CS-D2
#define SDO_pin 6 //D6
#define CC25_CSN_pin 7
#define NRF_CSN_pin 8
#define CYRF_CSN_pin 9
#define CTRL1 1 //C1 (A1)
#define CTRL2 2 //C2 (A2)
#define SCLK_pin 4 //D4 = PD4
#define A7105_CS_pin 2 //D2 = PD2
#define SDO_pin 6 //D6 = PD6
#define CC25_CSN_pin 7 //D7 = PD7
#define NRF_CSN_pin 0 //D8 = PB0
#define CYRF_CSN_pin 1 //D9 = PB1
#define CTRL1_pin 1 //A1 = PC1
#define CTRL2_pin 2 //A2 = PC2
//
#ifdef XMEGA
#define CTRL1_on
@@ -176,39 +200,39 @@ struct PPM_Parameters
#endif
//
#ifdef XMEGA
#define CS_on PORTD.OUTSET = _BV(4) //D4
#define CS_off PORTD.OUTCLR = _BV(4) //D4
#define A7105_CS_on PORTD.OUTSET = _BV(4) //D4
#define A7105_CS_off PORTD.OUTCLR = _BV(4) //D4
#else
#define CS_on PORTD |= _BV(2) //D2
#define CS_off PORTD &= ~_BV(2) //D2
#define A7105_CS_on PORTD |= _BV(2) //D2
#define A7105_CS_off PORTD &= ~_BV(2) //D2
#endif
//
#ifdef XMEGA
#define SCK_on PORTD.OUTSET = _BV(7) //D7
#define SCK_on PORTD.OUTSET = _BV(7) //D7
#define SCK_off PORTD.OUTCLR = _BV(7) //D7
#else
#define SCK_on PORTD |= _BV(4) //D4
#define SCK_off PORTD &= ~_BV(4) //D4
#define SCK_on PORTD |= _BV(4) //D4
#define SCK_off PORTD &= ~_BV(4) //D4
#endif
//
#ifdef XMEGA
#define SDI_on PORTD.OUTSET = _BV(5) //D5
#define SDI_on PORTD.OUTSET = _BV(5) //D5
#define SDI_off PORTD.OUTCLR = _BV(5) //D5
#else
#define SDI_on PORTD |= _BV(5) //D5
#define SDI_off PORTD &= ~_BV(5) //D5
#define SDI_on PORTD |= _BV(5) //D5
#define SDI_off PORTD &= ~_BV(5) //D5
#endif
//
#ifdef XMEGA
#define SDI_1 (PORTD.IN & (1<<SDI_pin)) == (1<<SDI_pin) //D5
#define SDI_0 (PORTD.IN & (1<<SDI_pin)) == 0x00 //D5
#define SDI_1 (PORTD.IN & _BV(SDI_pin)) == _BV(SDI_pin) //D5
#define SDI_0 (PORTD.IN & _BV(SDI_pin)) == 0x00 //D5
#else
#define SDI_1 (PIND & (1<<SDI_pin)) == (1<<SDI_pin) //D5
#define SDI_0 (PIND & (1<<SDI_pin)) == 0x00 //D5
#define SDI_1 (PIND & _BV(SDI_pin)) == _BV(SDI_pin) //D5
#define SDI_0 (PIND & _BV(SDI_pin)) == 0x00 //D5
#endif
//
#define SDI_SET_INPUT DDRD &= ~_BV(5) //D5
#define SDI_SET_OUTPUT DDRD |= _BV(5) //D5
#define SDI_SET_INPUT DDRD &= ~_BV(5) //D5
#define SDI_SET_OUTPUT DDRD |= _BV(5) //D5
//
#ifdef XMEGA
#define CC25_CSN_on PORTD.OUTSET = _BV(7) //D7
@@ -221,9 +245,13 @@ struct PPM_Parameters
#ifdef XMEGA
#define NRF_CSN_on
#define NRF_CSN_off
#define NRF_CE_on
#define NRF_CE_off
#else
#define NRF_CSN_on PORTB |= _BV(0) //D8
#define NRF_CSN_off PORTB &= ~_BV(0) //D8
#define NRF_CSN_on PORTB |= _BV(0) //D8
#define NRF_CSN_off PORTB &= ~_BV(0) //D8
#define NRF_CE_on
#define NRF_CE_off
#endif
//
#ifdef XMEGA
@@ -234,38 +262,56 @@ struct PPM_Parameters
#define CYRF_CSN_off PORTB &= ~_BV(1) //D9
#define CYRF_RST_HI PORTC |= _BV(5) //A5
#define CYRF_RST_LO PORTC &= ~_BV(5) //A5
#define CYRF_RST_pin 5
#endif
//
#ifdef XMEGA
#define SDO_1 (PORTD.IN & (1<<SDO_pin)) == (1<<SDO_pin) //D6
#define SDO_0 (PORTD.IN & (1<<SDO_pin)) == 0x00 //D6
#define SDO_1 (PORTD.IN & _BV(SDO_pin)) == _BV(SDO_pin) //D6
#define SDO_0 (PORTD.IN & _BV(SDO_pin)) == 0x00 //D6
#else
#define SDO_1 (PIND & (1<<SDO_pin)) == (1<<SDO_pin) //D6
#define SDO_0 (PIND & (1<<SDO_pin)) == 0x00 //D6
#define SDO_1 (PIND & _BV(SDO_pin)) == _BV(SDO_pin) //D6
#define SDO_0 (PIND & _BV(SDO_pin)) == 0x00 //D6
#endif
//
//
// LED
#ifdef XMEGA
#define LED_ON PORTD.OUTCLR = _BV(1)
#define LED_OFF PORTD.OUTSET = _BV(1)
#define LED_TOGGLE PORTD.OUTTGL = _BV(1)
#define LED_SET_OUTPUT PORTD.DIRSET = _BV(1)
#define IS_LED_on ( (PORTD.OUT & _BV(1)) != 0x00 )
#define LED_ON PORTD.OUTCLR = _BV(1)
#define LED_OFF PORTD.OUTSET = _BV(1)
#define LED_TOGGLE PORTD.OUTTGL = _BV(1)
#define LED_SET_OUTPUT PORTD.DIRSET = _BV(1)
#define IS_LED_on ( (PORTD.OUT & _BV(1)) != 0x00 )
#else
#define LED_ON PORTB |= _BV(5)
#define LED_OFF PORTB &= ~_BV(5)
#define LED_TOGGLE PORTB ^= _BV(5)
#define LED_SET_OUTPUT DDRB |= _BV(5)
#define IS_LED_on ( (PORTB & _BV(5)) != 0x00 )
#define LED_ON PORTB |= _BV(5)
#define LED_OFF PORTB &= ~_BV(5)
#define LED_TOGGLE PORTB ^= _BV(5)
#define LED_SET_OUTPUT DDRB |= _BV(5)
#define IS_LED_on ( (PORTB & _BV(5)) != 0x00 )
#endif
//BIND
#ifdef XMEGA
#define IS_BIND_BUTTON_on ( (PORTD.IN & _BV(2)) == 0x00 )
#else
#define BIND_SET_INPUT DDRB &= ~_BV(5)
#define BIND_SET_PULLUP PORTB |= _BV(5)
#define IS_BIND_BUTTON_on ( (PINB & _BV(5)) == 0x00 )
#define BIND_SET_OUTPUT DDRB |= _BV(5)
#endif
// TX
#define TX_ON PORTD |= _BV(1)
#define TX_OFF PORTD &= ~_BV(1)
#define TX_TOGGLE PORTD ^= _BV(1)
#define TX_SET_OUTPUT DDRD |= _BV(1)
#ifdef DEBUG_TX
#define TX_ON PORTD |= _BV(1)
#define TX_OFF PORTD &= ~_BV(1)
#define TX_TOGGLE PORTD ^= _BV(1)
#define TX_SET_OUTPUT DDRD |= _BV(1)
#else
#define TX_ON
#define TX_OFF
#define TX_TOGGLE
#define TX_SET_OUTPUT
#endif
// Macros
#define NOP() __asm__ __volatile__("nop")
@@ -318,6 +364,16 @@ struct PPM_Parameters
#define RX_MISSED_BUFF_on protocol_flags2 |= _BV(2)
#define IS_RX_MISSED_BUFF_on ( ( protocol_flags2 & _BV(2) ) !=0 )
#define TX_MAIN_PAUSE_off protocol_flags2 &= ~_BV(3)
#define TX_MAIN_PAUSE_on protocol_flags2 |= _BV(3)
#define IS_TX_MAIN_PAUSE_on ( ( protocol_flags2 & _BV(3) ) !=0 )
#define TX_RX_PAUSE_off protocol_flags2 &= ~_BV(4)
#define TX_RX_PAUSE_on protocol_flags2 |= _BV(4)
#define IS_TX_RX_PAUSE_on ( ( protocol_flags2 & _BV(4) ) !=0 )
#define IS_TX_PAUSE_on ( ( protocol_flags2 & (_BV(4)|_BV(3)) ) !=0 )
#define BLINK_BIND_TIME 100
#define BLINK_SERIAL_TIME 500
#define BLINK_BAD_PROTO_TIME_LOW 1000
@@ -425,7 +481,7 @@ enum CYRF_POWER
#define CYRF_HIGH_POWER CYRF_POWER_7
#define CYRF_LOW_POWER CYRF_POWER_3
#define CYRF_RANGE_POWER CYRF_POWER_1 // 1/30 of the full power distance
#define CYRF_BIND_POWER CYRF_POWER_1
#define CYRF_BIND_POWER CYRF_POWER_0
enum TXRX_State {
TXRX_OFF,
@@ -460,10 +516,10 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
=> Reserved 0
Flysky 1
Hubsan 2
Frsky 3
FrskyD 3
Hisky 4
V2x2 5
DSM2 6
DSM 6
Devo 7
YD717 8
KN 9
@@ -482,6 +538,7 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
J6PRO 22
FQ777 23
ASSAN 24
FrskyV 25
BindBit=> 0x80 1=Bind/0=No
AutoBindBit=> 0x40 1=Yes /0=No
RangeCheck=> 0x20 1=Yes /0=No
@@ -496,7 +553,7 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
sub_protocol==Hisky
Hisky 0
HK310 1
sub_protocol==DSM2
sub_protocol==DSM
DSM2 0
DSMX 1
sub_protocol==YD717
@@ -534,6 +591,7 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
X600 1
X800 2
H26D 3
E010 4
sub_protocol==FRSKYX
CH_16 0
CH_8 1

File diff suppressed because it is too large Load Diff

View File

@@ -76,6 +76,16 @@ uint8_t NRF24L01_ReadReg(uint8_t reg)
NRF_CSN_on;
}
*/
static uint8_t __attribute__((unused)) NRF24L01_ReadPayloadLength()
{
NRF_CSN_off;
SPI_Write(R_RX_PL_WID);
uint8_t len = SPI_Read();
NRF_CSN_on;
return len;
}
static void NRF24L01_ReadPayload(uint8_t * data, uint8_t length)
{
NRF_CSN_off;
@@ -160,7 +170,7 @@ void NRF24L01_SetPower()
void NRF24L01_SetTxRxMode(enum TXRX_State mode)
{
if(mode == TX_EN) {
NRF_CSN_off;
NRF_CE_off;
NRF24L01_WriteReg(NRF24L01_07_STATUS, (1 << NRF24L01_07_RX_DR) //reset the flag(s)
| (1 << NRF24L01_07_TX_DS)
| (1 << NRF24L01_07_MAX_RT));
@@ -168,11 +178,11 @@ void NRF24L01_SetTxRxMode(enum TXRX_State mode)
| (1 << NRF24L01_00_CRCO)
| (1 << NRF24L01_00_PWR_UP));
delayMicroseconds(130);
NRF_CSN_on;
NRF_CE_on;
}
else
if (mode == RX_EN) {
NRF_CSN_off;
NRF_CE_off;
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // reset the flag(s)
NRF24L01_WriteReg(NRF24L01_00_CONFIG, 0x0F); // switch to RX mode
NRF24L01_WriteReg(NRF24L01_07_STATUS, (1 << NRF24L01_07_RX_DR) //reset the flag(s)
@@ -183,12 +193,12 @@ void NRF24L01_SetTxRxMode(enum TXRX_State mode)
| (1 << NRF24L01_00_PWR_UP)
| (1 << NRF24L01_00_PRIM_RX));
delayMicroseconds(130);
NRF_CSN_on;
NRF_CE_on;
}
else
{
NRF24L01_WriteReg(NRF24L01_00_CONFIG, (1 << NRF24L01_00_EN_CRC)); //PowerDown
NRF_CSN_off;
NRF_CE_off;
}
}
@@ -204,7 +214,7 @@ void NRF24L01_Reset()
NRF24L01_FlushTx();
NRF24L01_FlushRx();
NRF24L01_Strobe(0xff); // NOP
NRF24L01_ReadReg(0x07);
NRF24L01_ReadReg(NRF24L01_07_STATUS);
NRF24L01_SetTxRxMode(TXRX_OFF);
delayMicroseconds(100);
}
@@ -221,6 +231,7 @@ uint8_t NRF24L01_packet_ack()
return PKT_PENDING;
}
///////////////
// XN297 emulation layer
uint8_t xn297_scramble_enabled=XN297_SCRAMBLED; //enabled by default

View File

@@ -98,7 +98,7 @@ static void __attribute__((unused)) SFHSS_tune_chan_fast()
{
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR, rf_ch_num*6+16);
CC2500_WriteRegisterMulti(CC2500_23_FSCAL3, calData[rf_ch_num], 3);
CC2500_WriteReg(CC2500_25_FSCAL1, calData[rf_ch_num]);
}
static void __attribute__((unused)) SFHSS_tune_freq()
@@ -170,7 +170,7 @@ uint16_t ReadSFHSS()
phase = SFHSS_CAL;
return 2000;
case SFHSS_CAL:
CC2500_ReadRegisterMulti(CC2500_23_FSCAL3, calData[rf_ch_num], 3);
calData[rf_ch_num]=CC2500_ReadReg(CC2500_25_FSCAL1);
if (++rf_ch_num < 30)
SFHSS_tune_chan();
else

View File

@@ -1,7 +1,7 @@
//*************************************
// FrSky Telemetry serial code *
// By Midelic on RCGroups *
//*************************************
//**************************
// Telemetry serial code *
// By Midelic on RCGroups *
//**************************
#if defined TELEMETRY
@@ -26,24 +26,22 @@
uint8_t pktx[MAX_PKTX];
uint8_t pktx1[MAX_PKTX];
uint8_t index;
uint8_t pass = 0;
uint8_t frame[18];
#ifdef BASH_SERIAL
// For bit-bashed serial output
struct t_serial_bash
{
uint8_t head ;
uint8_t tail ;
uint8_t data[64] ;
uint8_t busy ;
uint8_t speed ;
} SerialControl ;
struct t_serial_bash
{
uint8_t head ;
uint8_t tail ;
uint8_t data[64] ;
uint8_t busy ;
uint8_t speed ;
} SerialControl ;
#endif
#if defined DSM_TELEMETRY
void DSM2_frame()
void DSM_frame()
{
Serial_write(0xAA); // Start
for (uint8_t i = 0; i < 17; i++) // RSSI value followed by 16 bytes of telemetry data
@@ -110,7 +108,7 @@ void frsky_check_telemetry(uint8_t *pkt,uint8_t len)
void frsky_link_frame()
{
frame[0] = 0xFE;
if ((cur_protocol[0]&0x1F)==MODE_FRSKY)
if ((cur_protocol[0]&0x1F)==MODE_FRSKYD)
{
compute_RSSIdbm();
frame[1] = pktt[3];
@@ -395,7 +393,7 @@ void proces_sport_data(uint8_t data)
#endif
void frskyUpdate()
void TelemetryUpdate()
{
#if defined SPORT_TELEMETRY
if ((cur_protocol[0]&0x1F)==MODE_FRSKYX)
@@ -453,9 +451,9 @@ void frskyUpdate()
#endif
#if defined DSM_TELEMETRY
if(telemetry_link && (cur_protocol[0]&0x1F) == MODE_DSM2 )
{ // DSM2
DSM2_frame();
if(telemetry_link && (cur_protocol[0]&0x1F) == MODE_DSM )
{ // DSM
DSM_frame();
telemetry_link=0;
return;
}
@@ -467,7 +465,7 @@ void frskyUpdate()
return;
}
#if defined HUB_TELEMETRY
if(!telemetry_link && (cur_protocol[0]&0x1F) == MODE_FRSKY)
if(!telemetry_link && (cur_protocol[0]&0x1F) == MODE_FRSKYD)
{ // FrSky
frsky_user_frame();
return;
@@ -497,16 +495,13 @@ void frskyUpdate()
// Routines for normal serial output
void Serial_write(uint8_t data)
{
cli(); // disable global int
if(++tx_head>=TXBUFFER_SIZE)
tx_head=0;
tx_buff[tx_head]=data;
#ifdef XMEGA
USARTC0.CTRLA = (USARTC0.CTRLA & 0xFC) | 0x01 ;
#else
UCSR0B |= (1<<UDRIE0);//enable UDRE interrupt
#endif
sei(); // enable global int
uint8_t nextHead ;
nextHead = tx_head + 1 ;
if ( nextHead >= TXBUFFER_SIZE )
nextHead = 0 ;
tx_buff[nextHead]=data;
tx_head = nextHead ;
tx_resume();
}
// Speed is 0 for 100K and 1 for 9600
@@ -521,6 +516,7 @@ void initTXSerial( uint8_t speed)
USARTC0.CTRLB = 0x18 ;
USARTC0.CTRLA = (USARTC0.CTRLA & 0xCF) | 0x10 ;
USARTC0.CTRLC = 0x03 ;
}
#else
//9600 bauds
UBRR0H = 0x00;
@@ -528,11 +524,9 @@ void initTXSerial( uint8_t speed)
UCSR0A = 0 ; // Clear X2 bit
//Set frame format to 8 data bits, none, 1 stop bit
UCSR0C = (1<<UCSZ01)|(1<<UCSZ00);
UCSR0B = (1<<TXEN0);//tx enable
#endif
}
else
UCSR0B |= (1<<TXEN0);//tx enable
UCSR0B |= (1<<TXEN0);//tx enable
#endif
}
#ifdef XMEGA
@@ -545,18 +539,10 @@ ISR(USART_UDRE_vect)
{
if(++tx_tail>=TXBUFFER_SIZE)//head
tx_tail=0;
#ifdef XMEGA
USARTC0.DATA = tx_buff[tx_tail] ;
#else
UDR0=tx_buff[tx_tail];
#endif
}
if (tx_tail == tx_head)
#ifdef XMEGA
USARTC0.CTRLA &= ~0x03 ;
#else
UCSR0B &= ~(1<<UDRIE0); // Check if all data is transmitted . if yes disable transmitter UDRE interrupt
#endif
tx_pause(); // Check if all data is transmitted . if yes disable transmitter UDRE interrupt
}
#else //BASH_SERIAL
@@ -566,11 +552,11 @@ ISR(USART_UDRE_vect)
void initTXSerial( uint8_t speed)
{
TIMSK0 = 0 ; // Stop all timer 0 interrupts
#ifdef INVERT_SERIAL
PORTD &= ~2 ;
#else
PORTD |= 2 ;
#endif
#ifdef INVERT_SERIAL
PORTD &= ~2 ;
#else
PORTD |= 2 ;
#endif
DDRD |= 2 ; // TxD pin is an output
UCSR0B &= ~(1<<TXEN0) ;

View File

@@ -34,13 +34,6 @@
#define YD717_PAYLOADSIZE 8 // receive data pipes set to this size, but unused
enum {
YD717_INIT1 = 0,
YD717_BIND2,
YD717_BIND3,
YD717_DATA
};
static void __attribute__((unused)) yd717_send_packet(uint8_t bind)
{
uint8_t rudder_trim, elevator_trim, aileron_trim;
@@ -132,119 +125,64 @@ static void __attribute__((unused)) yd717_init()
// CRC, radio on
NRF24L01_SetTxRxMode(TX_EN);
NRF24L01_WriteReg(NRF24L01_00_CONFIG, BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_PWR_UP));
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x3F); // Auto Acknoledgement on all data pipes
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x3F); // Enable all data pipes
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x03); // 5-byte RX/TX address
NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0x1A); // 500uS retransmit t/o, 10 tries
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // Disable Acknoledgement on all data pipes
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x00); // Disable all data pipes
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x03); // 5-byte RX/TX address
NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0x00); // No retransmit
NRF24L01_WriteReg(NRF24L01_05_RF_CH, YD717_RF_CHANNEL); // Channel 3C
NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
NRF24L01_SetPower();
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
NRF24L01_WriteReg(NRF24L01_0C_RX_ADDR_P2, 0xC3); // LSB byte of pipe 2 receive address
NRF24L01_WriteReg(NRF24L01_0D_RX_ADDR_P3, 0xC4);
NRF24L01_WriteReg(NRF24L01_0E_RX_ADDR_P4, 0xC5);
NRF24L01_WriteReg(NRF24L01_0F_RX_ADDR_P5, 0xC6);
NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, YD717_PAYLOADSIZE); // bytes of data payload for pipe 1
NRF24L01_WriteReg(NRF24L01_12_RX_PW_P1, YD717_PAYLOADSIZE);
NRF24L01_WriteReg(NRF24L01_13_RX_PW_P2, YD717_PAYLOADSIZE);
NRF24L01_WriteReg(NRF24L01_14_RX_PW_P3, YD717_PAYLOADSIZE);
NRF24L01_WriteReg(NRF24L01_15_RX_PW_P4, YD717_PAYLOADSIZE);
NRF24L01_WriteReg(NRF24L01_16_RX_PW_P5, YD717_PAYLOADSIZE);
NRF24L01_WriteReg(NRF24L01_17_FIFO_STATUS, 0x00); // Just in case, no real bits to write here
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
NRF24L01_Activate(0x73); // Activate feature register
NRF24L01_WriteReg(NRF24L01_1C_DYNPD, 0x3F); // Enable dynamic payload length on all pipes
NRF24L01_WriteReg(NRF24L01_1D_FEATURE, 0x07); // Set feature bits on
NRF24L01_Activate(0x73); // Activate feature register
NRF24L01_WriteReg(NRF24L01_1C_DYNPD, 0x3F); // Enable dynamic payload length on all pipes
NRF24L01_WriteReg(NRF24L01_1D_FEATURE, 0x07); // Set feature bits on
NRF24L01_Activate(0x73);
// set tx id
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rx_tx_addr, 5);
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, rx_tx_addr, 5);
}
static void __attribute__((unused)) YD717_init1()
{
// for bind packets set address to prearranged value known to receiver
uint8_t bind_rx_tx_addr[] = {0x65, 0x65, 0x65, 0x65, 0x65};
uint8_t i;
if( sub_protocol==SYMAX4 )
for(i=0; i < 5; i++)
for(uint8_t i=0; i < 5; i++)
bind_rx_tx_addr[i] = 0x60;
else
if( sub_protocol==NIHUI )
for(i=0; i < 5; i++)
for(uint8_t i=0; i < 5; i++)
bind_rx_tx_addr[i] = 0x64;
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, bind_rx_tx_addr, 5);
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, bind_rx_tx_addr, 5);
}
static void __attribute__((unused)) YD717_init2()
{
// set rx/tx address for data phase
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, rx_tx_addr, 5);
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, rx_tx_addr, 5);
}
uint16_t yd717_callback()
{
switch (phase)
if(IS_BIND_DONE_on)
yd717_send_packet(0);
else
{
case YD717_INIT1:
yd717_send_packet(0); // receiver doesn't re-enter bind mode if connection lost...check if already bound
phase = YD717_BIND3;
break;
case YD717_BIND2:
if (counter == 0)
{
if (NRF24L01_packet_ack() == PKT_PENDING)
return YD717_PACKET_CHKTIME; // packet send not yet complete
YD717_init2(); // change to data phase rx/tx address
yd717_send_packet(0);
phase = YD717_BIND3;
}
else
{
if (NRF24L01_packet_ack() == PKT_PENDING)
return YD717_PACKET_CHKTIME; // packet send not yet complete;
yd717_send_packet(1);
counter--;
}
break;
case YD717_BIND3:
switch (NRF24L01_packet_ack())
{
case PKT_PENDING:
return YD717_PACKET_CHKTIME; // packet send not yet complete
case PKT_ACKED:
phase = YD717_DATA;
BIND_DONE; // bind complete
break;
case PKT_TIMEOUT:
YD717_init1(); // change to bind rx/tx address
counter = YD717_BIND_COUNT;
phase = YD717_BIND2;
yd717_send_packet(1);
}
break;
case YD717_DATA:
if (NRF24L01_packet_ack() == PKT_PENDING)
return YD717_PACKET_CHKTIME; // packet send not yet complete
if (bind_counter == 0)
{
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, rx_tx_addr, 5); // set address
yd717_send_packet(0);
break;
}
BIND_DONE; // bind complete
}
else
{
yd717_send_packet(1);
bind_counter--;
}
}
return YD717_PACKET_PERIOD; // Packet every 8ms
}
uint16_t initYD717()
{
rx_tx_addr[4] = 0xC1; // always uses first data port
BIND_IN_PROGRESS; // autobind protocol
rx_tx_addr[4] = 0xC1; // always uses first data port
yd717_init();
phase = YD717_INIT1;
BIND_IN_PROGRESS; // autobind protocol
bind_counter = YD717_BIND_COUNT;
// Call callback in 50ms
return YD717_INITIAL_WAIT;
}
#endif
#endif

View File

@@ -45,11 +45,12 @@
#endif
#ifdef CYRF6936_INSTALLED
#define DEVO_CYRF6936_INO
#define DSM2_CYRF6936_INO
#define DSM_CYRF6936_INO
#define J6PRO_CYRF6936_INO
#endif
#ifdef CC2500_INSTALLED
#define FRSKY_CC2500_INO
#define FRSKYD_CC2500_INO
#define FRSKYV_CC2500_INO
#define FRSKYX_CC2500_INO
#define SFHSS_CC2500_INO
#endif
@@ -87,13 +88,13 @@
//Comment a line to disable a protocol telemetry
#if defined(TELEMETRY)
#if defined DSM2_CYRF6936_INO
#if defined DSM_CYRF6936_INO
#define DSM_TELEMETRY
#endif
#if defined FRSKYX_CC2500_INO
#define SPORT_TELEMETRY
#endif
#if defined FRSKY_CC2500_INO
#if defined FRSKYD_CC2500_INO
#define HUB_TELEMETRY
#endif
#endif
@@ -147,10 +148,10 @@ const PPM_Parameters PPM_prot[15]= {
// Dial Protocol Sub protocol RX_Num Power Auto Bind Option
/* 1 */ {MODE_FLYSKY, Flysky , 0 , P_HIGH , NO_AUTOBIND , 0 },
/* 2 */ {MODE_HUBSAN, 0 , 0 , P_HIGH , NO_AUTOBIND , 0 },
/* 3 */ {MODE_FRSKY , 0 , 0 , P_HIGH , NO_AUTOBIND , 0 }, // option=fine freq tuning
/* 3 */ {MODE_FRSKYD, 0 , 0 , P_HIGH , NO_AUTOBIND , 40 }, // option=fine freq tuning
/* 4 */ {MODE_HISKY , Hisky , 0 , P_HIGH , NO_AUTOBIND , 0 },
/* 5 */ {MODE_V2X2 , 0 , 0 , P_HIGH , NO_AUTOBIND , 0 },
/* 6 */ {MODE_DSM2 , DSM2 , 0 , P_HIGH , NO_AUTOBIND , 2 }, // option=2=6 channels @ 22ms
/* 6 */ {MODE_DSM , DSM2 , 0 , P_HIGH , NO_AUTOBIND , 2 }, // option=2=6 channels @ 22ms
/* 7 */ {MODE_DEVO , 0 , 0 , P_HIGH , NO_AUTOBIND , 0 },
/* 8 */ {MODE_YD717 , YD717 , 0 , P_HIGH , NO_AUTOBIND , 0 },
/* 9 */ {MODE_KN , WLTOYS , 0 , P_HIGH , NO_AUTOBIND , 0 },
@@ -169,14 +170,14 @@ const PPM_Parameters PPM_prot[15]= {
V912
MODE_HUBSAN
NONE
MODE_FRSKY
MODE_FRSKYD
NONE
MODE_HISKY
Hisky
HK310
MODE_V2X2
NONE
MODE_DSM2
MODE_DSM
DSM2
DSMX
MODE_DEVO
@@ -225,6 +226,7 @@ const PPM_Parameters PPM_prot[15]= {
X600
X800
H26D
E010
MODE_SHENQI
NONE
MODE_FY326
@@ -237,6 +239,8 @@ const PPM_Parameters PPM_prot[15]= {
NONE
MODE_ASSAN
NONE
MODE_FRSKYV
NONE
*/
// RX_Num is used for model match. Using RX_Num values different for each receiver will prevent starting a model with the false config loaded...

View File

@@ -50,12 +50,25 @@ A|E|T|R|FLIP|LIGHT|PICTURE|VIDEO|HEADLESS
***
#CC2500 RF Module
##FRSKY
##FRSKYV = FrSky 1 way
Models: FrSky receivers V8R4, V8R7 and V8FR.
Extended limits supported
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them. If you have a 4in1 V2 board the value is around 40.
CH1|CH2|CH3|CH4
---|---|---|---
CH1|CH2|CH3|CH4
##FRSKYD
Models: FrSky receivers D4R and D8R. DIY RX-F801 and RX-F802 receivers.
Extended limits supported
Telemetry enabled for A0, A1, RSSI, TSSI and Hub
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them.
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them. If you have a 4in1 V2 board the value is around 40.
CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8
---|---|---|---|---|---|---|---
@@ -68,7 +81,7 @@ Extended limits supported
Telemetry enabled for A1 (RxBatt), A2, RSSI, TSSI and Hub
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them.
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them. If you have a 4in1 V2 board the value is around 40.
###Sub_protocol CH_16
CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8|CH9|CH10|CH11|CH12|CH13|CH14|CH15|CH16
@@ -83,7 +96,7 @@ CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8
##SFHSS
Models: Futaba RXs and XK models.
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them.
Option=fine frequency tuning. This value is different for each board. To determine the option value, find the two limits where the RX loses connection then set the option value to half way between them. If you have a 4in1 V2 board the value is around 40.
CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8
---|---|---|---|---|---|---|---
@@ -99,10 +112,12 @@ CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8
---|---|---|---|---|---|---|---
A|E|T|R|CH5|CH6|CH7|CH8
Note that the RX ouput will be EATR.
Bind procedure using serial:
- With the TX off, put the binding plug in and power on the RX (RX LED slow blink), then power it down and remove the binding plug. Receiver should now be in autobind mode.
- Turn on the TX, set protocol = Devo with option=0, turn off the TX (TX is now in autobind mode).
- Tun on RX (RX LED fast blink).
- Turn on RX (RX LED fast blink).
- Turn on TX (RX LED solid, TX LED fast blink).
- Wait for bind on the TX to complete (TX LED solid).
- Make sure to set the RX_Num value for model match.
@@ -111,14 +126,17 @@ Bind procedure using serial:
Bind procedure using PPM:
- With the TX off, put the binding plug in and power on the RX (RX LED slow blink), then power it down and remove the binding plug. Receiver should now be in autobind mode.
- Turn on the TX, set protocol = Devo with option=0, turn off the TX (TX is now in autobind mode).
- Tun on RX (RX LED fast blink).
- Turn on TX (RX LED solid, TX LED fast blink).
Fixed ID is not supported yet.
- Turn on RX (RX LED fast blink).
- Turn the dial to the model number running protocol DEVO on the module.
- Press the bind button and turn on the TX. TX is now in autobind mode.
- Release bind button after 1 second: RX LED solid, TX LED fast blink.
- Wait for bind on the TX to complete (TX LED solid).
- Press the bind button for 1 second. TX/RX is now in fixed ID mode.
- To verify that the TX is in fixed mode: power cycle the TX, the module LED should be solid ON (no blink).
- Note: Autobind/fixed ID mode is linked to the dial number. Which means that you can have multiple dial numbers set to the same protocol DEVO with different RX_Num and have different bind modes at the same time. It enables PPM users to get model match under DEVO.
Note that the RX ouput will be EATR.
##DSM2
##DSM
###Sub_protocol DSM2
Extended limits supported
Telemetry enabled for TSSI and plugins
@@ -319,8 +337,12 @@ A|E|T|R|FLIP|LED|PICTURE|VIDEO|HEADLESS|RTH|AUTOFLIP|PAN|TILT
###Sub_protocol WLH08
###Sub_protocol X600
Only 3 TX IDs available, change RX_Num value 0..2 to cycle through them
###Sub_protocol X800
Only 3 TX IDs available, change RX_Num value 0..2 to cycle through them
###Sub_protocol H26D
###Sub_protocol E010
Only 1 TX ID available
##MT99XX
Autobind protocol

View File

@@ -1,4 +1,5 @@
# DIY-Multiprotocol-TX-Module
Multiprotocol is a 2.4GHz transmitter which enables any TX to control lot of different models available on the market.
The source code is partly based on the Deviation TX project, thanks to all the developpers for their great job on protocols.
@@ -66,19 +67,19 @@ Notes:
###Telemetry
There are 4 protocols supporting telemetry: Hubsan, DSM, FrSky and FrSkyX.
There are 4 protocols supporting telemetry: Hubsan, DSM, FrSkyD and FrSkyX.
Hubsan displays the battery voltage and TX RSSI.
DSM displays TX RSSI and full telemetry.
FrSky displays full telemetry (A0, A1, RX RSSI, TX RSSI and Hub).
FrSkyD displays full telemetry (A0, A1, RX RSSI, TX RSSI and Hub).
FrSkyX displays full telemetry (A1, A2, RX RSSI, TX RSSI and Hub).
### If used in PPM mode
Telemetry is available as a serial 9600 8 n 1 output on the TX pin of the Atmega328p using the FRSky hub format for Hubsan, FrSky, FrSkyX and DSM format for DSM2/X.
Telemetry is available as a serial 9600 8 n 1 output on the TX pin of the Atmega328p using the FrSky hub format for Hubsan, FrSkyD, FrSkyX and DSM format for DSM2/X.
You can connect it to your TX if it is telemetry enabled or use a bluetooth adapter (HC05/HC06) along with an app on your phone/tablet ([app example](https://play.google.com/store/apps/details?id=biz.onomato.frskydash&hl=fr)) to display telemetry information and setup alerts.
@@ -127,10 +128,10 @@ Dial|Protocol|Sub_protocol|RX Num|Power|Auto Bind|Option|RF Module
0|Select serial||||||
1|FLYSKY|Flysky|0|High|No|0|A7105
2|HUBSAN|-|0|High|No|0|A7105
3|FRSKY|-|0|High|No|-41|CC2500
3|FRSKYD|-|0|High|No|-41|CC2500
4|HISKY|Hisky|0|High|No|0|NRF24L01
5|V2X2|-|0|High|No|0|NRF24L01
6|DSM2|DSM2|0|High|No|6|CYRF6936
6|DSM|DSM2|0|High|No|6|CYRF6936
7|DEVO|-|0|High|No|0|CYRF6936
8|YD717|YD717|0|High|No|0|NRF24L01
9|KN|WLTOYS|0|High|No|0|NRF24L01
@@ -160,7 +161,8 @@ Hubsan|
#####CC2500 RF module
Protocol|Sub_protocol
--------|------------
FrSky|
FrSkyV|
FrSkyD|
FrSkyX|
|CH_16
|CH_8
@@ -169,7 +171,7 @@ SFHSS|
#####CYRF6936 RF module
Protocol|Sub_protocol
--------|------------
DSM2|
DSM|
|DSM2
|DSMX
Devo|
@@ -220,6 +222,7 @@ MJXQ|
|X600
|X800
|H26D
|E010
Shenqi|
FY326|
FQ777|
@@ -236,8 +239,8 @@ Note:
###RF modules
Up to 4 RF modules can be installed:
- [A7105](http://www.banggood.com/XL7105-D03-A7105-Modification-Module-Support-Deviation-Galee-Flysky-p-922603.html) for Flysky, Hubsan
- [CC2500](http://www.banggood.com/CC2500-PA-LNA-Romote-Wireless-Module-CC2500-SI4432-NRF24L01-p-922595.html) for FrSky, FrSkyX and SFHSS
- [CYRF6936](http://www.ehirobo.com/walkera-wk-devo-s-mod-devo-8-or-12-to-devo-8s-or-12s-upgrade-module.html) for DSM2, DSMX, DEVO, Walkera
- [CC2500](http://www.banggood.com/CC2500-PA-LNA-Romote-Wireless-Module-CC2500-SI4432-NRF24L01-p-922595.html) for FrSkyV, FrSkyD, FrSkyX and SFHSS
- [CYRF6936](http://www.ehirobo.com/walkera-wk-devo-s-mod-devo-8-or-12-to-devo-8s-or-12s-upgrade-module.html) for DSM, DEVO, J6Pro
- [NRF24L01](http://www.banggood.com/2_4G-NRF24L01-PA-LNA-Wireless-Module-1632mm-Without-Antenna-p-922601.html) for Hisky, V2x2, CX-10, SYMAX and plenty other protocols
RF modules can be installed for protocols need only. Example: if you only need the Hubsan protocol then install only a A7105 on your board.
@@ -378,7 +381,9 @@ This will make sure your ATMEGA328 is well configured and the global TX ID is no
Make sure to follow this procedure: press the bind button, apply power and then release it after 1sec. The LED should be blinking fast indicating a bind status and then fixed on when the bind period is over. It's normal that the LED turns off when you press the bind button, this behavior is not controlled by the Atmega328.
For serial, the preffered method is to bind via the GUI protocol page.
It migth happen that your module is always binding at power up. If this is the case, there is a big chance that you are using an Arduino Pro Mini with an external status LED. To work around this issue connect a 10K resistor between D13 and 3.3V.
If your module is always/sometime binding at power up without pressing the button:
- Arduino Pro Mini with an external status LED: to work around this issue connect a 10K resistor between D13 and 3.3V.
- 4in1 module V1 (check 4in1 pictures): to solve this issue, replacing the BIND led resistor (on the board back) of 1.2K by a 4.7K.
###Report issues
You can report your problem using the [GitHub issue](https://github.com/pascallanger/DIY-Multiprotocol-TX-Module/issues) system or go to the [Main thread on RCGROUPS](http://www.rcgroups.com/forums/showthread.php?t=2165676) to ask your question.