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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-03-14 12:19:11 +00:00
Calibrate rf channels for D8 too
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@ -68,8 +68,7 @@ static void __attribute__((unused)) frsky_rx_set_channel(uint8_t channel)
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[channel]);
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[channel]);
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if(sub_protocol == FRSKY_RX_D8)
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if(sub_protocol == FRSKY_RX_D8)
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CC2500_WriteReg(CC2500_23_FSCAL3, 0x89);
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CC2500_WriteReg(CC2500_23_FSCAL3, 0x89);
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else
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CC2500_WriteReg(CC2500_25_FSCAL1, calData[channel]);
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CC2500_WriteReg(CC2500_25_FSCAL1, calData[channel]);
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frsky_rx_strobe_rx();
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frsky_rx_strobe_rx();
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}
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}
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@ -180,10 +179,8 @@ uint16_t initFrSky_Rx()
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frsky_rx_finetune = eeprom_read_byte((EE_ADDR)temp++);
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frsky_rx_finetune = eeprom_read_byte((EE_ADDR)temp++);
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for (uint8_t ch = 0; ch < 47; ch++)
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for (uint8_t ch = 0; ch < 47; ch++)
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hopping_frequency[ch] = eeprom_read_byte((EE_ADDR)temp++);
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hopping_frequency[ch] = eeprom_read_byte((EE_ADDR)temp++);
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if (sub_protocol == FRSKY_RX_D16FCC || sub_protocol == FRSKY_RX_D16LBT) {
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frsky_rx_calibrate();
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frsky_rx_calibrate();
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
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}
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CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
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CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
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if (option == 0)
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if (option == 0)
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@ -291,8 +288,7 @@ uint16_t FrSky_Rx_callback()
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rx_tx_addr[0] = packet[3]; // TXID
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rx_tx_addr[0] = packet[3]; // TXID
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rx_tx_addr[1] = packet[4]; // TXID
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rx_tx_addr[1] = packet[4]; // TXID
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rx_tx_addr[2] = packet[12]; // RX # (D16)
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rx_tx_addr[2] = packet[12]; // RX # (D16)
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if (sub_protocol == FRSKY_RX_D16FCC || sub_protocol == FRSKY_RX_D16LBT)
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
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CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
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CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
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phase = FRSKY_RX_DATA;
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phase = FRSKY_RX_DATA;
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