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FrSkyX LBT EU addition

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Add support for LBT EU 16/8 channels accessible through sub protocols
EU_16 and EU_8
Also includes modification of FrSkyV, D, X CC2500 initialization
This commit is contained in:
pascallanger 2017-01-30 16:10:32 +01:00
parent 7ac6ff828c
commit e30ebd39fd
7 changed files with 214 additions and 166 deletions
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156
Multiprotocol/Common.ino
View File

@ -97,3 +97,159 @@ void Frsky_init_hop(void)
} }
} }
#endif #endif
/******************************/
/** FrSky V, D and X routines **/
/******************************/
#if defined(FRSKYV_CC2500_INO) || defined(FRSKYD_CC2500_INO) || defined(FRSKYX_CC2500_INO)
const PROGMEM uint8_t FRSKY_common_startreg_cc2500_conf[]= {
CC2500_02_IOCFG0 ,
CC2500_00_IOCFG2 ,
CC2500_17_MCSM1 ,
CC2500_18_MCSM0 ,
CC2500_06_PKTLEN ,
CC2500_07_PKTCTRL1 ,
CC2500_08_PKTCTRL0 ,
CC2500_3E_PATABLE ,
CC2500_0B_FSCTRL1 ,
CC2500_0C_FSCTRL0 , // replaced by option value
CC2500_0D_FREQ2 ,
CC2500_0E_FREQ1 ,
CC2500_0F_FREQ0 ,
CC2500_10_MDMCFG4 ,
CC2500_11_MDMCFG3 ,
CC2500_12_MDMCFG2 ,
CC2500_13_MDMCFG1 ,
CC2500_14_MDMCFG0 ,
CC2500_15_DEVIATN };
#if defined(FRSKYV_CC2500_INO)
const PROGMEM uint8_t FRSKYV_cc2500_conf[]= {
/*02_IOCFG0*/ 0x06 ,
/*00_IOCFG2*/ 0x06 ,
/*17_MCSM1*/ 0x0c ,
/*18_MCSM0*/ 0x18 ,
/*06_PKTLEN*/ 0xff ,
/*07_PKTCTRL1*/ 0x04 ,
/*08_PKTCTRL0*/ 0x05 ,
/*3E_PATABLE*/ 0xfe ,
/*0B_FSCTRL1*/ 0x08 ,
/*0C_FSCTRL0*/ 0x00 ,
/*0D_FREQ2*/ 0x5c ,
/*0E_FREQ1*/ 0x58 ,
/*0F_FREQ0*/ 0x9d ,
/*10_MDMCFG4*/ 0xAA ,
/*11_MDMCFG3*/ 0x10 ,
/*12_MDMCFG2*/ 0x93 ,
/*13_MDMCFG1*/ 0x23 ,
/*14_MDMCFG0*/ 0x7a ,
/*15_DEVIATN*/ 0x41 };
#endif
#if defined(FRSKYD_CC2500_INO)
const PROGMEM uint8_t FRSKYD_cc2500_conf[]= {
/*02_IOCFG0*/ 0x06 ,
/*00_IOCFG2*/ 0x06 ,
/*17_MCSM1*/ 0x0c ,
/*18_MCSM0*/ 0x18 ,
/*06_PKTLEN*/ 0x19 ,
/*07_PKTCTRL1*/ 0x04 ,
/*08_PKTCTRL0*/ 0x05 ,
/*3E_PATABLE*/ 0xff ,
/*0B_FSCTRL1*/ 0x08 ,
/*0C_FSCTRL0*/ 0x00 ,
/*0D_FREQ2*/ 0x5c ,
/*0E_FREQ1*/ 0x76 ,
/*0F_FREQ0*/ 0x27 ,
/*10_MDMCFG4*/ 0xAA ,
/*11_MDMCFG3*/ 0x39 ,
/*12_MDMCFG2*/ 0x11 ,
/*13_MDMCFG1*/ 0x23 ,
/*14_MDMCFG0*/ 0x7a ,
/*15_DEVIATN*/ 0x42 };
#endif
#if defined(FRSKYX_CC2500_INO)
const PROGMEM uint8_t FRSKYX_cc2500_conf[]= {
//FRSKYX
/*02_IOCFG0*/ 0x06 ,
/*00_IOCFG2*/ 0x06 ,
/*17_MCSM1*/ 0x0c ,
/*18_MCSM0*/ 0x18 ,
/*06_PKTLEN*/ 0x1E ,
/*07_PKTCTRL1*/ 0x04 ,
/*08_PKTCTRL0*/ 0x01 ,
/*3E_PATABLE*/ 0xff ,
/*0B_FSCTRL1*/ 0x0A ,
/*0C_FSCTRL0*/ 0x00 ,
/*0D_FREQ2*/ 0x5c ,
/*0E_FREQ1*/ 0x76 ,
/*0F_FREQ0*/ 0x27 ,
/*10_MDMCFG4*/ 0x7B ,
/*11_MDMCFG3*/ 0x61 ,
/*12_MDMCFG2*/ 0x13 ,
/*13_MDMCFG1*/ 0x23 ,
/*14_MDMCFG0*/ 0x7a ,
/*15_DEVIATN*/ 0x51 };
const PROGMEM uint8_t FRSKYXEU_cc2500_conf[]= {
/*02_IOCFG0*/ 0x06 ,
/*00_IOCFG2*/ 0x06 ,
/*17_MCSM1*/ 0x0E ,
/*18_MCSM0*/ 0x18 ,
/*06_PKTLEN*/ 0x23 ,
/*07_PKTCTRL1*/ 0x04 ,
/*08_PKTCTRL0*/ 0x01 ,
/*3E_PATABLE*/ 0xff ,
/*0B_FSCTRL1*/ 0x08 ,
/*0C_FSCTRL0*/ 0x00 ,
/*0D_FREQ2*/ 0x5c ,
/*0E_FREQ1*/ 0x80 ,
/*0F_FREQ0*/ 0x00 ,
/*10_MDMCFG4*/ 0x7B ,
/*11_MDMCFG3*/ 0xF8 ,
/*12_MDMCFG2*/ 0x03 ,
/*13_MDMCFG1*/ 0x23 ,
/*14_MDMCFG0*/ 0x7a ,
/*15_DEVIATN*/ 0x53 };
#endif
const PROGMEM uint8_t FRSKY_common_end_cc2500_conf[][2]= {
{ CC2500_19_FOCCFG, 0x16 },
{ CC2500_1A_BSCFG, 0x6c },
{ CC2500_1B_AGCCTRL2, 0x43 },
{ CC2500_1C_AGCCTRL1, 0x40 },
{ CC2500_1D_AGCCTRL0, 0x91 },
{ CC2500_21_FREND1, 0x56 },
{ CC2500_22_FREND0, 0x10 },
{ CC2500_23_FSCAL3, 0xa9 },
{ CC2500_24_FSCAL2, 0x0A },
{ CC2500_25_FSCAL1, 0x00 },
{ CC2500_26_FSCAL0, 0x11 },
{ CC2500_29_FSTEST, 0x59 },
{ CC2500_2C_TEST2, 0x88 },
{ CC2500_2D_TEST1, 0x31 },
{ CC2500_2E_TEST0, 0x0B },
{ CC2500_03_FIFOTHR, 0x07 },
{ CC2500_09_ADDR, 0x00 } };
void FRSKY_init_cc2500(const uint8_t *ptr)
{
for(uint8_t i=0;i<19;i++)
{
uint8_t reg=pgm_read_byte_near(&FRSKY_common_startreg_cc2500_conf[i]);
uint8_t val=pgm_read_byte_near(&ptr[i]);
if(reg==CC2500_0C_FSCTRL0)
val=option;
CC2500_WriteReg(reg,val);
}
prev_option = option ; // Save option to monitor FSCTRL0 change
for(uint8_t i=0;i<17;i++)
{
uint8_t reg=pgm_read_byte_near(&FRSKY_common_end_cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&FRSKY_common_end_cc2500_conf[i][1]);
CC2500_WriteReg(reg,val);
}
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower();
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
}
#endif

21
Multiprotocol/FrSkyD_cc2500.ino
View File

@ -19,26 +19,7 @@
static void __attribute__((unused)) frsky2way_init(uint8_t bind) static void __attribute__((unused)) frsky2way_init(uint8_t bind)
{ {
// Configure cc2500 for tx mode FRSKY_init_cc2500(FRSKYD_cc2500_conf);
//
for(uint8_t i=0;i<36;i++)
{
uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&cc2500_conf[i][1]);
if(reg==CC2500_0C_FSCTRL0)
val=option;
else
if(reg==CC2500_1B_AGCCTRL2)
val=bind ? 0x43 : 0x03;
CC2500_WriteReg(reg,val);
}
prev_option = option ;
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower();
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_09_ADDR, bind ? 0x03 : rx_tx_addr[3]); CC2500_WriteReg(CC2500_09_ADDR, bind ? 0x03 : rx_tx_addr[3]);
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05);

46
Multiprotocol/FrSkyV_cc2500.ino
View File

@ -27,50 +27,6 @@ enum {
#include "iface_cc2500.h" #include "iface_cc2500.h"
const PROGMEM uint8_t FRSKYV_cc2500_conf[][2]={
{ CC2500_17_MCSM1, 0x0c },
{ CC2500_18_MCSM0, 0x18 },
{ CC2500_06_PKTLEN, 0xff },
{ CC2500_07_PKTCTRL1, 0x04 },
{ CC2500_08_PKTCTRL0, 0x05 },
{ CC2500_3E_PATABLE, 0xfe },
{ CC2500_0B_FSCTRL1, 0x08 },
{ CC2500_0C_FSCTRL0, 0x00 },
{ CC2500_0D_FREQ2, 0x5c },
{ CC2500_0E_FREQ1, 0x58 },
{ CC2500_0F_FREQ0, 0x9d },
{ CC2500_10_MDMCFG4, 0xaa },
{ CC2500_11_MDMCFG3, 0x10 },
{ CC2500_12_MDMCFG2, 0x93 },
{ CC2500_13_MDMCFG1, 0x23 },
{ CC2500_14_MDMCFG0, 0x7a },
{ CC2500_15_DEVIATN, 0x41 }
};
static void __attribute__((unused)) FRSKYV_init()
{
for(uint8_t i=0;i<17;i++)
{
uint8_t reg=pgm_read_byte_near(&FRSKYV_cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&FRSKYV_cc2500_conf[i][1]);
if(reg==CC2500_0C_FSCTRL0)
val=option;
CC2500_WriteReg(reg,val);
}
prev_option = option ;
for(uint8_t i=19;i<36;i++)
{
uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&cc2500_conf[i][1]);
CC2500_WriteReg(reg,val);
}
CC2500_SetTxRxMode(TX_EN);
CC2500_SetPower();
CC2500_Strobe(CC2500_SIDLE); // Go to idle...
}
static uint8_t __attribute__((unused)) FRSKYV_crc8(uint8_t result, uint8_t *data, uint8_t len) static uint8_t __attribute__((unused)) FRSKYV_crc8(uint8_t result, uint8_t *data, uint8_t len)
{ {
for(uint8_t i = 0; i < len; i++) for(uint8_t i = 0; i < len; i++)
@ -199,7 +155,7 @@ uint16_t initFRSKYV()
rx_tx_addr[2]&=0x7F; rx_tx_addr[2]&=0x7F;
crc8 = FRSKYV_crc8_le(rx_tx_addr+2, 2); crc8 = FRSKYV_crc8_le(rx_tx_addr+2, 2);
FRSKYV_init(); FRSKY_init_cc2500(FRSKYV_cc2500_conf);
seed = 1; seed = 1;
binding_idx=0; binding_idx=0;
phase = FRSKYV_DATA1; phase = FRSKYV_DATA1;

59
Multiprotocol/FrSkyX_cc2500.ino
View File

@ -33,39 +33,7 @@ static void __attribute__((unused)) set_start(uint8_t ch )
static void __attribute__((unused)) frskyX_init() static void __attribute__((unused)) frskyX_init()
{ {
for(uint8_t i=0;i<36;i++) FRSKY_init_cc2500((sub_protocol&2)?FRSKYXEU_cc2500_conf:FRSKYX_cc2500_conf); // LBT or FCC
{
uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]);
uint8_t val=pgm_read_byte_near(&cc2500_conf[i][1]);
if(reg==CC2500_06_PKTLEN)
val=0x1E;
else
if(reg==CC2500_08_PKTCTRL0)
val=0x01;
else
if(reg==CC2500_0B_FSCTRL1)
val=0x0A;
else
if(reg==CC2500_10_MDMCFG4)
val=0x7B;
else
if(reg==CC2500_11_MDMCFG3)
val=0x61;
else
if(reg==CC2500_12_MDMCFG2)
val=0x13;
else
if(reg==CC2500_15_DEVIATN)
val=0x51;
CC2500_WriteReg(reg,val);
}
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x04);
prev_option = option ;
CC2500_WriteReg(CC2500_0C_FSCTRL0, option);
CC2500_Strobe(CC2500_SIDLE);
// //
for(uint8_t c=0;c < 48;c++) for(uint8_t c=0;c < 48;c++)
{//calibrate hop channels {//calibrate hop channels
@ -115,7 +83,7 @@ static uint16_t __attribute__((unused)) scaleForPXX( uint8_t i )
static void __attribute__((unused)) frskyX_build_bind_packet() static void __attribute__((unused)) frskyX_build_bind_packet()
{ {
packet[0] = 0x1D; packet[0] = (sub_protocol & 2 ) ? 0x20 : 0x1D ; // LBT or FCC
packet[1] = 0x03; packet[1] = 0x03;
packet[2] = 0x01; packet[2] = 0x01;
// //
@ -131,11 +99,12 @@ static void __attribute__((unused)) frskyX_build_bind_packet()
packet[11] = 0x02; packet[11] = 0x02;
packet[12] = RX_num; packet[12] = RX_num;
// //
memset(&packet[13], 0, 15); uint8_t limit = (sub_protocol & 2 ) ? 31 : 28 ;
uint16_t lcrc = crc_x(&packet[3], 25); memset(&packet[13], 0, limit - 13);
uint16_t lcrc = crc_x(&packet[3], limit-3);
// //
packet[28] = lcrc >> 8; packet[limit++] = lcrc >> 8;
packet[29] = lcrc; packet[limit] = lcrc;
// //
} }
@ -148,7 +117,7 @@ static void __attribute__((unused)) frskyX_data_frame()
uint16_t chan_1 ; uint16_t chan_1 ;
uint8_t startChan = 0; uint8_t startChan = 0;
// //
packet[0] = 0x1D; packet[0] = (sub_protocol & 2 ) ? 0x20 : 0x1D ; // LBT or FCC
packet[1] = rx_tx_addr[3]; packet[1] = rx_tx_addr[3];
packet[2] = rx_tx_addr[2]; packet[2] = rx_tx_addr[2];
packet[3] = 0x02; packet[3] = 0x02;
@ -188,17 +157,18 @@ static void __attribute__((unused)) frskyX_data_frame()
else if (seq_last_rcvd == 0x00) else if (seq_last_rcvd == 0x00)
seq_last_sent = 1; seq_last_sent = 1;
if(sub_protocol== CH_8 )// in X8 mode send only 8ch every 9ms if(sub_protocol & 1 )// in X8 mode send only 8ch every 9ms
lpass = 0 ; lpass = 0 ;
else else
lpass += 1 ; lpass += 1 ;
for (uint8_t i=22;i<28;i++) uint8_t limit = (sub_protocol & 2 ) ? 31 : 28 ;
for (uint8_t i=22;i<limit;i++)
packet[i]=0; packet[i]=0;
uint16_t lcrc = crc_x(&packet[3], 25); uint16_t lcrc = crc_x(&packet[3], limit-3);
packet[28]=lcrc>>8;//high byte packet[limit++]=lcrc>>8;//high byte
packet[29]=lcrc;//low byte packet[limit]=lcrc;//low byte
} }
uint16_t ReadFrSkyX() uint16_t ReadFrSkyX()
@ -292,7 +262,6 @@ uint16_t initFrSkyX()
//rx_tx_addr[2]=0xFD; //rx_tx_addr[2]=0xFD;
//************************ //************************
frskyX_init(); frskyX_init();
CC2500_SetTxRxMode(TX_EN);
// //
if(IS_AUTOBIND_FLAG_on) if(IS_AUTOBIND_FLAG_on)
{ {

2
Multiprotocol/Multi.txt
View File

@ -12,7 +12,7 @@
12,CX10,GREEN,BLUE,DM007,---,J3015_1,J3015_2,MK33041 12,CX10,GREEN,BLUE,DM007,---,J3015_1,J3015_2,MK33041
13,CG023,CG023,YD829,H8_3D 13,CG023,CG023,YD829,H8_3D
14,Bayang,Bayang,H8S3D 14,Bayang,Bayang,H8S3D
15,FrskyX,CH_16,CH_8 15,FrskyX,CH_16,CH_8,EU_16,EU_8
16,ESky 16,ESky
17,MT99xx,MT,H7,YZ,LS,FY805 17,MT99xx,MT,H7,YZ,LS,FY805
18,MJXq,WLH08,X600,X800,H26D,E010,H26WH 18,MJXq,WLH08,X600,X800,H26D,E010,H26WH

36
Multiprotocol/Multiprotocol.h
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@ -19,8 +19,7 @@
#define VERSION_MAJOR 1 #define VERSION_MAJOR 1
#define VERSION_MINOR 1 #define VERSION_MINOR 1
#define VERSION_REVISION 6 #define VERSION_REVISION 6
#define VERSION_PATCH_LEVEL 5 #define VERSION_PATCH_LEVEL 8
//****************** //******************
// Protocols // Protocols
//****************** //******************
@ -158,6 +157,8 @@ enum FRSKYX
{ {
CH_16 = 0, CH_16 = 0,
CH_8 = 1, CH_8 = 1,
EU_16 = 2,
EU_8 = 3,
}; };
enum HONTAI enum HONTAI
{ {
@ -539,6 +540,8 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
sub_protocol==FRSKYX sub_protocol==FRSKYX
CH_16 0 CH_16 0
CH_8 1 CH_8 1
EU_16 2
EU_8 3
sub_protocol==HONTAI sub_protocol==HONTAI
FORMAT_HONTAI 0 FORMAT_HONTAI 0
FORMAT_JJRCX1 1 FORMAT_JJRCX1 1
@ -581,18 +584,40 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
Channels bits are concatenated to fit in 22 bytes like in SBUS protocol Channels bits are concatenated to fit in 22 bytes like in SBUS protocol
*/ */
/* /*
Multiprotocol telemetry definition Multimodule Status
Based on #define MULTI_STATUS
Serial: 100000 Baud 8e2 (same as input)
Format: header (2 bytes) + data (variable)
[0] = 'M' (0x4d)
[1] Length (excluding the 2 header bytes)
[2-xx] data
Type = 0x01 Multimodule Status:
[2] Flags
0x01 = Input signal detected
0x02 = Serial mode enabled
0x04 = protocol is valid
0x08 = module is in binding mode
[3] major
[4] minor
[5] revision
[6] patchlevel,
version of multi code, should be displayed as major.minor.revision.patchlevel
*/
/*
Multiprotocol telemetry definition for OpenTX
Based on #define MULTI_TELEMETRY enables OpenTX to get the multimodule status and select the correct telemetry type automatically.
Serial: 100000 Baud 8e2 (same as input) Serial: 100000 Baud 8e2 (same as input)
TLV Protocol (type, length, value), allows a TX to ignore unknown messages TLV Protocol (type, length, value), allows a TX to ignore unknown messages
Format: header (4 byte) + data (variable) Format: header (4 byte) + data (variable)
[0] = 'M' (0x4d) [0] = 'M' (0x4d)
[1] = 'P' (0x50) [1] = 'P' (0x50)
The first byte is deliberatly chosen to be different from other telemetry protocols The first byte is deliberatly chosen to be different from other telemetry protocols
(e.g. 0xAA for DSM/Multi, 0xAA for FlySky and 0x7e for Frsky) to allow a TX to detect (e.g. 0xAA for DSM/Multi, 0xAA for FlySky and 0x7e for Frsky) to allow a TX to detect
the telemetry format of older versions the telemetry format of older versions
@ -602,7 +627,6 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
[4-xx] data [4-xx] data
Type = 0x01 Multimodule Status: Type = 0x01 Multimodule Status:
[4] Flags [4] Flags
0x01 = Input signal detected 0x01 = Input signal detected

38
Multiprotocol/iface_cc2500.h
View File

@ -157,42 +157,4 @@ enum {
//void CC2500_ReadData(u8 *dpbuffer, int len); //void CC2500_ReadData(u8 *dpbuffer, int len);
//void CC2500_SetTxRxMode(enum TXRX_State); //void CC2500_SetTxRxMode(enum TXRX_State);
const PROGMEM uint8_t cc2500_conf[][2]={
{ CC2500_02_IOCFG0, 0x06 },
{ CC2500_00_IOCFG2, 0x06 },
{ CC2500_17_MCSM1, 0x0c },
{ CC2500_18_MCSM0, 0x18 },
{ CC2500_06_PKTLEN, 0x19 },
{ CC2500_07_PKTCTRL1, 0x04 },
{ CC2500_08_PKTCTRL0, 0x05 },
{ CC2500_3E_PATABLE, 0xff },
{ CC2500_0B_FSCTRL1, 0x08 },
{ CC2500_0C_FSCTRL0, 0x00 }, // option
{ CC2500_0D_FREQ2, 0x5c },
{ CC2500_0E_FREQ1, 0x76 },
{ CC2500_0F_FREQ0, 0x27 },
{ CC2500_10_MDMCFG4, 0xAA },
{ CC2500_11_MDMCFG3, 0x39 },
{ CC2500_12_MDMCFG2, 0x11 },
{ CC2500_13_MDMCFG1, 0x23 },
{ CC2500_14_MDMCFG0, 0x7a },
{ CC2500_15_DEVIATN, 0x42 },
{ CC2500_19_FOCCFG, 0x16 },
{ CC2500_1A_BSCFG, 0x6c },
{ CC2500_1B_AGCCTRL2, 0x43 }, // bind ? 0x43 : 0x03
{ CC2500_1C_AGCCTRL1,0x40 },
{ CC2500_1D_AGCCTRL0,0x91 },
{ CC2500_21_FREND1, 0x56 },
{ CC2500_22_FREND0, 0x10 },
{ CC2500_23_FSCAL3, 0xa9 },
{ CC2500_24_FSCAL2, 0x0A },
{ CC2500_25_FSCAL1, 0x00 },
{ CC2500_26_FSCAL0, 0x11 },
{ CC2500_29_FSTEST, 0x59 },
{ CC2500_2C_TEST2, 0x88 },
{ CC2500_2D_TEST1, 0x31 },
{ CC2500_2E_TEST0, 0x0B },
{ CC2500_03_FIFOTHR, 0x07 },
{ CC2500_09_ADDR, 0x00 }
};
#endif #endif