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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-07-12 17:57:53 +00:00
Add freq fine tune & low power mode (disable lna)
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@ -13,17 +13,18 @@
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#define FRSKYX_FCC_LENGTH 32
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#define FRSKYX_FCC_LENGTH 30
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#define FRSKYX_LBT_LENGTH 35
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#define FRSKYX_LBT_LENGTH 33
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enum {
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enum {
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FRSKYX_RX_BIND,
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FRSKYX_RX_BIND,
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FRSKYX_RX_DATA,
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FRSKYX_RX_DATA,
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};
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};
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static uint16_t frskyx_bind_packets;
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static uint16_t frskyx_bind_check;
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static uint8_t frskyx_rx_txid[3];
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static uint8_t frskyx_rx_txid[3];
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static uint8_t frskyx_rx_chanskip;
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static uint8_t frskyx_rx_chanskip;
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static uint8_t frskyx_rx_disable_lna;
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static void __attribute__((unused)) FrSkyX_Rx_initialise() {
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static void __attribute__((unused)) FrSkyX_Rx_initialise() {
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CC2500_Reset();
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CC2500_Reset();
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@ -32,7 +33,7 @@ static void __attribute__((unused)) FrSkyX_Rx_initialise() {
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CC2500_WriteReg(CC2500_18_MCSM0, 0x18);
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CC2500_WriteReg(CC2500_18_MCSM0, 0x18);
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x04);
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x04);
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CC2500_WriteReg(CC2500_3E_PATABLE, 0xFF);
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CC2500_WriteReg(CC2500_3E_PATABLE, 0xFF);
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CC2500_WriteReg(CC2500_0C_FSCTRL0, 0x00);
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C);
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C);
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23);
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23);
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7A);
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7A);
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@ -81,12 +82,13 @@ static void __attribute__((unused)) FrSkyX_Rx_initialise() {
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break;
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break;
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}
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}
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CC2500_SetTxRxMode(TXRX_OFF); // bypass lna, perhaps have an option for that ?
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frskyx_rx_disable_lna = IS_POWER_FLAG_on;
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CC2500_SetTxRxMode(frskyx_rx_disable_lna ? TXRX_OFF : RX_EN); // lna disable / enable
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_Strobe(CC2500_SFRX);
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CC2500_Strobe(CC2500_SFRX);
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CC2500_Strobe(CC2500_SRX);
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CC2500_Strobe(CC2500_SRX);
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CC2500_WriteReg(CC2500_0A_CHANNR, 0);
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CC2500_WriteReg(CC2500_0A_CHANNR, 0); // bind channel
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delayMicroseconds(1000); // wait for RX to activate
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delayMicroseconds(1000); // wait for RX to activate
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}
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}
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@ -116,7 +118,7 @@ static void __attribute__((unused)) frskyx_rx_calibrate()
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uint8_t __attribute__((unused)) frskyx_rx_check_crc()
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uint8_t __attribute__((unused)) frskyx_rx_check_crc()
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{
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{
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uint8_t limit = packet_length - 4; //(sub_protocol == FRSKYX_LBT) ? 31 : 28;
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uint8_t limit = packet_length - 2;
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uint16_t lcrc = frskyX_crc_x(&packet[3], limit - 3); // computed crc
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uint16_t lcrc = frskyX_crc_x(&packet[3], limit - 3); // computed crc
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uint16_t rcrc = (packet[limit] << 8) | (packet[limit + 1] & 0xff); // received crc
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uint16_t rcrc = (packet[limit] << 8) | (packet[limit + 1] & 0xff); // received crc
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return lcrc == rcrc;
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return lcrc == rcrc;
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@ -124,9 +126,8 @@ uint8_t __attribute__((unused)) frskyx_rx_check_crc()
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uint16_t initFrSkyX_Rx()
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uint16_t initFrSkyX_Rx()
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{
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{
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debugln("initFrSkyX_Rx()");
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FrSkyX_Rx_initialise();
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FrSkyX_Rx_initialise();
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frskyx_bind_packets = 0;
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frskyx_bind_check = 0;
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frskyx_rx_chanskip = 0;
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frskyx_rx_chanskip = 0;
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hopping_frequency_no = 0;
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hopping_frequency_no = 0;
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if (IS_BIND_IN_PROGRESS) {
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if (IS_BIND_IN_PROGRESS) {
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@ -152,30 +153,36 @@ uint16_t initFrSkyX_Rx()
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uint16_t FrSkyX_Rx_callback()
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uint16_t FrSkyX_Rx_callback()
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{
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{
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static uint32_t lasttime=0, counter=0;
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static uint32_t pps_timer=0;
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static int8_t loops=0;
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static uint8_t read_retry=0, pps_counter=0;
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uint8_t len, ch;
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uint8_t len, ch;
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if (prev_option != option)
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{
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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prev_option = option;
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}
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if (frskyx_rx_disable_lna != IS_POWER_FLAG_on) {
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frskyx_rx_disable_lna = IS_POWER_FLAG_on;
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CC2500_SetTxRxMode(frskyx_rx_disable_lna ? TXRX_OFF : RX_EN);
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}
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switch(phase) {
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switch(phase) {
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case FRSKYX_RX_BIND:
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case FRSKYX_RX_BIND:
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len = CC2500_ReadReg(CC2500_3B_RXBYTES | CC2500_READ_BURST) & 0x7F;
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len = CC2500_ReadReg(CC2500_3B_RXBYTES | CC2500_READ_BURST) & 0x7F;
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if(len >= packet_length) {
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if(len >= packet_length) {
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CC2500_ReadData(packet, packet_length);
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CC2500_ReadData(packet, packet_length);
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if (frskyx_rx_check_crc()) {
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if (frskyx_rx_check_crc()) {
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debug("bind:");
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if (packet[5] <= 0x2D) {
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for(uint8_t i=0; i<len; i++)
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for (ch = 0; ch < 5; ch++)
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debug(" %02X", packet[i]);
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hopping_frequency[packet[5]+ch] = packet[6+ch];
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debugln("");
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frskyx_bind_check |= 1 << (packet[5] / 5);
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}
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}
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if (frskyx_bind_check == 0x3ff) {
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debugln("bind complete");
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frskyx_rx_calibrate();
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frskyx_rx_txid[0] = packet[3]; // TXID
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frskyx_rx_txid[0] = packet[3]; // TXID
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frskyx_rx_txid[1] = packet[4]; // TXID
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frskyx_rx_txid[1] = packet[4]; // TXID
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frskyx_rx_txid[2] = packet[12]; // RX #
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frskyx_rx_txid[2] = packet[12]; // RX #
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for (ch = 0; ch < 5; ch++) {
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hopping_frequency[packet[5]+ch] = packet[6+ch];
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frskyx_bind_packets |= 1 << (packet[5] / 5);
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}
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}
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if (frskyx_bind_packets == 0x3ff) {
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debugln("bind complete");
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frskyx_rx_calibrate();
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
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CC2500_WriteReg(CC2500_09_ADDR, frskyx_rx_txid[0]); // set address
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CC2500_WriteReg(CC2500_09_ADDR, frskyx_rx_txid[0]); // set address
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
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@ -200,16 +207,10 @@ uint16_t FrSkyX_Rx_callback()
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if (len >= packet_length) {
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if (len >= packet_length) {
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CC2500_ReadData(packet, packet_length);
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CC2500_ReadData(packet, packet_length);
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if (frskyx_rx_check_crc()) {
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if (frskyx_rx_check_crc()) {
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/*debug("%02X:", hopping_frequency_no);
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for (uint8_t i = 0; i < len; i++)
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debug(" %02X", packet[i]);
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debugln("");*/
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// hop to next channel
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// hop to next channel
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frskyx_rx_chanskip = ((packet[4] & 0xC0) >> 6) | ((packet[5] & 0x3F) << 2);
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frskyx_rx_chanskip = ((packet[4] & 0xC0) >> 6) | ((packet[5] & 0x3F) << 2);
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hopping_frequency_no = (hopping_frequency_no + frskyx_rx_chanskip) % 47;
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hopping_frequency_no = (hopping_frequency_no + frskyx_rx_chanskip) % 47;
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frskyx_rx_set_channel(hopping_frequency_no);
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frskyx_rx_set_channel(hopping_frequency_no);
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if(packet[7] == 0) { // standard packet, decode PXX channels
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if(packet[7] == 0) { // standard packet, decode PXX channels
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// TODO, or just send raw PXX channels ?
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// TODO, or just send raw PXX channels ?
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int16_t chan1 = packet[9] | ((packet[10] & 0x0F) << 8);
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int16_t chan1 = packet[9] | ((packet[10] & 0x0F) << 8);
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@ -217,23 +218,23 @@ uint16_t FrSkyX_Rx_callback()
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//if(chan1 < 2048)
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//if(chan1 < 2048)
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// debugln("Ch1: %d Ch2: %d", chan1, chan2);
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// debugln("Ch1: %d Ch2: %d", chan1, chan2);
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}
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}
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loops = 0;
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read_retry = 0;
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counter++;
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pps_counter++;
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}
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// debug packets per second
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if (millis() - lasttime >= 1000) {
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lasttime = millis();
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debugln("%ld pps", counter);
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counter = 0;
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}
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}
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}
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}
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// debug packets per second
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if (millis() - pps_timer >= 1000) {
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pps_timer = millis();
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debugln("%ld pps", pps_counter);
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pps_counter = 0;
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}
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// skip channel if no packet received in time
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// skip channel if no packet received in time
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if (loops++ >= 9) {
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if (read_retry++ >= 9) {
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debugln("!");
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hopping_frequency_no = (hopping_frequency_no + frskyx_rx_chanskip) % 47;
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hopping_frequency_no = (hopping_frequency_no + frskyx_rx_chanskip) % 47;
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frskyx_rx_set_channel(hopping_frequency_no);
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frskyx_rx_set_channel(hopping_frequency_no);
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loops = 0;
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read_retry = 0;
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}
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}
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break;
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break;
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}
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}
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