Auto-detect FrSky RX format (#286)

* Calibrate rf channels for D8 too

* Auto-detect D16FCC, D16LBT or D8 format during bind
This commit is contained in:
goebish 2019-10-14 00:28:39 +02:00 committed by pascallanger
parent f964cdec98
commit caf145c38a
4 changed files with 38 additions and 38 deletions

View File

@ -20,6 +20,14 @@
#define FRSKY_RX_D16FCC_LENGTH 32
#define FRSKY_RX_D16LBT_LENGTH 35
#define FRSKY_RX_D8_LENGTH 20
#define FRSKY_RX_FORMATS 3
enum
{
FRSKY_RX_D16FCC = 0,
FRSKY_RX_D16LBT,
FRSKY_RX_D8
};
enum {
FRSKY_RX_TUNE_START,
@ -31,6 +39,7 @@
static uint8_t frsky_rx_chanskip;
static int8_t frsky_rx_finetune;
static uint8_t frsky_rx_format;
static void __attribute__((unused)) frsky_rx_strobe_rx()
{
@ -39,11 +48,13 @@ static void __attribute__((unused)) frsky_rx_strobe_rx()
CC2500_Strobe(CC2500_SRX);
}
static void __attribute__((unused)) frsky_rx_initialise() {
static void __attribute__((unused)) frsky_rx_initialise_cc2500() {
const uint8_t frsky_rx_length[] = { FRSKY_RX_D16FCC_LENGTH, FRSKY_RX_D16LBT_LENGTH, FRSKY_RX_D8_LENGTH };
packet_length = frsky_rx_length[frsky_rx_format];
CC2500_Reset();
CC2500_Strobe(CC2500_SIDLE);
CC2500_WriteReg(CC2500_0A_CHANNR, 0); // bind channel
switch (sub_protocol) {
switch (frsky_rx_format) {
case FRSKY_RX_D16FCC:
FRSKY_init_cc2500(FRSKYX_cc2500_conf);
break;
@ -54,7 +65,7 @@ static void __attribute__((unused)) frsky_rx_initialise() {
FRSKY_init_cc2500(FRSKYD_cc2500_conf);
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // always check address
CC2500_WriteReg(CC2500_09_ADDR, 0x03); // bind address
CC2500_WriteReg(CC2500_23_FSCAL3, 0x89); // fixed FSCAL3 ?
CC2500_WriteReg(CC2500_23_FSCAL3, 0x89);
break;
}
rx_disable_lna = IS_POWER_FLAG_on;
@ -66,9 +77,8 @@ static void __attribute__((unused)) frsky_rx_initialise() {
static void __attribute__((unused)) frsky_rx_set_channel(uint8_t channel)
{
CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[channel]);
if(sub_protocol == FRSKY_RX_D8)
if(frsky_rx_format == FRSKY_RX_D8)
CC2500_WriteReg(CC2500_23_FSCAL3, 0x89);
else
CC2500_WriteReg(CC2500_25_FSCAL1, calData[channel]);
frsky_rx_strobe_rx();
}
@ -88,7 +98,7 @@ static void __attribute__((unused)) frsky_rx_calibrate()
static uint8_t __attribute__((unused)) frskyx_rx_check_crc()
{
if (sub_protocol == FRSKY_RX_D8)
if (frsky_rx_format == FRSKY_RX_D8)
return 1;
uint8_t limit = packet_length - 4;
uint16_t lcrc = FrSkyX_crc(&packet[3], limit - 3); // computed crc
@ -104,7 +114,7 @@ static void __attribute__((unused)) frsky_rx_build_telemetry_packet()
uint8_t idx = 0;
uint8_t i;
if (sub_protocol == FRSKY_RX_D16FCC || sub_protocol == FRSKY_RX_D16LBT) {
if (frsky_rx_format == FRSKY_RX_D16FCC || frsky_rx_format == FRSKY_RX_D16LBT) {
// decode D16 channels
raw_channel[0] = ((packet[10] << 8) & 0xF00) | packet[9];
raw_channel[1] = ((packet[11] << 4) & 0xFF0) | (packet[10] >> 4);
@ -144,7 +154,7 @@ static void __attribute__((unused)) frsky_rx_build_telemetry_packet()
packet_in[idx++] = RX_LQI;
packet_in[idx++] = RX_RSSI;
packet_in[idx++] = 0; // start channel
packet_in[idx++] = sub_protocol == FRSKY_RX_D8 ? 8 : 16; // number of channels in packet
packet_in[idx++] = frsky_rx_format == FRSKY_RX_D8 ? 8 : 16; // number of channels in packet
// pack channels
for (i = 0; i < packet_in[3]; i++) {
@ -160,9 +170,6 @@ static void __attribute__((unused)) frsky_rx_build_telemetry_packet()
uint16_t initFrSky_Rx()
{
const uint8_t frsky_rx_length[] = {FRSKY_RX_D16FCC_LENGTH, FRSKY_RX_D16LBT_LENGTH, FRSKY_RX_D8_LENGTH};
packet_length = frsky_rx_length[sub_protocol];
frsky_rx_initialise();
state = 0;
frsky_rx_chanskip = 1;
hopping_frequency_no = 0;
@ -170,20 +177,22 @@ uint16_t initFrSky_Rx()
frsky_rx_finetune = 0;
telemetry_link = 0;
if (IS_BIND_IN_PROGRESS) {
frsky_rx_format = FRSKY_RX_D8;
frsky_rx_initialise_cc2500();
phase = FRSKY_RX_TUNE_START;
}
else {
uint16_t temp = FRSKY_RX_EEPROM_OFFSET;
frsky_rx_format = eeprom_read_byte((EE_ADDR)temp++) % FRSKY_RX_FORMATS;
rx_tx_addr[0] = eeprom_read_byte((EE_ADDR)temp++);
rx_tx_addr[1] = eeprom_read_byte((EE_ADDR)temp++);
rx_tx_addr[2] = eeprom_read_byte((EE_ADDR)temp++);
frsky_rx_finetune = eeprom_read_byte((EE_ADDR)temp++);
for (uint8_t ch = 0; ch < 47; ch++)
hopping_frequency[ch] = eeprom_read_byte((EE_ADDR)temp++);
if (sub_protocol == FRSKY_RX_D16FCC || sub_protocol == FRSKY_RX_D16LBT) {
frsky_rx_initialise_cc2500();
frsky_rx_calibrate();
CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
}
CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
if (option == 0)
@ -233,6 +242,8 @@ uint16_t FrSky_Rx_callback()
}
}
}
frsky_rx_format = (frsky_rx_format + 1) % FRSKY_RX_FORMATS; // switch to next format (D16FCC, D16LBT, D8)
frsky_rx_initialise_cc2500();
frsky_rx_finetune += 10;
CC2500_WriteReg(CC2500_0C_FSCTRL0, frsky_rx_finetune);
frsky_rx_strobe_rx();
@ -291,14 +302,14 @@ uint16_t FrSky_Rx_callback()
rx_tx_addr[0] = packet[3]; // TXID
rx_tx_addr[1] = packet[4]; // TXID
rx_tx_addr[2] = packet[12]; // RX # (D16)
if (sub_protocol == FRSKY_RX_D16FCC || sub_protocol == FRSKY_RX_D16LBT)
CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
phase = FRSKY_RX_DATA;
frsky_rx_set_channel(hopping_frequency_no);
// store txid and channel list
// store format, finetune setting, txid, channel list
uint16_t temp = FRSKY_RX_EEPROM_OFFSET;
eeprom_write_byte((EE_ADDR)temp++, frsky_rx_format);
eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[0]);
eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[1]);
eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[2]);
@ -314,18 +325,18 @@ uint16_t FrSky_Rx_callback()
case FRSKY_RX_DATA:
if (len >= packet_length) {
CC2500_ReadData(packet, packet_length);
if (packet[1] == rx_tx_addr[0] && packet[2] == rx_tx_addr[1] && frskyx_rx_check_crc() && (sub_protocol == FRSKY_RX_D8 || packet[6] == rx_tx_addr[2])) {
if (packet[1] == rx_tx_addr[0] && packet[2] == rx_tx_addr[1] && frskyx_rx_check_crc() && (frsky_rx_format == FRSKY_RX_D8 || packet[6] == rx_tx_addr[2])) {
RX_RSSI = packet[packet_length-2];
if(RX_RSSI >= 128)
RX_RSSI -= 128;
else
RX_RSSI += 128;
// hop to next channel
if (sub_protocol == FRSKY_RX_D16FCC || sub_protocol == FRSKY_RX_D16LBT)
if (frsky_rx_format == FRSKY_RX_D16FCC || frsky_rx_format == FRSKY_RX_D16LBT)
frsky_rx_chanskip = ((packet[4] & 0xC0) >> 6) | ((packet[5] & 0x3F) << 2);
hopping_frequency_no = (hopping_frequency_no + frsky_rx_chanskip) % 47;
frsky_rx_set_channel(hopping_frequency_no);
if((sub_protocol == FRSKY_RX_D8 || packet[7] == 0) && telemetry_link == 0) { // send channels to TX
if((frsky_rx_format == FRSKY_RX_D8 || packet[7] == 0) && telemetry_link == 0) { // send channels to TX
frsky_rx_build_telemetry_packet();
telemetry_link = 1;
}

View File

@ -52,6 +52,6 @@
52,ZSX,280
53,Flyzone,FZ-410
54,Scanner
55,Frsky_RX,D16FCC,D16LBT,D8
55,Frsky_RX
56,AFHDS2A_RX
63,XN_DUMP,250K,1M,2M

View File

@ -290,12 +290,6 @@ enum TRAXXAS
{
RX6519 = 0,
};
enum FRSKY_RX
{
FRSKY_RX_D16FCC= 0,
FRSKY_RX_D16LBT,
FRSKY_RX_D8
};
#define NONE 0
#define P_HIGH 1
@ -595,9 +589,9 @@ enum {
#define AFHDS2A_EEPROM_OFFSET 50 // RX ID, 4 bytes per model id, end is 50+64=114
#define BUGS_EEPROM_OFFSET 114 // RX ID, 2 bytes per model id, end is 114+32=146
#define BUGSMINI_EEPROM_OFFSET 146 // RX ID, 2 bytes per model id, end is 146+32=178
#define FRSKY_RX_EEPROM_OFFSET 178 // (3) TX ID + (1) freq_tune + (47) channels, 51 bytes, end is 178+51=229
#define AFHDS2A_RX_EEPROM_OFFSET 229 // (4) TX ID + (16) channels, 20 bytes, end is 229+20=249
#define AFHDS2A_EEPROM_OFFSET2 249 // RX ID, 4 bytes per model id, end is 249+192=441
#define FRSKY_RX_EEPROM_OFFSET 178 // (1) format + (3) TX ID + (1) freq_tune + (47) channels, 52 bytes, end is 178+52=230
#define AFHDS2A_RX_EEPROM_OFFSET 230 // (4) TX ID + (16) channels, 20 bytes, end is 230+20=250
#define AFHDS2A_EEPROM_OFFSET2 250 // RX ID, 4 bytes per model id, end is 250+192=442
//#define CONFIG_EEPROM_OFFSET 441 // Current configuration of the multimodule
//****************************************
@ -813,10 +807,6 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
RED_SLOW 1
sub_protocol==TRAXXAS
RX6519 0
sub_protocol==FRSKY_RX
FRSKY_RX_D16FCC 0
FRSKY_RX_D16LBT 1
FRSKY_RX_D8 2
Power value => 0x80 0=High/1=Low
Stream[3] = option_protocol;

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@ -551,8 +551,7 @@ const PPM_Parameters PPM_prot[14*NBR_BANKS]= {
EU_16
EU_8
PROTO_FRSKY_RX
FRSKYX_FCC
FRSKYX_LBT
NONE
PROTO_FY326
FY326
FY319