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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
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DSM RX: end bind and increased retry
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2aa96dd129
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c95e576ef3
@ -215,15 +215,20 @@ uint16_t DSM_Rx_callback()
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switch (phase)
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switch (phase)
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{
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{
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case DSM_RX_BIND1:
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case DSM_RX_BIND1:
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if(IS_BIND_DONE) // Abort bind
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{
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phase = DSM_RX_DATA_PREP;
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break;
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}
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if(packet_count==0)
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if(packet_count==0)
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read_retry=0;
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read_retry=0;
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//Check received data
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//Check received data
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rx_status = CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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rx_status = CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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if((rx_status & 0x03) == 0x02) // RXC=1, RXE=0 then 2nd check is required (debouncing)
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if((rx_status & 0x03) == 0x02) // RXC=1, RXE=0 then 2nd check is required (debouncing)
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rx_status |= CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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rx_status |= CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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if((rx_status & 0x07) == 0x02)
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if((rx_status & 0x07) == 0x02)
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{ // data received with no errors
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{ // data received with no errors
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CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80); // Need to set RXOW before data read
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CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80); // Need to set RXOW before data read
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len=CYRF_ReadRegister(CYRF_09_RX_COUNT);
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len=CYRF_ReadRegister(CYRF_09_RX_COUNT);
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debugln("RX:%d, CH:%d",len,hopping_frequency_no);
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debugln("RX:%d, CH:%d",len,hopping_frequency_no);
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if(len==16)
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if(len==16)
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@ -284,7 +289,7 @@ uint16_t DSM_Rx_callback()
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}
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}
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DSM_abort_channel_rx(0); // Abort RX operation and receive
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DSM_abort_channel_rx(0); // Abort RX operation and receive
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if(read_retry==0)
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if(read_retry==0)
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read_retry=4;
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read_retry=8;
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}
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}
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else
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else
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if(rx_status & 0x02) // RX error
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if(rx_status & 0x02) // RX error
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@ -17,6 +17,8 @@
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#include "iface_cyrf6936.h"
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#include "iface_cyrf6936.h"
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//#define DSM_GR300
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#define DSM_BIND_CHANNEL 0x0d //13 This can be any odd channel
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#define DSM_BIND_CHANNEL 0x0d //13 This can be any odd channel
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//During binding we will send BIND_COUNT/2 packets
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//During binding we will send BIND_COUNT/2 packets
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@ -220,8 +222,11 @@ uint16_t ReadDsm()
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uint8_t len;
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uint8_t len;
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#endif
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#endif
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uint8_t start;
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uint8_t start;
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uint16_t timing=5000+(convert_channel_8b(CH13)*100);
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//debugln("T=%u",timing);
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#ifdef DSM_GR300
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uint16_t timing=5000+(convert_channel_8b(CH13)*100);
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debugln("T=%u",timing);
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#endif
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switch(phase)
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switch(phase)
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{
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{
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@ -345,8 +350,10 @@ uint16_t ReadDsm()
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phase++; // change from CH2_CHECK to CH2_READ
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phase++; // change from CH2_CHECK to CH2_READ
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CYRF_SetTxRxMode(RX_EN); //Receive mode
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CYRF_SetTxRxMode(RX_EN); //Receive mode
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //0x80??? //Prepare to receive
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //0x80??? //Prepare to receive
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if(num_ch==3)
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#ifdef DSM_GR300
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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if(num_ch==3)
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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#endif
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return 11000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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return 11000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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case DSM_CH2_READ_A:
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case DSM_CH2_READ_A:
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case DSM_CH2_READ_B:
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case DSM_CH2_READ_B:
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@ -371,8 +378,10 @@ uint16_t ReadDsm()
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Clear abort RX operation
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Clear abort RX operation
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //0x80??? //Prepare to receive
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //0x80??? //Prepare to receive
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phase = DSM_CH2_READ_B;
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phase = DSM_CH2_READ_B;
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if(num_ch==3)
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#ifdef DSM_GR300
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return timing;
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if(num_ch==3)
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return timing;
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#endif
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return 11000;
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return 11000;
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}
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}
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if (phase == DSM_CH2_READ_A)
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if (phase == DSM_CH2_READ_A)
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@ -393,15 +402,19 @@ uint16_t ReadDsm()
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else
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else
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{ //Normal mode 22ms
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{ //Normal mode 22ms
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phase = DSM_CH1_WRITE_A; // change from CH2_CHECK_A to CH1_WRITE_A (ie no upper)
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phase = DSM_CH1_WRITE_A; // change from CH2_CHECK_A to CH1_WRITE_A (ie no upper)
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if(num_ch==3)
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#ifdef DSM_GR300
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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if(num_ch==3)
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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#endif
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return 22000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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return 22000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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}
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}
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}
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}
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else
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else
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phase = DSM_CH1_WRITE_A; // change from CH2_CHECK_B to CH1_WRITE_A (upper already transmitted so transmit lower)
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phase = DSM_CH1_WRITE_A; // change from CH2_CHECK_B to CH1_WRITE_A (upper already transmitted so transmit lower)
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if(num_ch==3)
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#ifdef DSM_GR300
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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if(num_ch==3)
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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#endif
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return 11000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY;
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return 11000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY;
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#endif
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#endif
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}
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}
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@ -19,7 +19,7 @@
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#define VERSION_MAJOR 1
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#define VERSION_MAJOR 1
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#define VERSION_MINOR 3
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#define VERSION_MINOR 3
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#define VERSION_REVISION 1
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#define VERSION_REVISION 1
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#define VERSION_PATCH_LEVEL 20
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#define VERSION_PATCH_LEVEL 21
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//******************
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//******************
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// Protocols
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// Protocols
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@ -1808,8 +1808,8 @@ void update_serial_data()
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else
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else
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if( ((rx_ok_buff[1]&0x80)==0) && ((cur_protocol[1]&0x80)!=0) ) // Bind flag has been reset
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if( ((rx_ok_buff[1]&0x80)==0) && ((cur_protocol[1]&0x80)!=0) ) // Bind flag has been reset
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{ // Request protocol to end bind
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{ // Request protocol to end bind
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#if defined(FRSKYD_CC2500_INO) || defined(FRSKYL_CC2500_INO) || defined(FRSKYX_CC2500_INO) || defined(FRSKYV_CC2500_INO) || defined(AFHDS2A_A7105_INO) || defined(FRSKYR9_SX1276_INO)
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#if defined(FRSKYD_CC2500_INO) || defined(FRSKYL_CC2500_INO) || defined(FRSKYX_CC2500_INO) || defined(FRSKYV_CC2500_INO) || defined(AFHDS2A_A7105_INO) || defined(FRSKYR9_SX1276_INO) || defined(DSM_RX_CYRF6936_INO)
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if(protocol==PROTO_FRSKYD || protocol==PROTO_FRSKYL || protocol==PROTO_FRSKYX || protocol==PROTO_FRSKYX2 || protocol==PROTO_FRSKYV || protocol==PROTO_AFHDS2A || protocol==PROTO_FRSKY_R9 )
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if(protocol==PROTO_FRSKYD || protocol==PROTO_FRSKYL || protocol==PROTO_FRSKYX || protocol==PROTO_FRSKYX2 || protocol==PROTO_FRSKYV || protocol==PROTO_AFHDS2A || protocol==PROTO_FRSKY_R9 || protocol==PROTO_DSM_RX)
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BIND_DONE;
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BIND_DONE;
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else
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else
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#endif
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#endif
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