mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 21:38:14 +00:00
Hitec improvement
Added 3rd byte of TX ID Reproduce the F5 frames from original TX
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@ -120,12 +120,13 @@ static void __attribute__((unused)) HITEC_change_chan_fast()
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static void __attribute__((unused)) HITEC_build_packet()
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static void __attribute__((unused)) HITEC_build_packet()
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{
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{
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static boolean F5_packet=false;
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static boolean F5_frame=false;
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static uint8_t F5_counter=0;
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uint8_t offset;
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uint8_t offset;
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packet[1] = 0x00; // unknown always 0x00 in the dumps. TODO: test if part of ID.
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packet[1] = rx_tx_addr[1];
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packet[2] = rx_tx_addr[3];
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packet[2] = rx_tx_addr[2];
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packet[3] = rx_tx_addr[2];
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packet[3] = rx_tx_addr[3];
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packet[22] = 0xEE; // unknown always 0xEE
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packet[22] = 0xEE; // unknown always 0xEE
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if(IS_BIND_IN_PROGRESS)
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if(IS_BIND_IN_PROGRESS)
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{
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{
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@ -173,20 +174,23 @@ static void __attribute__((unused)) HITEC_build_packet()
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packet[26] = 0x00; // unknown always 0 and the RX doesn't seem to care about the value?
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packet[26] = 0x00; // unknown always 0 and the RX doesn't seem to care about the value?
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}
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}
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//packet[offset] starts with 0x00 and after some time alternate between 0x00 and 0xF5
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if(F5_frame)
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//packet[offset+1] equals to 0x00 if [offset]=0x00 but if [offset]=0xF5 then the values are between 0xDB and 0xE0
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{// No idea what it is but Minima RXs are expecting these frames to work to work
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//TODO: test if it could be RSSI, time, ... related?
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if(F5_packet)
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{
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packet[offset] = 0xF5;
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packet[offset] = 0xF5;
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packet[offset+1] = 0xE0; //value in the dumps between 0xDB and 0xE0
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packet[offset+1] = 0xDF;
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F5_packet=false;
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if((F5_counter%9)==0)
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packet[offset+1] -= 0x04; // every 8 packets send 0xDB
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F5_counter++;
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F5_counter%=59; // every 6 0xDB packets wait only 4 to resend instead of 8
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F5_frame=false; // alternate
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if(IS_BIND_IN_PROGRESS)
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packet[offset+1]++; // when binding the values are 0xE0 and 0xDC
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}
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}
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else
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else
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{
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{
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packet[offset] = 0x00;
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packet[offset] = 0x00;
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packet[offset+1] = 0x00;
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packet[offset+1] = 0x00;
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F5_packet=true;
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F5_frame=true; // alternate
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}
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}
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/* debug("P:");
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/* debug("P:");
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for(uint8_t i=0;i<packet[0]+1;i++)
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for(uint8_t i=0;i<packet[0]+1;i++)
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@ -221,8 +225,8 @@ uint16_t ReadHITEC()
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bind_counter=0;
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bind_counter=0;
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rf_ch_num=HITEC_NUM_FREQUENCE;
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rf_ch_num=HITEC_NUM_FREQUENCE;
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//Set TXID
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//Set TXID
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CC2500_WriteReg(CC2500_04_SYNC1,rx_tx_addr[2]);
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CC2500_WriteReg(CC2500_05_SYNC0,rx_tx_addr[2]);
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CC2500_WriteReg(CC2500_05_SYNC0,rx_tx_addr[3]);
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CC2500_WriteReg(CC2500_04_SYNC1,rx_tx_addr[3]);
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}
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}
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hopping_frequency_no=0;
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hopping_frequency_no=0;
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HITEC_tune_chan();
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HITEC_tune_chan();
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@ -277,7 +281,7 @@ uint16_t ReadHITEC()
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if(len && len<MAX_PKT)
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if(len && len<MAX_PKT)
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{ // Something has been received
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{ // Something has been received
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CC2500_ReadData(pkt, len);
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CC2500_ReadData(pkt, len);
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if( (pkt[len-1] & 0x80) && pkt[0]==len-3 && packet[2]==rx_tx_addr[3] && packet[3]==rx_tx_addr[2])
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if( (pkt[len-1] & 0x80) && pkt[0]==len-3 && pkt[1]==rx_tx_addr[1] && pkt[2]==rx_tx_addr[2] && pkt[3]==rx_tx_addr[3])
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{ //valid crc && length ok && tx_id ok
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{ //valid crc && length ok && tx_id ok
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debug("RX:l=%d",len);
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debug("RX:l=%d",len);
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for(uint8_t i=0;i<len;i++)
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for(uint8_t i=0;i<len;i++)
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@ -322,7 +326,7 @@ uint16_t ReadHITEC()
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debugln("");
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debugln("");
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}
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}
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}
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}
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CC2500_Strobe(CC2500_SRX); // Flush the RX FIFO buffer
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CC2500_Strobe(CC2500_SFRX); // Flush the RX FIFO buffer
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phase = HITEC_PREP;
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phase = HITEC_PREP;
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if(bind_counter)
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if(bind_counter)
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{
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{
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@ -342,8 +346,9 @@ uint16_t initHITEC()
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{
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{
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HITEC_RF_channels();
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HITEC_RF_channels();
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#ifdef HITEC_FORCE_ID // ID and channels taken from dump
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#ifdef HITEC_FORCE_ID // ID and channels taken from dump
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rx_tx_addr[3]=0x6A;
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rx_tx_addr[1]=0x00;
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rx_tx_addr[2]=0x03;
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rx_tx_addr[2]=0x03;
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rx_tx_addr[3]=0x6A;
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memcpy((void *)hopping_frequency,(void *)"\x00\x3A\x4A\x32\x0C\x58\x2A\x10\x26\x20\x08\x60\x68\x70\x78\x80\x88\x56\x5E\x66\x6E",HITEC_NUM_FREQUENCE);
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memcpy((void *)hopping_frequency,(void *)"\x00\x3A\x4A\x32\x0C\x58\x2A\x10\x26\x20\x08\x60\x68\x70\x78\x80\x88\x56\x5E\x66\x6E",HITEC_NUM_FREQUENCE);
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#endif
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#endif
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phase = HITEC_START;
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phase = HITEC_START;
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@ -19,7 +19,7 @@
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#define VERSION_MAJOR 1
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#define VERSION_MAJOR 1
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#define VERSION_MINOR 2
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#define VERSION_MINOR 2
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#define VERSION_REVISION 0
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#define VERSION_REVISION 0
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#define VERSION_PATCH_LEVEL 25
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#define VERSION_PATCH_LEVEL 26
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//******************
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//******************
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// Protocols
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// Protocols
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@ -253,8 +253,7 @@
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//SPORT_POLLING is an implementation of the same polling routine as XJT module for sport telemetry bidirectional communication.
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//SPORT_POLLING is an implementation of the same polling routine as XJT module for sport telemetry bidirectional communication.
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//This is useful for passing sport control frames from TX to RX(ex: changing Betaflight PID or VTX channels on the fly using LUA scripts with OpentX).
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//This is useful for passing sport control frames from TX to RX(ex: changing Betaflight PID or VTX channels on the fly using LUA scripts with OpentX).
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//Using this feature on turnigy 9XR_PRO requires uncomment INVERT_TELEMETRY as this TX output on telemetry pin only inverted signal.
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//Using this feature requires to uncomment INVERT_TELEMETRY as this TX output on telemetry pin only inverted signal.
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//!This is a work in progress!
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//#define SPORT_POLLING
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//#define SPORT_POLLING
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