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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
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ASSAN protocol, FQ777 compilation fix on older Arduino
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fc1429fae5
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174
Multiprotocol/ASSAN_nrf24l01.ino
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174
Multiprotocol/ASSAN_nrf24l01.ino
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/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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#if defined(ASSAN_NRF24L01_INO)
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#include "iface_nrf24l01.h"
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#define ASSAN_PACKET_SIZE 20
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#define ASSAN_RF_BIND_CHANNEL 0x03
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#define ASSAN_ADDRESS_LENGTH 4
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enum {
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ASSAN_BIND0=0,
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ASSAN_BIND1,
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ASSAN_BIND2,
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ASSAN_DATA0,
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ASSAN_DATA1,
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ASSAN_DATA2,
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ASSAN_DATA3,
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ASSAN_DATA4,
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ASSAN_DATA5
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};
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void ASSAN_init()
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{
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NRF24L01_Initialize();
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NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x02); // 4 bytes rx/tx address
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NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, (uint8_t *)"\x80\x80\x80\xB8", ASSAN_ADDRESS_LENGTH); // Bind address
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NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, (uint8_t *)"\x80\x80\x80\xB8", ASSAN_ADDRESS_LENGTH); // Bind address
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NRF24L01_FlushTx();
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
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NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
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NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, ASSAN_PACKET_SIZE);
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NRF24L01_SetPower();
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}
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void ASSAN_send_packet()
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{
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uint16_t temp;
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for(uint8_t i=0;i<10;i++)
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{
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temp=Servo_data[i]<<3;
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packet[2*i]=temp>>8;
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packet[2*i+1]=temp;
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}
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_FlushTx();
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NRF24L01_WritePayload(packet, ASSAN_PACKET_SIZE);
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}
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uint16_t ASSAN_callback()
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{
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switch (phase)
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{
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// Bind
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case ASSAN_BIND0:
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//Config RX @1M
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NRF24L01_WriteReg(NRF24L01_05_RF_CH, ASSAN_RF_BIND_CHANNEL);
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NRF24L01_SetBitrate(NRF24L01_BR_1M); // 1Mbps
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NRF24L01_SetTxRxMode(RX_EN);
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phase++;
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case ASSAN_BIND1:
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//Wait for RX to send the frames
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if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & BV(NRF24L01_07_RX_DR))
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{ //Something has been received
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NRF24L01_ReadPayload(packet, ASSAN_PACKET_SIZE);
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if(packet[19]==0x13)
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{ //Last packet received
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phase++;
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//Switch to TX
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(TX_EN);
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//Prepare packet
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memset(packet,0x05,ASSAN_PACKET_SIZE-5);
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packet[15]=0x99;
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for(uint8_t i=0;i<4;i++)
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packet[16+i]=packet[23-i];
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packet_count=0;
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delay(260);
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return 10000; // Wait 270ms in total...
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}
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}
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return 1000;
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case ASSAN_BIND2:
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// Send 20 packets
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packet_count++;
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if(packet_count==20)
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packet[15]=0x13; // different value for last packet
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NRF24L01_WritePayload(packet, ASSAN_PACKET_SIZE);
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if(packet_count==20)
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{
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phase++;
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delay(2165);
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}
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return 22520;
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// Normal operation
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case ASSAN_DATA0:
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// Bind Done
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BIND_DONE;
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NRF24L01_SetBitrate(NRF24L01_BR_250K); // 250Kbps
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(TX_EN);
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case ASSAN_DATA1:
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case ASSAN_DATA4:
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// Change ID and RF channel
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NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR,packet+20+4*hopping_frequency_no, ASSAN_ADDRESS_LENGTH);
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NRF24L01_WriteReg(NRF24L01_05_RF_CH, hopping_frequency[hopping_frequency_no]);
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hopping_frequency_no^=0x01;
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NRF24L01_SetPower();
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phase=ASSAN_DATA2;
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return 2000;
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case ASSAN_DATA2:
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case ASSAN_DATA3:
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ASSAN_send_packet();
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phase++; // DATA 3 or 4
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return 5000;
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}
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return 0;
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}
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static void __attribute__((unused)) ASSAN_initialize_txid()
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{
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/* //Renaud TXID with Freq=36 and alternate freq 67 or 68 or 69 or 70 or 71 or 73 or 74 or 75 or 78 and may be more...
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packet[23]=0x22;
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packet[22]=0x37;
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packet[21]=0xFA;
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packet[20]=0x53; */
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// Using packet[20..23] to store the ID1 and packet[24..27] to store the ID2
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uint8_t freq=0;
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for(uint8_t i=0;i<4;i++)
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{
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uint8_t temp=rx_tx_addr[0];
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packet[i+20]=temp;
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packet[i+24]=temp+1;
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freq+=temp;
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}
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// Main frequency
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freq=((freq%25)+2)<<1;
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if(freq&0x02) freq|=0x01;
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hopping_frequency[0]=freq;
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// Alternate frequency
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hopping_frequency[1]=freq*2-6;
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hopping_frequency[1]+=analogRead(A6)%12; // Add some random to the second channel
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}
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uint16_t initASSAN()
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{
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ASSAN_initialize_txid();
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ASSAN_init();
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hopping_frequency_no = 0;
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if(IS_AUTOBIND_FLAG_on)
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phase=ASSAN_BIND0;
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else
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phase=ASSAN_DATA0;
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return 1000;
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}
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#endif
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@ -58,17 +58,17 @@ uint8_t CYRF_ReadRegister(uint8_t address)
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uint8_t CYRF_Reset()
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uint8_t CYRF_Reset()
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{
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{
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CYRF_WriteRegister(CYRF_1D_MODE_OVERRIDE, 0x01);//software reset
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CYRF_RST_HI; //Hardware reset
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delayMicroseconds(200);//
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delayMicroseconds(100);
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// RS_HI;
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CYRF_RST_LO;
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// delayMicroseconds(100);
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delayMicroseconds(100);
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// RS_LO;
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/* CYRF_WriteRegister(CYRF_1D_MODE_OVERRIDE, 0x01); //Software reset
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// delayMicroseconds(100);
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delayMicroseconds(200);
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CYRF_WriteRegister(CYRF_0C_XTAL_CTRL, 0xC0); //Enable XOUT as GPIO
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*/ CYRF_WriteRegister(CYRF_0C_XTAL_CTRL, 0xC0); //Enable XOUT as GPIO
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CYRF_WriteRegister(CYRF_0D_IO_CFG, 0x04); //Enable PACTL as GPIO
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CYRF_WriteRegister(CYRF_0D_IO_CFG, 0x04); //Enable PACTL as GPIO
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CYRF_SetTxRxMode(TXRX_OFF);
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CYRF_SetTxRxMode(TXRX_OFF);
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//Verify the CYRD chip is responding
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//Verify the CYRF chip is responding
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return (CYRF_ReadRegister(CYRF_10_FRAMING_CFG) == 0xa5);//return if reset
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return (CYRF_ReadRegister(CYRF_10_FRAMING_CFG) == 0xa5);
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}
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}
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/*
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/*
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@ -32,7 +32,7 @@ enum {
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};
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};
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const uint8_t ssv_xor[] = {0x80,0x44,0x64,0x75,0x6C,0x71,0x2A,0x36,0x7C,0xF1,0x6E,0x52,0x9,0x9D,0x1F,0x78,0x3F,0xE1,0xEE,0x16,0x6D,0xE8,0x73,0x9,0x15,0xD7,0x92,0xE7,0x3,0xBA};
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const uint8_t ssv_xor[] = {0x80,0x44,0x64,0x75,0x6C,0x71,0x2A,0x36,0x7C,0xF1,0x6E,0x52,0x9,0x9D,0x1F,0x78,0x3F,0xE1,0xEE,0x16,0x6D,0xE8,0x73,0x9,0x15,0xD7,0x92,0xE7,0x3,0xBA};
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const uint8_t FQ777_bind_addr [] = {0xe7,0xe7,0xe7,0xe7,0x67};
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uint8_t FQ777_bind_addr [] = {0xe7,0xe7,0xe7,0xe7,0x67};
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static void __attribute__((unused)) ssv_pack_dpl(uint8_t addr[], uint8_t pid, uint8_t* len, uint8_t* payload, uint8_t* packed_payload)
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static void __attribute__((unused)) ssv_pack_dpl(uint8_t addr[], uint8_t pid, uint8_t* len, uint8_t* payload, uint8_t* packed_payload)
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{
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{
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@ -51,7 +51,8 @@ enum PROTOCOLS
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MODE_FY326=20, // =>NRF24L01
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MODE_FY326=20, // =>NRF24L01
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MODE_SFHSS=21, // =>CC2500
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MODE_SFHSS=21, // =>CC2500
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MODE_J6PRO=22, // =>CYRF6936
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MODE_J6PRO=22, // =>CYRF6936
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MODE_FQ777=23 // =>NRF24L01
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MODE_FQ777=23, // =>NRF24L01
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MODE_ASSAN=24 // =>NRF24L01
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};
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};
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enum Flysky
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enum Flysky
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@ -238,6 +239,8 @@ struct PPM_Parameters
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#else
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#else
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#define CYRF_CSN_on PORTB |= _BV(1) //D9
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#define CYRF_CSN_on PORTB |= _BV(1) //D9
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#define CYRF_CSN_off PORTB &= ~_BV(1) //D9
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#define CYRF_CSN_off PORTB &= ~_BV(1) //D9
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#define CYRF_RST_HI PORTC|=_BV(5) //reset cyrf
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#define CYRF_RST_LO PORTB &= ~_BV(5) //
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#endif
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#endif
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//
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//
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#ifdef XMEGA
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#ifdef XMEGA
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@ -248,9 +251,6 @@ struct PPM_Parameters
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#define SDO_0 (PIND & (1<<SDO_pin)) == 0x00 //D6
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#define SDO_0 (PIND & (1<<SDO_pin)) == 0x00 //D6
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#endif
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#endif
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//
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//
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#define RS_HI PORTC|=_BV(5) //reset pin cyrf
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#define RX_LO PORTB &= ~_BV(5)//
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//
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//
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//
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// LED
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// LED
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@ -480,6 +480,7 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
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SFHSS 21
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SFHSS 21
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J6PRO 22
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J6PRO 22
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FQ777 23
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FQ777 23
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ASSAN 24
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BindBit=> 0x80 1=Bind/0=No
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BindBit=> 0x80 1=Bind/0=No
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AutoBindBit=> 0x40 1=Yes /0=No
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AutoBindBit=> 0x40 1=Yes /0=No
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RangeCheck=> 0x20 1=Yes /0=No
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RangeCheck=> 0x20 1=Yes /0=No
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@ -584,6 +584,12 @@ static void protocol_init()
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next_callback=initFQ777();
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next_callback=initFQ777();
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remote_callback = FQ777_callback;
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remote_callback = FQ777_callback;
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break;
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break;
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#endif
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#if defined(ASSAN_NRF24L01_INO)
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case MODE_ASSAN:
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next_callback=initASSAN();
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remote_callback = ASSAN_callback;
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break;
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#endif
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#endif
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}
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}
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@ -674,7 +680,7 @@ static void module_reset()
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case MODE_J6PRO:
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case MODE_J6PRO:
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CYRF_Reset();
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CYRF_Reset();
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break;
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break;
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default: // MODE_HISKY, MODE_V2X2, MODE_YD717, MODE_KN, MODE_SYMAX, MODE_SLT, MODE_CX10, MODE_CG023, MODE_BAYANG, MODE_ESKY, MODE_MT99XX, MODE_MJXQ, MODE_SHENQI, MODE_FY326, MODE_FQ777
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default: // MODE_HISKY, MODE_V2X2, MODE_YD717, MODE_KN, MODE_SYMAX, MODE_SLT, MODE_CX10, MODE_CG023, MODE_BAYANG, MODE_ESKY, MODE_MT99XX, MODE_MJXQ, MODE_SHENQI, MODE_FY326, MODE_FQ777, MODE_ASSAN
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NRF24L01_Reset();
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NRF24L01_Reset();
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break;
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break;
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}
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}
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@ -1,3 +1,18 @@
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/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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#if defined(SHENQI_NRF24L01_INO)
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#if defined(SHENQI_NRF24L01_INO)
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#include "iface_nrf24l01.h"
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#include "iface_nrf24l01.h"
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@ -65,6 +65,7 @@
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#define SHENQI_NRF24L01_INO
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#define SHENQI_NRF24L01_INO
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#define FY326_NRF24L01_INO
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#define FY326_NRF24L01_INO
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#define FQ777_NRF24L01_INO
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#define FQ777_NRF24L01_INO
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#define ASSAN_NRF24L01_INO
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#endif
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#endif
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/**************************/
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/**************************/
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@ -185,6 +186,8 @@ const PPM_Parameters PPM_prot[15]= {
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NONE
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NONE
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MODE_FQ777
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MODE_FQ777
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NONE
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NONE
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MODE_ASSAN
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NONE
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RX_Num value between 0 and 15
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RX_Num value between 0 and 15
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