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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 22:38:14 +00:00
DSM and DSM RX: fix bind
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ee080839b1
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@ -77,6 +77,7 @@ const uint8_t PROGMEM DSM_init_vals[][2] = {
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{CYRF_28_CLK_EN, 0x02}, // Force receive clock enable
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{CYRF_28_CLK_EN, 0x02}, // Force receive clock enable
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{CYRF_32_AUTO_CAL_TIME, 0x3c}, // Default init value
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{CYRF_32_AUTO_CAL_TIME, 0x3c}, // Default init value
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{CYRF_35_AUTOCAL_OFFSET, 0x14}, // Default init value
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{CYRF_35_AUTOCAL_OFFSET, 0x14}, // Default init value
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{CYRF_26_XTAL_CFG, 0x08}, // Start delay
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{CYRF_06_RX_CFG, 0x4A}, // LNA enabled, RX override enabled, Fast turn mode enabled, RX is 1MHz below TX
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{CYRF_06_RX_CFG, 0x4A}, // LNA enabled, RX override enabled, Fast turn mode enabled, RX is 1MHz below TX
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{CYRF_1B_TX_OFFSET_LSB, 0x55}, // Default init value
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{CYRF_1B_TX_OFFSET_LSB, 0x55}, // Default init value
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{CYRF_1C_TX_OFFSET_MSB, 0x05}, // Default init value
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{CYRF_1C_TX_OFFSET_MSB, 0x05}, // Default init value
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@ -199,23 +199,25 @@ static void __attribute__((unused)) DSM_abort_channel_rx(uint8_t ch)
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uint16_t DSM_Rx_callback()
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uint16_t DSM_Rx_callback()
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{
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{
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uint8_t rx_status;
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uint8_t rx_status;
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static uint8_t read_retry=10;
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static uint8_t read_retry=0;
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static uint16_t pps_counter;
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static uint16_t pps_counter;
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static uint32_t pps_timer = 0;
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static uint32_t pps_timer = 0;
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switch (phase)
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switch (phase)
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{
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{
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case DSM_RX_BIND1:
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case DSM_RX_BIND1:
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if(packet_count==0)
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read_retry=0;
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//Check received data
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//Check received data
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rx_status = CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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rx_status = CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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if((rx_status & 0x03) == 0x02) // RXC=1, RXE=0 then 2nd check is required (debouncing)
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if((rx_status & 0x03) == 0x02) // RXC=1, RXE=0 then 2nd check is required (debouncing)
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rx_status |= CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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rx_status |= CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
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if((rx_status & 0x07) == 0x02 && read_retry)
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if((rx_status & 0x07) == 0x02)
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{ // data received with no errors
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{ // data received with no errors
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CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80); // Need to set RXOW before data read
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CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80); // Need to set RXOW before data read
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rx_status=CYRF_ReadRegister(CYRF_09_RX_COUNT);
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len=CYRF_ReadRegister(CYRF_09_RX_COUNT);
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debugln("RX:%d",rx_status);
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debugln("RX:%d, CH:%d",len,hopping_frequency_no);
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if(rx_status==16)
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if(len==16)
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{
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{
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CYRF_ReadDataPacketLen(packet_in, 16);
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CYRF_ReadDataPacketLen(packet_in, 16);
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if(DSM_Rx_bind_check_validity())
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if(DSM_Rx_bind_check_validity())
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@ -263,29 +265,41 @@ uint16_t DSM_Rx_callback()
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debugln(", num_ch=%d, type=%02X",num_ch, DSM_rx_type);
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debugln(", num_ch=%d, type=%02X",num_ch, DSM_rx_type);
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20); // Abort RX operation
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20); // Abort RX operation
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CYRF_SetTxRxMode(TX_EN); // Force end state TX
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CYRF_SetTxRxMode(TX_EN); // Force end state TX
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CYRF_ConfigDataCode((const uint8_t *)"\x98\x88\x1B\xE4\x30\x79\x03\x84", 16);
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Clear abort RX
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Clear abort RX
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DSM_Rx_build_bind_packet();
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DSM_Rx_build_bind_packet();
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bind_counter=500;
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bind_counter=500;
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phase++; // DSM_RX_BIND2;
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phase++; // DSM_RX_BIND2;
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return 1000;
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}
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}
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}
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}
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if(read_retry)
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DSM_abort_channel_rx(0); // Abort RX operation and receive
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read_retry--;
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if(read_retry==0)
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read_retry=4;
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}
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}
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else
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else
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if(rx_status & 0x02) // RX error
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DSM_abort_channel_rx(0); // Abort RX operation and receive
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packet_count++;
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if(packet_count>12)
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{
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{
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packet_count=1;
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if(read_retry)
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read_retry--;
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if(read_retry==0)
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{
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packet_count=0;
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hopping_frequency_no++; // Change channel
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hopping_frequency_no++; // Change channel
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hopping_frequency_no %= 0x50;
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hopping_frequency_no %= 0x50;
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hopping_frequency_no |= 0x01; // Odd channels only
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hopping_frequency_no |= 0x01; // Odd channels only
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CYRF_ConfigRFChannel(hopping_frequency_no);
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CYRF_ConfigRFChannel(hopping_frequency_no);
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//debugln("ch:%d",hopping_frequency_no);
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read_retry = 10;
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DSM_abort_channel_rx(0); // Abort RX operation and receive
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DSM_abort_channel_rx(0); // Abort RX operation and receive
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}
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}
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return 12500;
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}
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return 1000;
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case DSM_RX_BIND2:
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case DSM_RX_BIND2:
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//Transmit settings back
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//Transmit settings back
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CYRF_WriteDataPacketLen(packet,10); // Does not work ?!?!?
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CYRF_WriteDataPacketLen(packet,10); // Send packet
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if(bind_counter--==0)
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if(bind_counter--==0)
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{
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{
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BIND_DONE;
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BIND_DONE;
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@ -296,7 +310,6 @@ uint16_t DSM_Rx_callback()
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hopping_frequency_no = 0;
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hopping_frequency_no = 0;
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read_retry=0;
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read_retry=0;
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rx_data_started = false;
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rx_data_started = false;
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read_retry=0;
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pps_counter = 0;
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pps_counter = 0;
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RX_LQI = 100;
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RX_LQI = 100;
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DSM_cyrf_configdata();
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DSM_cyrf_configdata();
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@ -457,7 +470,10 @@ uint16_t initDSM_Rx()
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hopping_frequency_no = 0;
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hopping_frequency_no = 0;
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if (IS_BIND_IN_PROGRESS)
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if (IS_BIND_IN_PROGRESS)
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{
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packet_count=0;
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phase = DSM_RX_BIND1;
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phase = DSM_RX_BIND1;
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}
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else
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else
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{
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{
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uint16_t temp = DSM_RX_EEPROM_OFFSET;
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uint16_t temp = DSM_RX_EEPROM_OFFSET;
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@ -471,7 +487,7 @@ uint16_t initDSM_Rx()
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debugln(", type=%02X", DSM_rx_type);
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debugln(", type=%02X", DSM_rx_type);
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phase = DSM_RX_DATA_PREP;
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phase = DSM_RX_DATA_PREP;
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}
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}
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return 1000;
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return 15000;
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}
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}
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#endif
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#endif
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@ -230,7 +230,7 @@ uint16_t ReadDsm()
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#if defined DSM_TELEMETRY
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#if defined DSM_TELEMETRY
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case DSM_BIND_CHECK:
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case DSM_BIND_CHECK:
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//64 SDR Mode is configured so only the 8 first values are needed but we need to write 16 values...
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//64 SDR Mode is configured so only the 8 first values are needed but we need to write 16 values...
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CYRF_ConfigDataCode((const uint8_t *)"\x98\x88\x1B\xE4\x30\x79\x03\x84\xC9\x2C\x06\x93\x86\xB9\x9E\xD7", 16);
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CYRF_ConfigDataCode((const uint8_t *)"\x98\x88\x1B\xE4\x30\x79\x03\x84", 16);
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CYRF_SetTxRxMode(RX_EN); //Receive mode
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CYRF_SetTxRxMode(RX_EN); //Receive mode
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //Prepare to receive
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //Prepare to receive
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bind_counter=2*DSM_BIND_COUNT; //Timeout of 4.2s if no packet received
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bind_counter=2*DSM_BIND_COUNT; //Timeout of 4.2s if no packet received
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@ -255,6 +255,10 @@ uint16_t ReadDsm()
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return 2000;
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return 2000;
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}
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}
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}
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}
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20); // Abort RX operation
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CYRF_SetTxRxMode(RX_EN); // Force end state read
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Clear abort RX operation
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x83); // Prepare to receive
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}
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}
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else
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else
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if((rx_phase & 0x02) != 0x02)
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if((rx_phase & 0x02) != 0x02)
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@ -19,7 +19,7 @@
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#define VERSION_MAJOR 1
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#define VERSION_MAJOR 1
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#define VERSION_MINOR 3
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#define VERSION_MINOR 3
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#define VERSION_REVISION 0
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#define VERSION_REVISION 0
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#define VERSION_PATCH_LEVEL 98
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#define VERSION_PATCH_LEVEL 99
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//******************
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//******************
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// Protocols
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// Protocols
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@ -674,10 +674,9 @@ Also on er9x you will need to be sure to match the polarity of the telemetry ser
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The DSM receiver protocol enables master/slave trainning, separate access from 2 different radios to the same model,...
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The DSM receiver protocol enables master/slave trainning, separate access from 2 different radios to the same model,...
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Notes:
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Notes:
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- Automatically support DSM 2/X 11/22 1024/2048
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- Automatically detect DSM 2/X 11/22ms 1024/2048res
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- Currently the bind response does not work which means that the TX doesn't know what the DSM RX protocol has selected. **You must manually select the right protocol on the TX**. By default the RX will select DSMX/11ms.
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- Available in OpenTX 2.3.3+, Trainer Mode Master/Multi
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- Available in OpenTX 2.3.3, Trainer Mode Master/Multi
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- Channels 1..4 are remapped to the module default channel order unless on OpenTX 2.3.3+ you use the "Disable channel mapping" feature on the GUI.
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- Channels 1..4 are remapped to the module default
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- Extended limits supported
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- Extended limits supported
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CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8|CH9|CH10|CH11|CH12
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CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8|CH9|CH10|CH11|CH12
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