mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 15:58:12 +00:00
Multi 5-in-1 initial support
This commit is contained in:
parent
0316c9eea9
commit
90b287f1f4
@ -3,94 +3,77 @@
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#define FREQ_MAP_SIZE 29
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// TODO the channel spacing is equal, consider calculating the new channel instead of using lookup tables (first_chan + index * step)
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uint8_t FrSkyR9_step = 1;
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uint32_t FrSkyR9_freq_map[FREQ_MAP_SIZE];
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static uint32_t FrSkyR9_freq_map_915[FREQ_MAP_SIZE] =
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static void __attribute__((unused)) FrSkyR9_build_packet()
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{
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914472960,
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914972672,
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915472384,
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915972096,
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916471808,
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916971520,
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917471232,
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917970944,
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918470656,
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918970368,
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919470080,
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919969792,
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920469504,
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920969216,
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921468928,
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921968640,
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922468352,
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922968064,
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923467776,
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923967488,
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924467200,
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924966912,
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925466624,
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925966336,
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926466048,
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926965760,
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927465472,
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//Header
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packet[0] = 0x3C; // unknown but constant
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// last two determined by FrSkyR9_step
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0,
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0
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};
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//ID
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packet[1] = rx_tx_addr[3];
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packet[2] = rx_tx_addr[2];
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static uint32_t FrSkyR9_freq_map_868[FREQ_MAP_SIZE] =
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{
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859504640,
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860004352,
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860504064,
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861003776,
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861503488,
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862003200,
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862502912,
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863002624,
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863502336,
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864002048,
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864501760,
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865001472,
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865501184,
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866000896,
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866500608,
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867000320,
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867500032,
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867999744,
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868499456,
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868999168,
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869498880,
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869998592,
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870498304,
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870998016,
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871497728,
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871997440,
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872497152,
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//Hopping
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packet[3] = hopping_frequency_no; // current channel index
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packet[4] = FrSkyR9_step; // step size and last 2 channels start index
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// last two determined by FrSkyR9_step
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0,
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0
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};
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//RX number
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packet[5] = RX_num; // receiver number from OpenTX
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static uint8_t FrSkyR9_step = 1;
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static uint32_t* FrSkyR9_freq_map = FrSkyR9_freq_map_915;
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// Set packet[6]=failsafe, packet[7]=0?? and packet[8..19]=channels data
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FrSkyX_channels(6);
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//Bind
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if(IS_BIND_IN_PROGRESS)
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packet[6] = 0x41;
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//SPort
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packet[20] = 0x08; //FrSkyX_TX_Seq=8 at startup
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packet[21] = 0x00; // length?
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packet[22] = 0x00; // data1?
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packet[23] = 0x00; // data2?
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//CRC
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uint16_t crc = FrSkyX_crc(packet, 24);
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packet[24] = crc; // low byte
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packet[25] = crc >> 8; // high byte
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}
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uint16_t initFrSkyR9()
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{
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set_rx_tx_addr(MProtocol_id_master);
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if(sub_protocol & 0x01)
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FrSkyR9_freq_map = FrSkyR9_freq_map_868;
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else
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FrSkyR9_freq_map = FrSkyR9_freq_map_915;
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//FrSkyR9_step
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FrSkyR9_step = 1 + (random(0xfefefefe) % 24);
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FrSkyR9_freq_map[27] = FrSkyR9_freq_map[FrSkyR9_step];
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FrSkyR9_freq_map[28] = FrSkyR9_freq_map[FrSkyR9_step+1];
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debugln("Step=%d", FrSkyR9_step);
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//Frequency table
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uint32_t start_freq=914472960; //915
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if(sub_protocol & 0x01)
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start_freq=859504640; //868
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for(uint8_t i=0;i<FREQ_MAP_SIZE-2;i++)
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{
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FrSkyR9_freq_map[i]=start_freq;
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debugln("F%d=%lu", i, FrSkyR9_freq_map[i]);
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start_freq+=0x7A000;
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}
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// Last two frequencies determined by FrSkyR9_step
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FrSkyR9_freq_map[FREQ_MAP_SIZE-2] = FrSkyR9_freq_map[FrSkyR9_step];
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debugln("F%d=%lu", FREQ_MAP_SIZE-2, FrSkyR9_freq_map[FREQ_MAP_SIZE-2]);
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FrSkyR9_freq_map[FREQ_MAP_SIZE-1] = FrSkyR9_freq_map[FrSkyR9_step+1];
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debugln("F%d=%lu", FREQ_MAP_SIZE-1, FrSkyR9_freq_map[FREQ_MAP_SIZE-1]);
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hopping_frequency_no = 0;
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//Set FrSkyFormat
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if((sub_protocol & 0x02) == 0)
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FrSkyFormat=0; // 16 channels
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else
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FrSkyFormat=1; // 8 channels
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debugln("%dCH", FrSkyFormat&1 ? 8:16);
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//SX1276 Init
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SX1276_SetMode(true, false, SX1276_OPMODE_SLEEP);
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SX1276_SetMode(true, false, SX1276_OPMODE_STDBY);
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@ -106,17 +89,16 @@ uint16_t initFrSkyR9()
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SX1276_SetPreambleLength(9);
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SX1276_SetDetectionThreshold(SX1276_MODEM_DETECTION_THRESHOLD_SF6);
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SX1276_SetLna(1, true);
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SX1276_SetHopPeriod(0); // 0 = disabled, we hope frequencies manually
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SX1276_SetHopPeriod(0); // 0 = disabled, we hop frequencies manually
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SX1276_SetPaDac(true);
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SX1276_SetTxRxMode(TX_EN); // Set RF switch to TX
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hopping_frequency_no = 0;
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// TODO this can probably be shorter
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return 20000; // start calling FrSkyR9_callback in 20 milliseconds
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}
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uint16_t FrSkyR9_callback()
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{
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//Force standby
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SX1276_SetMode(true, false, SX1276_OPMODE_STDBY);
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//SX1276_WriteReg(SX1276_11_IRQFLAGSMASK, 0xbf); // use only RxDone interrupt
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@ -135,74 +117,28 @@ uint16_t FrSkyR9_callback()
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// SX1276_WriteReg(SX1276_01_OPMODE, 0x81); // STDBY
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//SX1276_WriteReg(SX1276_09_PACONFIG, 0xF0);
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// SX1276_WriteReg(SX1276_09_PACONFIG, 0xF0);
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//Set power
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// max power: 15dBm (10.8 + 0.6 * MaxPower [dBm])
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// output_power: 2 dBm (17-(15-OutputPower) (if pa_boost_pin == true))
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SX1276_SetPaConfig(true, 7, 0);
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SX1276_SetFrequency(FrSkyR9_freq_map[hopping_frequency_no]); // set current center frequency
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delayMicroseconds(500);
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packet[0] = 0x3C; // ????
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packet[1] = rx_tx_addr[3]; // unique radio id
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packet[2] = rx_tx_addr[2]; // unique radio id
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packet[3] = hopping_frequency_no; // current channel index
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packet[4] = FrSkyR9_step; // step size and last 2 channels start index
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packet[5] = RX_num; // receiver number from OpenTX
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// binding mode: 0x00 regular / 0x41 bind?
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if(IS_BIND_IN_PROGRESS)
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packet[6] = 0x41;
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else
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packet[6] = 0x00;
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// TODO
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packet[7] = 0x00; // fail safe related (looks like the same sequence of numbers as FrskyX protocol)
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// two channel are spread over 3 bytes.
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// each channel is 11 bit + 1 bit (msb) that states whether
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// it's part of the upper channels (9-16) or lower (1-8) (0 - lower 1 - upper)
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#define CH_POS 8
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static uint8_t chan_start=0;
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uint8_t chan_index = chan_start;
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for(int i = 0; i < 12; i += 3)
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{
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// map channel values (0-2047) to (64-1984)
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uint16_t ch1 = FrSkyX_scaleForPXX(chan_index);
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uint16_t ch2 = FrSkyX_scaleForPXX(chan_index + 1);
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packet[CH_POS + i] = ch1;
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packet[CH_POS + i + 1] = (ch1 >> 8) | (ch2 << 4);
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packet[CH_POS + i + 2] = (ch2 >> 4);
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chan_index += 2;
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}
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if((sub_protocol & 0x02) == 0)
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chan_start ^= 0x08; // Alternate between lower and upper when 16 channels is used
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packet[20] = 0x08; // ????
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packet[21] = 0x00; // ????
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packet[22] = 0x00; // ????
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packet[23] = 0x00; // ????
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uint16_t crc = FrSkyX_crc(packet, 24);
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packet[24] = crc; // low byte
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packet[25] = crc >> 8; // high byte
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SX1276_WritePayloadToFifo(packet, 26);
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//Set frequency
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hopping_frequency_no = (hopping_frequency_no + FrSkyR9_step) % FREQ_MAP_SIZE;
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SX1276_SetFrequency(FrSkyR9_freq_map[hopping_frequency_no]); // set current center frequency
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delayMicroseconds(500); //Frequency settle time
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//Build packet
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FrSkyR9_build_packet();
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//Send
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SX1276_WritePayloadToFifo(packet, 26);
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SX1276_SetMode(true, false, SX1276_OPMODE_TX);
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// need to clear RegIrqFlags?
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return 19400;
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return 20000;
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}
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#endif
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@ -19,7 +19,7 @@
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#define VERSION_MAJOR 1
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#define VERSION_MINOR 3
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#define VERSION_REVISION 1
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#define VERSION_PATCH_LEVEL 12
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#define VERSION_PATCH_LEVEL 13
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//******************
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// Protocols
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@ -322,7 +322,7 @@ void setup()
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pinMode(RX_INV_pin,OUTPUT);
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#if defined TELEMETRY
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#if defined INVERT_SERIAL
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TX_INV_on; //activate inverter for both serial TX and RX signals
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TX_INV_on; // activate inverter for both serial TX and RX signals
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RX_INV_on;
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#else
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TX_INV_off;
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@ -331,11 +331,20 @@ void setup()
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#endif
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pinMode(BIND_pin,INPUT_PULLUP);
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pinMode(PPM_pin,INPUT);
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pinMode(S1_pin,INPUT_PULLUP);//dial switch
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pinMode(S1_pin,INPUT_PULLUP); // dial switch
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pinMode(S2_pin,INPUT_PULLUP);
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pinMode(S3_pin,INPUT_PULLUP);
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pinMode(S4_pin,INPUT_PULLUP);
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#ifdef MULTI_5IN1_INTERNAL
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//pinMode(SX1276_RST_pin,OUTPUT); // already done by LED2_pin
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pinMode(SX1276_TXEN_pin,OUTPUT); // PB0
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pinMode(SX1276_DIO0_pin,INPUT_PULLUP);
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#else
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//Random pin
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pinMode(RND_pin, INPUT_ANALOG); // set up PB0 pin for analog input
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#endif
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#if defined ENABLE_DIRECT_INPUTS
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#if defined (DI1_PIN)
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pinMode(DI1_PIN,INPUT_PULLUP);
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@ -351,9 +360,6 @@ void setup()
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#endif
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#endif
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//Random pins
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pinMode(PB0, INPUT_ANALOG); // set up pin for analog input
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//Timers
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init_HWTimer(); //0.5us
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#else
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@ -410,6 +416,10 @@ void setup()
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#ifdef NRF_CSN_pin
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NRF_CSN_on;
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#endif
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#ifdef SPI_CSN_pin
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SPI_CSN_on;
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#endif
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// Set SPI lines
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#ifdef STM32_BOARD
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initSPI2();
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@ -473,7 +483,12 @@ void setup()
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#ifdef STM32_BOARD
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uint32_t seed=0;
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for(uint8_t i=0;i<4;i++)
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seed=(seed<<8) | (analogRead(PB0)& 0xFF);
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#ifdef RND_pin
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seed=(seed<<8) | (analogRead(RND_pin)& 0xFF);
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#else
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//TODO find something to randomize...
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seed=(seed<<8);
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#endif
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randomSeed(seed);
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#else
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//Init the seed with a random value created from watchdog timer for all protocols requiring random values
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@ -597,8 +612,8 @@ void setup()
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#endif
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#endif //ENABLE_SERIAL
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}
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LED2_on;
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debugln("Init complete");
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LED2_on;
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}
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// Main
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@ -223,6 +223,8 @@
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#define S3_pin PA6
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#define S4_pin PA7
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//
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#define RND_pin PB0
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//
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#define PE1_pin PB4 //PE1
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#define PE2_pin PB5 //PE2
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//CS pins
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@ -313,6 +315,20 @@
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#define DEBUG_PIN_toggle
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#endif
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#ifdef MULTI_5IN1_INTERNAL
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#undef RND_pin
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#define SX1276_RST_pin PA2 //LED2 on other modules
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#define SX1276_TXEN_pin PB0 //Random gen on other modules
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#define SX1276_DIO0_pin PC13 //Unused on other modules
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#define SX1276_RST_on digitalWrite(SX1276_RST_pin,HIGH)
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#define SX1276_RST_off digitalWrite(SX1276_RST_pin,LOW)
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#define SX1276_TXEN_on digitalWrite(SX1276_TXEN_pin,HIGH)
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#define SX1276_RXEN_on digitalWrite(SX1276_TXEN_pin,LOW)
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#define IS_DIO0_on ( digitalRead(SX1276_DIO0_pin)==HIGH )
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#define IS_DIO0_off ( digitalRead(SX1276_DIO0_pin)==LOW )
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#endif
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#define cli() noInterrupts()
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#define sei() interrupts()
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#define delayMilliseconds(x) delay(x)
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@ -33,18 +33,32 @@ void SX1276_WriteRegisterMulti(uint8_t address, const uint8_t* data, uint8_t len
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uint8_t SX1276_Reset()
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{
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//TODO
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//TODO when pin is not wired
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#ifdef SX1276_RST_pin
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SX1276_RST_off;
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delayMicroseconds(200);
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SX1276_RST_on;
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#endif
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return 0;
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}
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void SX1276_SetTxRxMode(uint8_t mode)
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{
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#ifdef SX1276_TXEN_pin
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if(mode == TX_EN)
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SX1276_TXEN_on;
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else
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SX1276_RXEN_on;
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#endif
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}
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void SX1276_SetFrequency(uint32_t frequency)
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{
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uint32_t f = frequency / 61;
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uint8_t data[3];
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data[0] = (f & (0xFF << 16)) >> 16;
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data[1] = (f & (0xFF << 8)) >> 8;
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data[2] = f & 0xFF;
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data[0] = f >> 16;
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data[1] = f >> 8;
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data[2] = f;
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SX1276_WriteRegisterMulti(SX1276_06_FRFMSB, data, 3);
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}
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@ -185,12 +185,24 @@
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#undef CC25_CSN_pin
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#undef NRF24L01_INSTALLED // Disable NRF for OrangeTX module
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#undef NRF_CSN_pin
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#undef SX1276_INSTALLED // Disable NRF for OrangeTX module
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#undef SX1276_INSTALLED // Disable SX1276 for OrangeTX module
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#define TELEMETRY // Enable telemetry
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#define INVERT_TELEMETRY // Enable invert telemetry
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#define DSM_TELEMETRY // Enable DSM telemetry
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#endif
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//Change/Force RF chip configuration if MULTI_5IN1_INTERNAL
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#ifdef MULTI_5IN1_INTERNAL
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#if not defined(STM32_BOARD)
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#error "Error MULTI_5IN1_INTERNAL is only for STM32 boards."
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#endif
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#define A7105_INSTALLED
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#define CYRF6936_INSTALLED
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#define CC2500_INSTALLED
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#define NRF24L01_INSTALLED
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#define SX1276_INSTALLED
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#endif
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//Make sure protocols are selected correctly
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#ifndef A7105_INSTALLED
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#undef AFHDS2A_A7105_INO
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@ -414,7 +414,7 @@ static uint16_t XN297Dump_callback()
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packet_count=0;
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bind_counter=0;
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debugln("Time between CH:%d and CH:%d",hopping_frequency[0],hopping_frequency[hopping_frequency_no]);
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time_rf[hopping_frequency_no]=-1;
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time_rf[hopping_frequency_no]=0xFFFFFFFF;
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency[0]);
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uint16_t timeL=TCNT1;
|
||||
if(TIMER2_BASE->SR & TIMER_SR_UIF)
|
||||
@ -504,7 +504,7 @@ static uint16_t XN297Dump_callback()
|
||||
do
|
||||
{
|
||||
time=time_rf[i];
|
||||
if(time!=-1)
|
||||
if(time!=0xFFFFFFFF)
|
||||
{
|
||||
next=i;
|
||||
for(uint8_t j=2;j<rf_ch_num;j++)
|
||||
|
@ -69,9 +69,10 @@
|
||||
/****************/
|
||||
/*** RF CHIPS ***/
|
||||
/****************/
|
||||
//There are 4 RF components supported. If one of them is not installed you must comment it using "//".
|
||||
//There are 5 RF components supported. If one of them is not installed you must comment it using "//".
|
||||
//If a chip is not installed all associated protocols are automatically disabled.
|
||||
//4-in-1 modules have all RF chips installed
|
||||
//4-in-1 modules have the A7105, CYRF6936, CC2500 and NRF24L01 RF chips installed
|
||||
//5-in-1 modules have all RF chips installed
|
||||
//!!!If a RF chip is present it MUST be marked as installed!!! or weird things will happen you have been warned.
|
||||
#define A7105_INSTALLED
|
||||
#define CYRF6936_INSTALLED
|
||||
@ -79,6 +80,10 @@
|
||||
#define NRF24L01_INSTALLED
|
||||
//#define SX1276_INSTALLED // only supported on STM32 modules
|
||||
|
||||
//Uncomment (remove //) if you have an internal 5-in-1 Multi module.
|
||||
//All components are considered to be installed and specifics to that module are automatically configured
|
||||
//#define MULTI_5IN1_INTERNAL
|
||||
|
||||
/** OrangeRX TX **/
|
||||
//If you compile for the OrangeRX TX module you need to select the correct board type.
|
||||
//By default the compilation is done for the GREEN board, to switch to a BLUE board uncomment the line below by removing the "//"
|
||||
|
@ -1512,7 +1512,11 @@ CH1|CH2|CH3|CH4|CH5
|
||||
# SX1276 RF Module
|
||||
|
||||
## FRSKYR9 - *65*
|
||||
Extended limits supported
|
||||
Extended limits and failsafe supported.
|
||||
|
||||
**R9 RXs must be flashed with ACCST Flex.**
|
||||
|
||||
Telemetry and power adjustment not yet supported.
|
||||
|
||||
### Sub_protocol R9_915 - *0*
|
||||
915MHz, 16 channels
|
||||
@ -1546,4 +1550,3 @@ CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8
|
||||
|
||||
## OpenLRS - *27*
|
||||
This is a reservation for OpenLRSng which is using Multi's serial protocol for their modules: https://openlrsng.org/. On the Multi side there is no protocol affected on 27 so it's just ignored.
|
||||
|
||||
|
Loading…
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Reference in New Issue
Block a user