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FrSkyRX: check additional ID and use RX num

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This commit is contained in:
Pascal Langer
2020-04-05 10:44:09 +02:00
parent 08eee34446
commit 8af985a2cb
3 changed files with 13 additions and 10 deletions
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13
Multiprotocol/FrSky_Rx_cc2500.ino
View File

@@ -313,6 +313,7 @@ uint16_t FrSky_Rx_callback()
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc()) {
rx_tx_addr[0] = packet[3]; // TXID
rx_tx_addr[1] = packet[4]; // TXID
rx_tx_addr[2] = packet[11]; // TXID
frsky_rx_finetune = -127;
CC2500_WriteReg(CC2500_0C_FSCTRL0, frsky_rx_finetune);
phase = FRSKY_RX_TUNE_LOW;
@@ -330,7 +331,7 @@ uint16_t FrSky_Rx_callback()
case FRSKY_RX_TUNE_LOW:
if (len >= packet_length) {
CC2500_ReadData(packet, packet_length);
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1]) {
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && (frsky_rx_format == FRSKY_RX_D8 || packet[11] == rx_tx_addr[2])) {
tune_low = frsky_rx_finetune;
frsky_rx_finetune = 127;
CC2500_WriteReg(CC2500_0C_FSCTRL0, frsky_rx_finetune);
@@ -347,7 +348,7 @@ uint16_t FrSky_Rx_callback()
case FRSKY_RX_TUNE_HIGH:
if (len >= packet_length) {
CC2500_ReadData(packet, packet_length);
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1]) {
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && (frsky_rx_format == FRSKY_RX_D8 || packet[11] == rx_tx_addr[2])) {
tune_high = frsky_rx_finetune;
frsky_rx_finetune = (tune_low + tune_high) / 2;
CC2500_WriteReg(CC2500_0C_FSCTRL0, (int8_t)frsky_rx_finetune);
@@ -367,14 +368,13 @@ uint16_t FrSky_Rx_callback()
case FRSKY_RX_BIND:
if(len >= packet_length) {
CC2500_ReadData(packet, packet_length);
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && packet[5] <= 0x2D) {
if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && (frsky_rx_format == FRSKY_RX_D8 || packet[11] == rx_tx_addr[2]) && packet[5] <= 0x2D) {
for (ch = 0; ch < 5; ch++)
hopping_frequency[packet[5]+ch] = packet[6+ch];
state |= 1 << (packet[5] / 5);
if (state == 0x3ff) {
debug("Bind complete: ");
frsky_rx_calibrate();
rx_tx_addr[2] = packet[12]; // RX # (D16)
CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual
CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address
CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address
@@ -389,7 +389,8 @@ uint16_t FrSky_Rx_callback()
eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[1]);
debug("addr[1]=%02X, ", rx_tx_addr[1]);
eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[2]);
debug("rx_num=%02X, ", rx_tx_addr[2]);
debug("addr[2]=%02X, ", rx_tx_addr[2]);
debug("rx_num=%02X, ", packet[12]); // RX # (D16)
eeprom_write_byte((EE_ADDR)temp++, frsky_rx_finetune);
debugln("tune=%d", (int8_t)frsky_rx_finetune);
for (ch = 0; ch < 47; ch++)
@@ -408,7 +409,7 @@ uint16_t FrSky_Rx_callback()
case FRSKY_RX_DATA:
if (len >= packet_length) {
CC2500_ReadData(packet, packet_length);
if (packet[1] == rx_tx_addr[0] && packet[2] == rx_tx_addr[1] && frskyx_rx_check_crc() && (frsky_rx_format == FRSKY_RX_D8 || packet[6] == rx_tx_addr[2])) {
if (packet[1] == rx_tx_addr[0] && packet[2] == rx_tx_addr[1] && frskyx_rx_check_crc() && (frsky_rx_format == FRSKY_RX_D8 || (packet[6] == RX_num && packet[3] == rx_tx_addr[2])) {
RX_RSSI = packet[packet_length-2];
if(RX_RSSI >= 128)
RX_RSSI -= 128;

2
Multiprotocol/Multiprotocol.h
View File

@@ -19,7 +19,7 @@
#define VERSION_MAJOR 1
#define VERSION_MINOR 3
#define VERSION_REVISION 0
#define VERSION_PATCH_LEVEL 81
#define VERSION_PATCH_LEVEL 82
//******************
// Protocols