From 8af985a2cbe5651977667c2cef15006f14723382 Mon Sep 17 00:00:00 2001 From: Pascal Langer Date: Sun, 5 Apr 2020 10:44:09 +0200 Subject: [PATCH] FrSkyRX: check additional ID and use RX num --- Multiprotocol/FrSky_Rx_cc2500.ino | 13 +++++++------ Multiprotocol/Multiprotocol.h | 2 +- Protocols_Details.md | 8 +++++--- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/Multiprotocol/FrSky_Rx_cc2500.ino b/Multiprotocol/FrSky_Rx_cc2500.ino index 8bf3c01..ce73302 100644 --- a/Multiprotocol/FrSky_Rx_cc2500.ino +++ b/Multiprotocol/FrSky_Rx_cc2500.ino @@ -313,6 +313,7 @@ uint16_t FrSky_Rx_callback() if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc()) { rx_tx_addr[0] = packet[3]; // TXID rx_tx_addr[1] = packet[4]; // TXID + rx_tx_addr[2] = packet[11]; // TXID frsky_rx_finetune = -127; CC2500_WriteReg(CC2500_0C_FSCTRL0, frsky_rx_finetune); phase = FRSKY_RX_TUNE_LOW; @@ -330,7 +331,7 @@ uint16_t FrSky_Rx_callback() case FRSKY_RX_TUNE_LOW: if (len >= packet_length) { CC2500_ReadData(packet, packet_length); - if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1]) { + if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && (frsky_rx_format == FRSKY_RX_D8 || packet[11] == rx_tx_addr[2])) { tune_low = frsky_rx_finetune; frsky_rx_finetune = 127; CC2500_WriteReg(CC2500_0C_FSCTRL0, frsky_rx_finetune); @@ -347,7 +348,7 @@ uint16_t FrSky_Rx_callback() case FRSKY_RX_TUNE_HIGH: if (len >= packet_length) { CC2500_ReadData(packet, packet_length); - if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1]) { + if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && (frsky_rx_format == FRSKY_RX_D8 || packet[11] == rx_tx_addr[2])) { tune_high = frsky_rx_finetune; frsky_rx_finetune = (tune_low + tune_high) / 2; CC2500_WriteReg(CC2500_0C_FSCTRL0, (int8_t)frsky_rx_finetune); @@ -367,14 +368,13 @@ uint16_t FrSky_Rx_callback() case FRSKY_RX_BIND: if(len >= packet_length) { CC2500_ReadData(packet, packet_length); - if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && packet[5] <= 0x2D) { + if(packet[1] == 0x03 && packet[2] == 0x01 && frskyx_rx_check_crc() && packet[3] == rx_tx_addr[0] && packet[4] == rx_tx_addr[1] && (frsky_rx_format == FRSKY_RX_D8 || packet[11] == rx_tx_addr[2]) && packet[5] <= 0x2D) { for (ch = 0; ch < 5; ch++) hopping_frequency[packet[5]+ch] = packet[6+ch]; state |= 1 << (packet[5] / 5); if (state == 0x3ff) { debug("Bind complete: "); frsky_rx_calibrate(); - rx_tx_addr[2] = packet[12]; // RX # (D16) CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // FS_AUTOCAL = manual CC2500_WriteReg(CC2500_09_ADDR, rx_tx_addr[0]); // set address CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // check address @@ -389,7 +389,8 @@ uint16_t FrSky_Rx_callback() eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[1]); debug("addr[1]=%02X, ", rx_tx_addr[1]); eeprom_write_byte((EE_ADDR)temp++, rx_tx_addr[2]); - debug("rx_num=%02X, ", rx_tx_addr[2]); + debug("addr[2]=%02X, ", rx_tx_addr[2]); + debug("rx_num=%02X, ", packet[12]); // RX # (D16) eeprom_write_byte((EE_ADDR)temp++, frsky_rx_finetune); debugln("tune=%d", (int8_t)frsky_rx_finetune); for (ch = 0; ch < 47; ch++) @@ -408,7 +409,7 @@ uint16_t FrSky_Rx_callback() case FRSKY_RX_DATA: if (len >= packet_length) { CC2500_ReadData(packet, packet_length); - if (packet[1] == rx_tx_addr[0] && packet[2] == rx_tx_addr[1] && frskyx_rx_check_crc() && (frsky_rx_format == FRSKY_RX_D8 || packet[6] == rx_tx_addr[2])) { + if (packet[1] == rx_tx_addr[0] && packet[2] == rx_tx_addr[1] && frskyx_rx_check_crc() && (frsky_rx_format == FRSKY_RX_D8 || (packet[6] == RX_num && packet[3] == rx_tx_addr[2])) { RX_RSSI = packet[packet_length-2]; if(RX_RSSI >= 128) RX_RSSI -= 128; diff --git a/Multiprotocol/Multiprotocol.h b/Multiprotocol/Multiprotocol.h index e44ee9b..6152013 100644 --- a/Multiprotocol/Multiprotocol.h +++ b/Multiprotocol/Multiprotocol.h @@ -19,7 +19,7 @@ #define VERSION_MAJOR 1 #define VERSION_MINOR 3 #define VERSION_REVISION 0 -#define VERSION_PATCH_LEVEL 81 +#define VERSION_PATCH_LEVEL 82 //****************** // Protocols diff --git a/Protocols_Details.md b/Protocols_Details.md index f746b90..034e78a 100644 --- a/Protocols_Details.md +++ b/Protocols_Details.md @@ -92,7 +92,7 @@ CFlie|38|CFlie||||||||NRF24L01| [FrskyV](Protocols_Details.md#FRSKYV---25)|25|FrskyV||||||||CC2500| [FrskyX](Protocols_Details.md#FRSKYX---15)|15|CH_16|CH_8|EU_16|EU_8|||||CC2500| [FrskyX2](Protocols_Details.md#FRSKYX2---64)|64|CH_16|CH_8|EU_16|EU_8|||||CC2500| -[FrskyX_RX](Protocols_Details.md#FRSKYX_RX---55)|55|||||||||CC2500| +[Frsky_RX](Protocols_Details.md#FRSKY_RX---55)|55|||||||||CC2500| [FX816](Protocols_Details.md#FX816---58)|28|FX816|P38|||||||NRF24L01| [FY326](Protocols_Details.md#FY326---20)|20|FY326|FY319|||||||NRF24L01| [GD00X](Protocols_Details.md#GD00X---47)|47|GD_V1*|GD_V2*|||||||NRF24L01| @@ -375,8 +375,8 @@ CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8 ## FRSKYX2 - *64* Same as FrSkyX but for v2.1.0. -## FRSKYX_RX - *55* -The FrSkyX receiver protocol enables master/slave trainning, separate access from 2 different radios to the same model,... +## FRSKY_RX - *55* +The FrSky receiver protocol enables master/slave trainning, separate access from 2 different radios to the same model,... Auto selection of FrSkyD and FrSkyX v1.xxx at bind time. @@ -384,6 +384,8 @@ Available in OpenTX 2.3.3, Trainer Mode Master/Multi Extended limits supported +For **FrSkyX, RX num must match on the master and slave**. This enables a multi student configuration for example. + Option for this protocol corresponds to fine frequency tuning. If the value is equal to 0, the RX will auto tune otherwise it will use the indicated value. This value is different for each Module and **must** be accurate otherwise the link will not be stable.