mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 16:28:10 +00:00
XN297Dump: new auto mode
Automatically: - find XN297L packet -> bitrate, scrambling, enhanced... - use address to filter incoming packets - find all frequencies - determine channel order (basic) - help to find out the changes by only displaying packets when there is a change in the packet
This commit is contained in:
pascallanger
parent
8c32cdf5fd
commit
86778c5997
@ -33,6 +33,10 @@
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uint8_t address_length;
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uint16_t timeH=0;
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boolean scramble;
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boolean enhanced;
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boolean ack;
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uint8_t pid;
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uint8_t bitrate;
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static void __attribute__((unused)) XN297Dump_init()
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{
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@ -48,14 +52,14 @@ static void __attribute__((unused)) XN297Dump_init()
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NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, (uint8_t*)"\x55\x0F\x71", 3); // set up RX address to xn297 preamble
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NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, XN297DUMP_MAX_PACKET_LEN); // Enable rx pipe 0
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debug("XN297 dump, address length=%d, speed=",address_length);
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switch(sub_protocol)
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debug("XN297 dump, address length=%d, bitrate=",address_length);
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switch(bitrate)
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{
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case 0:
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case XN297DUMP_250K:
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NRF24L01_SetBitrate(NRF24L01_BR_250K);
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debugln("250K");
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break;
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case 2:
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case XN297DUMP_2M:
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NRF24L01_SetBitrate(NRF24L01_BR_2M);
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debugln("2M");
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break;
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@ -76,6 +80,7 @@ static boolean __attribute__((unused)) XN297Dump_process_packet(void)
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{
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uint16_t crcxored;
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uint8_t packet_sc[XN297DUMP_MAX_PACKET_LEN], packet_un[XN297DUMP_MAX_PACKET_LEN];
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enhanced=false;
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// init crc
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crc = 0xb5d2;
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@ -142,17 +147,17 @@ static boolean __attribute__((unused)) XN297Dump_process_packet(void)
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}
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if(packet_length!=0)
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{ // Found a valid CRC for the enhanced payload mode
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debug("Enhanced ");
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enhanced=true;
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//check selected address length
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if((packet_un[address_length]>>1)!=packet_length-address_length)
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{
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for(uint8_t i=3;i<=5;i++)
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if((packet_un[i]>>1)==packet_length-i)
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address_length=i;
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debug("Wrong address length selected using %d ", address_length )
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debugln("Detected wrong address length, using %d intead", address_length );
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}
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debug("pid=%d ",((packet_un[address_length]&0x01)<<1)|(packet_un[address_length+1]>>7));
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debug("ack=%d ",(packet_un[address_length+1]>>6)&0x01);
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pid=((packet_un[address_length]&0x01)<<1)|(packet_un[address_length+1]>>7);
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ack=(packet_un[address_length+1]>>6)&0x01;
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// address
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for (uint8_t i = 0; i < address_length; i++)
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packet[address_length-1-i]=packet_un[i];
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@ -175,96 +180,449 @@ static void __attribute__((unused)) XN297Dump_overflow()
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}
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static uint16_t XN297Dump_callback()
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{
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static uint32_t time=0;
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static uint32_t time=0,*time_rf;
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//!!!Blocking mode protocol!!!
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TX_MAIN_PAUSE_off;
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tx_resume();
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while(1)
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{
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if(option==0xFF && bind_counter>XN297DUMP_PERIOD_SCAN)
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{ // Scan frequencies
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hopping_frequency_no++;
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bind_counter=0;
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}
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if(hopping_frequency_no!=rf_ch_num)
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{ // Channel has changed
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if(hopping_frequency_no>XN297DUMP_MAX_RF_CHANNEL)
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hopping_frequency_no=0; // Invalid channel 0 by default
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rf_ch_num=hopping_frequency_no;
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debugln("Channel=%d,0x%02X",hopping_frequency_no,hopping_frequency_no)
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency_no);
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// switch to RX mode
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (0 << NRF24L01_00_EN_CRC) // switch to RX mode and disable CRC
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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phase=0; // init timer
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}
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XN297Dump_overflow();
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if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & _BV(NRF24L01_07_RX_DR))
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{ // RX fifo data ready
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if(NRF24L01_ReadReg(NRF24L01_09_CD) || option != 0xFF)
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{
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NRF24L01_ReadPayload(packet,XN297DUMP_MAX_PACKET_LEN);
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XN297Dump_overflow();
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uint16_t timeL=TCNT1;
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if(TIMER2_BASE->SR & TIMER_SR_UIF)
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{//timer just rolled over...
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XN297Dump_overflow();
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timeL=0;
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}
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if(phase==0)
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{
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phase=1;
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time=0;
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}
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else
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time=(timeH<<16)+timeL-time;
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debug("RX: %5luus C=%d ", time>>1 , hopping_frequency_no);
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time=(timeH<<16)+timeL;
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if(XN297Dump_process_packet())
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{ // valid crc found
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debug("S=%c A=",scramble?'Y':'N');
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for(uint8_t i=0; i<address_length; i++)
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{
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debug(" %02X",packet[i]);
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}
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debug(" P(%d)=",packet_length-address_length);
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for(uint8_t i=address_length; i<packet_length; i++)
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{
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debug(" %02X",packet[i]);
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}
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debugln("");
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}
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else
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{
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debugln("Bad CRC");
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}
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if(sub_protocol<XN297DUMP_AUTO)
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{
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if(option==0xFF && bind_counter>XN297DUMP_PERIOD_SCAN)
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{ // Scan frequencies
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hopping_frequency_no++;
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bind_counter=0;
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}
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if(hopping_frequency_no!=rf_ch_num)
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{ // Channel has changed
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if(hopping_frequency_no>XN297DUMP_MAX_RF_CHANNEL)
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hopping_frequency_no=0; // Invalid channel 0 by default
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rf_ch_num=hopping_frequency_no;
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debugln("Channel=%d,0x%02X",hopping_frequency_no,hopping_frequency_no);
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency_no);
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// switch to RX mode
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (0 << NRF24L01_00_EN_CRC) // switch to RX mode and disable CRC
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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phase=0; // init timer
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}
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XN297Dump_overflow();
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XN297Dump_overflow();
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// restart RX mode
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (0 << NRF24L01_00_EN_CRC) // switch to RX mode and disable CRC
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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XN297Dump_overflow();
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if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & _BV(NRF24L01_07_RX_DR))
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{ // RX fifo data ready
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if(NRF24L01_ReadReg(NRF24L01_09_CD) || option != 0xFF)
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{
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NRF24L01_ReadPayload(packet,XN297DUMP_MAX_PACKET_LEN);
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XN297Dump_overflow();
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uint16_t timeL=TCNT1;
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if(TIMER2_BASE->SR & TIMER_SR_UIF)
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{//timer just rolled over...
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XN297Dump_overflow();
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timeL=0;
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}
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if((phase&0x01)==0)
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{
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phase=1;
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time=0;
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}
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else
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time=(timeH<<16)+timeL-time;
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if(XN297Dump_process_packet())
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{ // valid crc found
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debug("RX: %5luus C=%d ", time>>1 , hopping_frequency_no);
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time=(timeH<<16)+timeL;
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if(enhanced)
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{
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debug("Enhanced ");
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debug("pid=%d ",pid);
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if(ack) debug("ack ");
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}
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debug("S=%c A=",scramble?'Y':'N');
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for(uint8_t i=0; i<address_length; i++)
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{
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debug(" %02X",packet[i]);
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}
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debug(" P(%d)=",packet_length-address_length);
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for(uint8_t i=address_length; i<packet_length; i++)
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{
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debug(" %02X",packet[i]);
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}
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debugln("");
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}
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else
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{
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debugln("RX: %5luus C=%d Bad CRC", time>>1 , hopping_frequency_no);
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}
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}
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XN297Dump_overflow();
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// restart RX mode
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (0 << NRF24L01_00_EN_CRC) // switch to RX mode and disable CRC
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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XN297Dump_overflow();
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}
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}
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else
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{
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switch(phase)
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{
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case 0:
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debugln("------------------------");
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debugln("Detecting XN297 packets.");
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XN297Dump_init();
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debug("Trying RF channel: 0");
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hopping_frequency_no=0;
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bitrate=0;
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phase++;
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break;
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case 1:
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if(bind_counter>XN297DUMP_PERIOD_SCAN)
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{ // Scan frequencies
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hopping_frequency_no++;
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bind_counter=0;
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if(hopping_frequency_no>XN297DUMP_MAX_RF_CHANNEL)
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{
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hopping_frequency_no=0;
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bitrate++;
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bitrate%=3;
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debugln("");
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XN297Dump_init();
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debug("Trying RF channel: 0");
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}
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if(hopping_frequency_no)
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debug(",%d",hopping_frequency_no);
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency_no);
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// switch to RX mode
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (0 << NRF24L01_00_EN_CRC) // switch to RX mode and disable CRC
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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}
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if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & _BV(NRF24L01_07_RX_DR))
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{ // RX fifo data ready
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if(NRF24L01_ReadReg(NRF24L01_09_CD))
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{
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NRF24L01_ReadPayload(packet,XN297DUMP_MAX_PACKET_LEN);
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if(XN297Dump_process_packet())
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{ // valid crc found
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debug("\r\n\r\nPacket detected: bitrate=");
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switch(bitrate)
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{
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case XN297DUMP_250K:
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NRF24L01_SetBitrate(NRF24L01_BR_250K);
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debug("250K");
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break;
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case XN297DUMP_2M:
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NRF24L01_SetBitrate(NRF24L01_BR_2M);
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debug("2M");
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break;
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default:
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NRF24L01_SetBitrate(NRF24L01_BR_1M);
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debug("1M");
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break;
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}
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debug(" C=%d ", hopping_frequency_no);
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if(enhanced)
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{
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debug("Enhanced ");
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debug("pid=%d ",pid);
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if(ack) debug("ack ");
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}
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debug("S=%c A=",scramble?'Y':'N');
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for(uint8_t i=0; i<address_length; i++)
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{
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debug(" %02X",packet[i]);
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rx_tx_addr[i]=packet[i];
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}
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debug(" P(%d)=",packet_length-address_length);
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for(uint8_t i=address_length; i<packet_length; i++)
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{
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debug(" %02X",packet[i]);
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}
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packet_length=packet_length-address_length;
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debugln("\r\n--------------------------------");
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phase=2;
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debugln("Identifying all RF channels in use.");
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bind_counter=0;
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hopping_frequency_no=0;
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rf_ch_num=0;
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packet_count=0;
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debug("Trying RF channel: 0");
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NRF24L01_Initialize();
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XN297_SetScrambledMode(scramble?XN297_SCRAMBLED:XN297_UNSCRAMBLED);
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XN297_SetTXAddr(rx_tx_addr,address_length);
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XN297_SetRXAddr(rx_tx_addr,address_length);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
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NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
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NRF24L01_WriteReg(NRF24L01_11_RX_PW_P0, packet_length + 2 + (enhanced?2:0) ); // 2 extra bytes for xn297 crc
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,0);
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_FlushRx();
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NRF24L01_SetTxRxMode(RX_EN);
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XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP) | _BV(NRF24L01_00_PRIM_RX));
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}
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}
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}
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break;
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case 2:
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if(bind_counter>XN297DUMP_PERIOD_SCAN)
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{ // Scan frequencies
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hopping_frequency_no++;
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bind_counter=0;
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if(hopping_frequency_no>XN297DUMP_MAX_RF_CHANNEL)
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{
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debug("\r\n\r\n%d RF channels identified:",rf_ch_num);
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for(uint8_t i=0;i<rf_ch_num;i++)
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debug(" %d",hopping_frequency[i]);
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time_rf=(uint32_t*)malloc(rf_ch_num*sizeof(time));
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if(time_rf==NULL)
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{
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debugln("\r\nCan't allocate memory for next phase!!!");
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phase=0;
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break;
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}
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debugln("\r\n--------------------------------");
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debugln("Identifying RF channels order.");
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hopping_frequency_no=1;
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phase=3;
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packet_count=0;
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bind_counter=0;
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debugln("Time between CH:%d and CH:%d",hopping_frequency[0],hopping_frequency[hopping_frequency_no]);
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time_rf[hopping_frequency_no]=-1;
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency[0]);
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uint16_t timeL=TCNT1;
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if(TIMER2_BASE->SR & TIMER_SR_UIF)
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{//timer just rolled over...
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XN297Dump_overflow();
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timeL=0;
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}
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time=(timeH<<16)+timeL;
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, (0 << NRF24L01_00_EN_CRC) // switch to RX mode and disable CRC
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| (1 << NRF24L01_00_CRCO)
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| (1 << NRF24L01_00_PWR_UP)
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| (1 << NRF24L01_00_PRIM_RX));
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XN297Dump_overflow();
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break;
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}
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debug(",%d",hopping_frequency_no);
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NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency_no);
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// switch to RX mode
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_SetTxRxMode(TXRX_OFF);
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NRF24L01_SetTxRxMode(RX_EN);
|
||||
NRF24L01_FlushRx();
|
||||
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP) | _BV(NRF24L01_00_PRIM_RX));
|
||||
}
|
||||
if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & _BV(NRF24L01_07_RX_DR))
|
||||
{ // RX fifo data ready
|
||||
if(NRF24L01_ReadReg(NRF24L01_09_CD))
|
||||
{
|
||||
boolean res;
|
||||
if(enhanced)
|
||||
res=XN297_ReadEnhancedPayload(packet, packet_length);
|
||||
else
|
||||
res=XN297_ReadPayload(packet, packet_length);
|
||||
if(res)
|
||||
{ // valid crc found
|
||||
XN297Dump_overflow();
|
||||
uint16_t timeL=TCNT1;
|
||||
if(TIMER2_BASE->SR & TIMER_SR_UIF)
|
||||
{//timer just rolled over...
|
||||
XN297Dump_overflow();
|
||||
timeL=0;
|
||||
}
|
||||
if(packet_count==0)
|
||||
{//save channel
|
||||
hopping_frequency[rf_ch_num]=hopping_frequency_no;
|
||||
rf_ch_num++;
|
||||
time=0;
|
||||
}
|
||||
else
|
||||
time=(timeH<<16)+timeL-time;
|
||||
debug("\r\nRX on channel: %d, Time: %5luus P:",hopping_frequency_no, time>>1);
|
||||
time=(timeH<<16)+timeL;
|
||||
for(uint8_t i=0;i<packet_length;i++)
|
||||
debug(" %02X",packet[i]);
|
||||
packet_count++;
|
||||
if(packet_count>5)
|
||||
{
|
||||
bind_counter=XN297DUMP_PERIOD_SCAN+1;
|
||||
debug("\r\nTrying RF channel: ");
|
||||
packet_count=0;
|
||||
}
|
||||
}
|
||||
}
|
||||
// restart RX mode
|
||||
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
|
||||
NRF24L01_SetTxRxMode(TXRX_OFF);
|
||||
NRF24L01_SetTxRxMode(RX_EN);
|
||||
NRF24L01_FlushRx();
|
||||
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP) | _BV(NRF24L01_00_PRIM_RX));
|
||||
}
|
||||
XN297Dump_overflow();
|
||||
break;
|
||||
case 3:
|
||||
if(bind_counter>XN297DUMP_PERIOD_SCAN)
|
||||
{ // Scan frequencies
|
||||
hopping_frequency_no++;
|
||||
bind_counter=0;
|
||||
if(hopping_frequency_no>=rf_ch_num)
|
||||
{
|
||||
uint8_t next=0;
|
||||
debugln("\r\n\r\nChannel order:");
|
||||
debugln("%d: 0us",hopping_frequency[0]);
|
||||
uint8_t i=1;
|
||||
do
|
||||
{
|
||||
time=time_rf[i];
|
||||
if(time!=-1)
|
||||
{
|
||||
next=i;
|
||||
for(uint8_t j=2;j<rf_ch_num;j++)
|
||||
if(time>time_rf[j])
|
||||
{
|
||||
next=j;
|
||||
time=time_rf[j];
|
||||
}
|
||||
time_rf[next]=-1;
|
||||
debugln("%d: %5luus",hopping_frequency[next],time);
|
||||
i=0;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
while(i<rf_ch_num);
|
||||
free(time_rf);
|
||||
debugln("\r\n--------------------------------");
|
||||
debugln("Identifying Sticks and features.");
|
||||
phase=4;
|
||||
hopping_frequency_no=0;
|
||||
break;
|
||||
}
|
||||
debugln("Time between CH:%d and CH:%d",hopping_frequency[0],hopping_frequency[hopping_frequency_no]);
|
||||
time_rf[hopping_frequency_no]=-1;
|
||||
NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency[0]);
|
||||
uint16_t timeL=TCNT1;
|
||||
if(TIMER2_BASE->SR & TIMER_SR_UIF)
|
||||
{//timer just rolled over...
|
||||
XN297Dump_overflow();
|
||||
timeL=0;
|
||||
}
|
||||
time=(timeH<<16)+timeL;
|
||||
// switch to RX mode
|
||||
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
|
||||
NRF24L01_SetTxRxMode(TXRX_OFF);
|
||||
NRF24L01_SetTxRxMode(RX_EN);
|
||||
NRF24L01_FlushRx();
|
||||
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP) | _BV(NRF24L01_00_PRIM_RX));
|
||||
}
|
||||
if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & _BV(NRF24L01_07_RX_DR))
|
||||
{ // RX fifo data ready
|
||||
if(NRF24L01_ReadReg(NRF24L01_09_CD))
|
||||
{
|
||||
boolean res;
|
||||
if(enhanced)
|
||||
res=XN297_ReadEnhancedPayload(packet, packet_length);
|
||||
else
|
||||
res=XN297_ReadPayload(packet, packet_length);
|
||||
if(res)
|
||||
{ // valid crc found
|
||||
XN297Dump_overflow();
|
||||
uint16_t timeL=TCNT1;
|
||||
if(TIMER2_BASE->SR & TIMER_SR_UIF)
|
||||
{//timer just rolled over...
|
||||
XN297Dump_overflow();
|
||||
timeL=0;
|
||||
}
|
||||
if(packet_count&1)
|
||||
{
|
||||
time=(timeH<<16)+timeL-time;
|
||||
if(time_rf[hopping_frequency_no] > (time>>1))
|
||||
time_rf[hopping_frequency_no]=time>>1;
|
||||
debugln("Time: %5luus", time>>1);
|
||||
NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency[0]);
|
||||
}
|
||||
else
|
||||
{
|
||||
time=(timeH<<16)+timeL;
|
||||
NRF24L01_WriteReg(NRF24L01_05_RF_CH,hopping_frequency[hopping_frequency_no]);
|
||||
}
|
||||
packet_count++;
|
||||
if(packet_count>6)
|
||||
{
|
||||
bind_counter=XN297DUMP_PERIOD_SCAN+1;
|
||||
packet_count=0;
|
||||
}
|
||||
}
|
||||
}
|
||||
// restart RX mode
|
||||
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
|
||||
NRF24L01_SetTxRxMode(TXRX_OFF);
|
||||
NRF24L01_SetTxRxMode(RX_EN);
|
||||
NRF24L01_FlushRx();
|
||||
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP) | _BV(NRF24L01_00_PRIM_RX));
|
||||
}
|
||||
XN297Dump_overflow();
|
||||
break;
|
||||
case 4:
|
||||
if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & _BV(NRF24L01_07_RX_DR))
|
||||
{ // RX fifo data ready
|
||||
if(NRF24L01_ReadReg(NRF24L01_09_CD))
|
||||
{
|
||||
boolean res;
|
||||
if(enhanced)
|
||||
res=XN297_ReadEnhancedPayload(packet, packet_length);
|
||||
else
|
||||
res=XN297_ReadPayload(packet, packet_length);
|
||||
if(res)
|
||||
{ // valid crc found
|
||||
if(memcmp(packet_in,packet,packet_length))
|
||||
{
|
||||
debug("P:");
|
||||
for(uint8_t i=0;i<packet_length;i++)
|
||||
debug(" %02X",packet[i]);
|
||||
debugln("");
|
||||
memcpy(packet_in,packet,packet_length);
|
||||
}
|
||||
}
|
||||
}
|
||||
// restart RX mode
|
||||
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
|
||||
NRF24L01_SetTxRxMode(TXRX_OFF);
|
||||
NRF24L01_SetTxRxMode(RX_EN);
|
||||
NRF24L01_FlushRx();
|
||||
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP) | _BV(NRF24L01_00_PRIM_RX));
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
bind_counter++;
|
||||
if(IS_RX_FLAG_on) // Let the radio update the protocol
|
||||
{
|
||||
if(Update_All()) return 10000; // New protocol selected
|
||||
if(prev_option!=option)
|
||||
if(prev_option!=option && sub_protocol<XN297DUMP_AUTO)
|
||||
{ // option has changed
|
||||
hopping_frequency_no=option;
|
||||
prev_option=option;
|
||||
@ -278,6 +636,10 @@ static uint16_t XN297Dump_callback()
|
||||
uint16_t initXN297Dump(void)
|
||||
{
|
||||
BIND_DONE;
|
||||
if(sub_protocol<XN297DUMP_AUTO)
|
||||
bitrate=sub_protocol;
|
||||
else
|
||||
bitrate=0;
|
||||
address_length=RX_num;
|
||||
if(address_length<3||address_length>5)
|
||||
address_length=5; //default
|
||||
@ -285,7 +647,7 @@ uint16_t initXN297Dump(void)
|
||||
bind_counter=0;
|
||||
rf_ch_num=0xFF;
|
||||
prev_option=option^0x55;
|
||||
phase=0; // init timer
|
||||
phase=0; // init
|
||||
return XN297DUMP_INITIAL_WAIT;
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user