diff --git a/Multiprotocol/FrSky_Rx_cc2500.ino b/Multiprotocol/FrSky_Rx_cc2500.ino
index 6f599f0..de161eb 100644
--- a/Multiprotocol/FrSky_Rx_cc2500.ino
+++ b/Multiprotocol/FrSky_Rx_cc2500.ino
@@ -54,14 +54,64 @@ static void __attribute__((unused)) frsky_rx_initialise_cc2500() {
 	CC2500_Reset();
 	CC2500_Strobe(CC2500_SIDLE);
 	CC2500_WriteReg(CC2500_0A_CHANNR, 0);  // bind channel
+
+	CC2500_WriteReg(CC2500_02_IOCFG0, 0x01);
+	CC2500_WriteReg(CC2500_18_MCSM0, 0x18);
+	CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x04);
+	CC2500_WriteReg(CC2500_3E_PATABLE, 0xFF);
+	CC2500_WriteReg(CC2500_0C_FSCTRL0, 0);
+	CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C);
+	CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23);
+	CC2500_WriteReg(CC2500_14_MDMCFG0, 0x7A);
+	CC2500_WriteReg(CC2500_19_FOCCFG, 0x16);
+	CC2500_WriteReg(CC2500_1A_BSCFG, 0x6C);
+	CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x03);
+	CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x40);
+	CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91);
+	CC2500_WriteReg(CC2500_21_FREND1, 0x56);
+	CC2500_WriteReg(CC2500_22_FREND0, 0x10);
+	CC2500_WriteReg(CC2500_23_FSCAL3, 0xA9);
+	CC2500_WriteReg(CC2500_24_FSCAL2, 0x0A);
+	CC2500_WriteReg(CC2500_25_FSCAL1, 0x00);
+	CC2500_WriteReg(CC2500_26_FSCAL0, 0x11);
+	CC2500_WriteReg(CC2500_29_FSTEST, 0x59);
+	CC2500_WriteReg(CC2500_2C_TEST2, 0x88);
+	CC2500_WriteReg(CC2500_2D_TEST1, 0x31);
+	CC2500_WriteReg(CC2500_2E_TEST0, 0x0B);
+	CC2500_WriteReg(CC2500_03_FIFOTHR, 0x07);
+	CC2500_WriteReg(CC2500_09_ADDR, 0x00);
+
 	switch (frsky_rx_format) {
 	case FRSKY_RX_D16FCC:
-		FRSKY_init_cc2500(FRSKYX_cc2500_conf);
+		CC2500_WriteReg(CC2500_17_MCSM1, 0x0C);
+		CC2500_WriteReg(CC2500_0E_FREQ1, 0x76);
+		CC2500_WriteReg(CC2500_0F_FREQ0, 0x27);
+		CC2500_WriteReg(CC2500_06_PKTLEN, 0x1E);
+		CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01);
+		CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A);
+		CC2500_WriteReg(CC2500_10_MDMCFG4, 0x7B);
+		CC2500_WriteReg(CC2500_11_MDMCFG3, 0x61);
+		CC2500_WriteReg(CC2500_12_MDMCFG2, 0x13);
+		CC2500_WriteReg(CC2500_15_DEVIATN, 0x51);
+		//FRSKY_init_cc2500(FRSKYX_cc2500_conf);
 		break;
 	case FRSKY_RX_D16LBT:
-		FRSKY_init_cc2500(FRSKYXEU_cc2500_conf);
+		CC2500_WriteReg(CC2500_17_MCSM1, 0x0E);
+		CC2500_WriteReg(CC2500_0E_FREQ1, 0x80);
+		CC2500_WriteReg(CC2500_0F_FREQ0, 0x00);
+		CC2500_WriteReg(CC2500_06_PKTLEN, 0x23);
+		CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01);
+		CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x08);
+		CC2500_WriteReg(CC2500_10_MDMCFG4, 0x7B);
+		CC2500_WriteReg(CC2500_11_MDMCFG3, 0xF8);
+		CC2500_WriteReg(CC2500_12_MDMCFG2, 0x03);
+		CC2500_WriteReg(CC2500_15_DEVIATN, 0x53);
+		//FRSKY_init_cc2500(FRSKYXEU_cc2500_conf);
 		break;
 	case FRSKY_RX_D8:
+		CC2500_Reset();
+		CC2500_Strobe(CC2500_SIDLE);
+		CC2500_WriteReg(CC2500_0A_CHANNR, 0);  // bind channel
 		FRSKY_init_cc2500(FRSKYD_cc2500_conf);
 		CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // always check address
 		CC2500_WriteReg(CC2500_09_ADDR, 0x03); // bind address