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	Space and ram optimization on FrSky & FrSkyX
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				| @ -114,14 +114,6 @@ uint8_t data_col; | |||||||
| uint16_t cyrf_state; | uint16_t cyrf_state; | ||||||
| uint8_t crcidx; | uint8_t crcidx; | ||||||
| uint8_t binding; | uint8_t binding; | ||||||
| /*
 |  | ||||||
| #ifdef USE_FIXED_MFGID |  | ||||||
| const uint8_t cyrfmfg_id[6] = {0x5e, 0x28, 0xa3, 0x1b, 0x00, 0x00}; //dx8
 |  | ||||||
| const uint8_t cyrfmfg_id[6] = {0xd4, 0x62, 0xd6, 0xad, 0xd3, 0xff}; //dx6i
 |  | ||||||
| #else |  | ||||||
| //uint8_t cyrfmfg_id[6];
 |  | ||||||
| #endif |  | ||||||
| */ |  | ||||||
| 
 | 
 | ||||||
| static void __attribute__((unused)) build_bind_packet() | static void __attribute__((unused)) build_bind_packet() | ||||||
| { | { | ||||||
|  | |||||||
| @ -45,7 +45,7 @@ enum { | |||||||
| 	FLAG_V9X9_VIDEO = 0x40, | 	FLAG_V9X9_VIDEO = 0x40, | ||||||
| 	FLAG_V9X9_CAMERA= 0x80, | 	FLAG_V9X9_CAMERA= 0x80, | ||||||
| 	// flags going to byte 12
 | 	// flags going to byte 12
 | ||||||
| 	FLAG_V9X9_UNK   = 0x10, // undocumented ?
 | 	FLAG_V9X9_FLIP   = 0x10, | ||||||
| 	FLAG_V9X9_LED   = 0x20, | 	FLAG_V9X9_LED   = 0x20, | ||||||
| }; | }; | ||||||
| 
 | 
 | ||||||
| @ -82,7 +82,7 @@ static void __attribute__((unused)) flysky_apply_extension_flags() | |||||||
| 	{ | 	{ | ||||||
| 		case V9X9: | 		case V9X9: | ||||||
| 			if(Servo_AUX1) | 			if(Servo_AUX1) | ||||||
| 				packet[12] |= FLAG_V9X9_UNK; | 				packet[12] |= FLAG_V9X9_FLIP; | ||||||
| 			if(Servo_AUX2) | 			if(Servo_AUX2) | ||||||
| 				packet[12] |= FLAG_V9X9_LED; | 				packet[12] |= FLAG_V9X9_LED; | ||||||
| 			if(Servo_AUX3) | 			if(Servo_AUX3) | ||||||
|  | |||||||
| @ -43,39 +43,179 @@ | |||||||
| 		0x34,	0x1B,	0x00,	0x1D,	0x03  | 		0x34,	0x1B,	0x00,	0x1D,	0x03  | ||||||
| 	}; | 	}; | ||||||
| 
 | 
 | ||||||
| 	uint8_t hop(uint8_t byte) | 	static uint8_t __attribute__((unused)) hop(uint8_t byte) | ||||||
| 	{ | 	{ | ||||||
| 		return pgm_read_byte_near(&hop_data[byte]); | 		return pgm_read_byte_near(&hop_data[byte]); | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
| 	uint16_t initFrSkyX() | 	static void __attribute__((unused)) set_start(uint8_t ch ) | ||||||
| 	{ | 	{ | ||||||
| 		while(!chanskip) | 		cc2500_strobe(CC2500_SIDLE); | ||||||
| 		{ | 		cc2500_writeReg(CC2500_23_FSCAL3, calData[ch][0]); | ||||||
| 			randomSeed((uint32_t)analogRead(A6) << 10 | analogRead(A7)); | 		cc2500_writeReg(CC2500_24_FSCAL2, calData[ch][1]); | ||||||
| 			chanskip=random(0xfefefefe)%47; | 		cc2500_writeReg(CC2500_25_FSCAL1, calData[ch][2]); | ||||||
| 		} | 		cc2500_writeReg(CC2500_0A_CHANNR, ch==47?0:pgm_read_word(&hop_data[ch])); | ||||||
| 		while((chanskip-ctr)%4) | 	}		 | ||||||
| 			ctr=(ctr+1)%4; |  | ||||||
| 	 | 	 | ||||||
| 		counter_rst=(chanskip-ctr)>>2; | 	static void __attribute__((unused)) frskyX_init() | ||||||
| 		//for test***************
 | 	{ | ||||||
| 		//rx_tx_addr[3]=0xB3;
 | 		CC2500_Reset(); | ||||||
| 		//rx_tx_addr[2]=0xFD;
 | 		 | ||||||
| 		//************************
 | 		for(uint8_t i=0;i<36;i++) | ||||||
| 		frskyX_init();  | 		{ | ||||||
|  | 			uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]); | ||||||
|  | 			uint8_t val=pgm_read_byte_near(&cc2500_conf[i][1]); | ||||||
|  | 			 | ||||||
|  | 			if(reg==CC2500_06_PKTLEN) | ||||||
|  | 				val=0x1E; | ||||||
|  | 			else | ||||||
|  | 				if(reg==CC2500_08_PKTCTRL0) | ||||||
|  | 					val=0x01; | ||||||
|  | 			else | ||||||
|  | 				if(reg==CC2500_0B_FSCTRL1) | ||||||
|  | 					val=0x0A; | ||||||
|  | 			else | ||||||
|  | 				if(reg==CC2500_10_MDMCFG4) | ||||||
|  | 					val=0x7B; | ||||||
|  | 			else | ||||||
|  | 				if(reg==CC2500_11_MDMCFG3) | ||||||
|  | 					val=0x61; | ||||||
|  | 			else | ||||||
|  | 				if(reg==CC2500_12_MDMCFG2) | ||||||
|  | 					val=0x13; | ||||||
|  | 			else | ||||||
|  | 				if(reg==CC2500_15_DEVIATN) | ||||||
|  | 					val=0x51; | ||||||
|  | 						 | ||||||
|  | 			cc2500_writeReg(reg,val); | ||||||
|  | 		} | ||||||
|  | 
 | ||||||
|  | 		cc2500_writeReg(CC2500_07_PKTCTRL1, 0x04);			 | ||||||
|  | 		cc2500_writeReg(CC2500_0C_FSCTRL0, option); | ||||||
|  | 		cc2500_strobe(CC2500_SIDLE);     | ||||||
| 		//
 | 		//
 | ||||||
| 		if(IS_AUTOBIND_FLAG_on) | 		for(uint8_t c=0;c < 47;c++){//calibrate hop channels
 | ||||||
| 		{	    | 			cc2500_strobe(CC2500_SIDLE);     | ||||||
| 			state = FRSKY_BIND; | 			cc2500_writeReg(CC2500_0A_CHANNR,pgm_read_word(&hop_data[c])); | ||||||
| 			initialize_data(1); | 			cc2500_strobe(CC2500_SCAL); | ||||||
|  | 			delayMicroseconds(900);//
 | ||||||
|  | 			calData[c][0] = cc2500_readReg(CC2500_23_FSCAL3); | ||||||
|  | 			calData[c][1] = cc2500_readReg(CC2500_24_FSCAL2);	 | ||||||
|  | 			calData[c][2] = cc2500_readReg(CC2500_25_FSCAL1); | ||||||
| 		} | 		} | ||||||
| 		else | 		cc2500_strobe(CC2500_SIDLE);    	 | ||||||
| 		{ | 		cc2500_writeReg(CC2500_0A_CHANNR,0x00); | ||||||
| 			state = FRSKY_DATA1; | 		cc2500_strobe(CC2500_SCAL); | ||||||
| 			initialize_data(0); | 		delayMicroseconds(900); | ||||||
|  | 		calData[47][0] = cc2500_readReg(CC2500_23_FSCAL3); | ||||||
|  | 		calData[47][1] = cc2500_readReg(CC2500_24_FSCAL2);	 | ||||||
|  | 		calData[47][2] = cc2500_readReg(CC2500_25_FSCAL1); | ||||||
|  | 		//#######END INIT########		
 | ||||||
|  | 	} | ||||||
|  | 	 | ||||||
|  | 	static void __attribute__((unused)) initialize_data(uint8_t adr) | ||||||
|  | 	{ | ||||||
|  | 		cc2500_writeReg(CC2500_0C_FSCTRL0,option);	// Frequency offset hack 
 | ||||||
|  | 		cc2500_writeReg(CC2500_18_MCSM0,    0x8);	 | ||||||
|  | 		cc2500_writeReg(CC2500_09_ADDR, adr ? 0x03 : rx_tx_addr[3]); | ||||||
|  | 		cc2500_writeReg(CC2500_07_PKTCTRL1,0x05); | ||||||
|  | 	} | ||||||
|  | 	 | ||||||
|  | 	static uint8_t __attribute__((unused)) crc_Byte( uint8_t byte ) | ||||||
|  | 	{ | ||||||
|  | 		crc = (crc<<8) ^ pgm_read_word(&CRCTable[((uint8_t)(crc>>8) ^ byte) & 0xFF]); | ||||||
|  | 		return byte; | ||||||
|  | 	} | ||||||
|  |      | ||||||
|  | 	static uint16_t  __attribute__((unused)) scaleForPXX( uint8_t i ) | ||||||
|  | 	{	//mapped 860,2140(125%) range to 64,1984(PXX values);
 | ||||||
|  | 		return (uint16_t)(((Servo_data[i]-PPM_MIN)*3)>>1)+64; | ||||||
|  | 	} | ||||||
|  | 	 | ||||||
|  | 	static void __attribute__((unused)) frskyX_build_bind_packet() | ||||||
|  | 	{ | ||||||
|  | 		crc=0; | ||||||
|  | 		packet[0] = 0x1D;        | ||||||
|  | 		packet[1] = 0x03;           | ||||||
|  | 		packet[2] = 0x01;                | ||||||
|  | 		//	
 | ||||||
|  | 		packet[3] = crc_Byte(rx_tx_addr[3]); | ||||||
|  | 		packet[4] = crc_Byte(rx_tx_addr[2]); | ||||||
|  | 		int idx = ((state -FRSKY_BIND) % 10) * 5; | ||||||
|  | 		packet[5] = crc_Byte(idx);	 | ||||||
|  | 		packet[6] = crc_Byte(pgm_read_word(&hop_data[idx++])); | ||||||
|  | 		packet[7] = crc_Byte(pgm_read_word(&hop_data[idx++])); | ||||||
|  | 		packet[8] = crc_Byte(pgm_read_word(&hop_data[idx++])); | ||||||
|  | 		packet[9] = crc_Byte(pgm_read_word(&hop_data[idx++])); | ||||||
|  | 		packet[10] = crc_Byte(pgm_read_word(&hop_data[idx++])); | ||||||
|  | 		packet[11] = crc_Byte(0x02); | ||||||
|  | 		packet[12] = crc_Byte(RX_num); | ||||||
|  | 		//
 | ||||||
|  | 		for(uint8_t i=13;i<28;i++) | ||||||
|  | 			packet[i]=crc_Byte(0); | ||||||
|  | 		//
 | ||||||
|  | 		packet[28]=highByte(crc); | ||||||
|  | 		packet[29]=lowByte(crc); | ||||||
|  | 		//
 | ||||||
|  | 	} | ||||||
|  | 	 | ||||||
|  | 	static void __attribute__((unused)) frskyX_data_frame() | ||||||
|  | 	{ | ||||||
|  | 		//0x1D 0xB3 0xFD 0x02 0x56 0x07 0x15 0x00 0x00 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x96 0x12
 | ||||||
|  | 		//
 | ||||||
|  | 		uint8_t lpass = pass_ ; | ||||||
|  | 		uint16_t chan_0 ; | ||||||
|  | 		uint16_t chan_1 ;  | ||||||
|  | 		uint8_t flag2 = 0; | ||||||
|  | 		uint8_t startChan = 0; | ||||||
|  | 		crc = 0; | ||||||
|  | 		//static uint8_t p = 0;
 | ||||||
|  | 		//
 | ||||||
|  | 		packet[0] = 0x1D;  | ||||||
|  | 		packet[1] = rx_tx_addr[3]; | ||||||
|  | 		packet[2] = rx_tx_addr[2]; | ||||||
|  | 		packet[3] = crc_Byte(0x02); | ||||||
|  | 		//  
 | ||||||
|  | 		packet[4] = crc_Byte((ctr<<6)+channr);	//*64
 | ||||||
|  | 		packet[5] = crc_Byte(counter_rst); | ||||||
|  | 		packet[6] = crc_Byte(RX_num); | ||||||
|  | 		//	FLAGS 00 - standard packet
 | ||||||
|  | 		//10, 12, 14, 16, 18, 1A, 1C, 1E - failsafe packet
 | ||||||
|  | 		//20 - range check packet
 | ||||||
|  | 		packet[7] = crc_Byte(FS_flag); | ||||||
|  | 		packet[8] = crc_Byte(flag2); | ||||||
|  | 		//
 | ||||||
|  | 		if ( lpass & 1 ) | ||||||
|  | 			startChan += 8 ; | ||||||
|  | 		 | ||||||
|  | 		for(uint8_t i = 0; i <12 ; i+=3) | ||||||
|  | 		{//12 bytes
 | ||||||
|  | 			chan_0 = scaleForPXX(startChan);		  | ||||||
|  | 			if(lpass & 1 ) | ||||||
|  | 				chan_0+=2048; | ||||||
|  | 			 | ||||||
|  | 			packet[9+i] = crc_Byte(lowByte(chan_0));//3 bytes*4
 | ||||||
|  | 			startChan++; | ||||||
|  | 			chan_1 = scaleForPXX(startChan); | ||||||
|  | 			if(lpass & 1 ) | ||||||
|  | 				chan_1+= 2048; | ||||||
|  | 			 | ||||||
|  | 			startChan++; | ||||||
|  | 			packet[9+i+1]=crc_Byte((((chan_0>>8) & 0x0F)|(chan_1 << 4))); | ||||||
|  | 			packet[9+i+2]=crc_Byte(chan_1>>4); | ||||||
| 		} | 		} | ||||||
| 		return 10000; | 		//packet[21]=crc_Byte(0x08);//first 
 | ||||||
|  | 		packet[21]=crc_Byte(0x80);//??? when received first telemetry frame is changed to 0x80
 | ||||||
|  | 		//packet[21]=crc_Byte(ptr[p]);//??? 
 | ||||||
|  |         //p=(p+1)%4;//repeating 4 bytes sequence pattern  every 4th frame.
 | ||||||
|  | 		 | ||||||
|  | 		pass_=lpass+1; | ||||||
|  | 		 | ||||||
|  | 		for (uint8_t i=22;i<28;i++) | ||||||
|  | 			packet[i]=crc_Byte(0); | ||||||
|  | 		 | ||||||
|  | 		packet[28]=highByte(crc); | ||||||
|  | 		packet[29]=lowByte(crc); | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
| 	uint16_t ReadFrSkyX() | 	uint16_t ReadFrSkyX() | ||||||
| @ -137,179 +277,33 @@ | |||||||
| 		return 1;		 | 		return 1;		 | ||||||
| 	} | 	} | ||||||
| 
 | 
 | ||||||
| 	void set_start(uint8_t ch ) | 	uint16_t initFrSkyX() | ||||||
| 	{ | 	{ | ||||||
| 		cc2500_strobe(CC2500_SIDLE); | 		while(!chanskip) | ||||||
| 		cc2500_writeReg(CC2500_23_FSCAL3, calData[ch][0]); | 		{ | ||||||
| 		cc2500_writeReg(CC2500_24_FSCAL2, calData[ch][1]); | 			randomSeed((uint32_t)analogRead(A6) << 10 | analogRead(A7)); | ||||||
| 		cc2500_writeReg(CC2500_25_FSCAL1, calData[ch][2]); | 			chanskip=random(0xfefefefe)%47; | ||||||
| 		cc2500_writeReg(CC2500_0A_CHANNR, ch==47?0:pgm_read_word(&hop_data[ch])); |  | ||||||
| 	}		 |  | ||||||
| 	 |  | ||||||
| 	void frskyX_init() |  | ||||||
| 	{ |  | ||||||
| 		CC2500_Reset(); |  | ||||||
| 		cc2500_writeReg(CC2500_02_IOCFG0, 0x06);		 |  | ||||||
| 		cc2500_writeReg(CC2500_00_IOCFG2, 0x06); |  | ||||||
| 		cc2500_writeReg(CC2500_17_MCSM1, 0x0C); |  | ||||||
| 		cc2500_writeReg(CC2500_18_MCSM0, 0x18); |  | ||||||
| 		cc2500_writeReg(CC2500_06_PKTLEN, 0x1E); |  | ||||||
| 		cc2500_writeReg(CC2500_07_PKTCTRL1, 0x04); |  | ||||||
| 		cc2500_writeReg(CC2500_08_PKTCTRL0, 0x01); |  | ||||||
| 		cc2500_writeReg(CC2500_3E_PATABLE, 0xff); |  | ||||||
| 		cc2500_writeReg(CC2500_0B_FSCTRL1, 0x0A); |  | ||||||
| 		cc2500_writeReg(CC2500_0C_FSCTRL0, 0x00); |  | ||||||
| 		cc2500_writeReg(CC2500_0D_FREQ2, 0x5c); |  | ||||||
| 		cc2500_writeReg(CC2500_0E_FREQ1, 0x76); |  | ||||||
| 		cc2500_writeReg(CC2500_0F_FREQ0, 0x27);	 |  | ||||||
| 		cc2500_writeReg(CC2500_10_MDMCFG4, 0x7B);	 |  | ||||||
| 		cc2500_writeReg(CC2500_11_MDMCFG3, 0x61); |  | ||||||
| 		cc2500_writeReg(CC2500_12_MDMCFG2, 0x13); |  | ||||||
| 		cc2500_writeReg(CC2500_13_MDMCFG1, 0x23); |  | ||||||
| 		cc2500_writeReg(CC2500_14_MDMCFG0, 0x7a); |  | ||||||
| 		cc2500_writeReg(CC2500_15_DEVIATN, 0x51); |  | ||||||
| 		cc2500_writeReg(CC2500_19_FOCCFG, 0x16); |  | ||||||
| 		cc2500_writeReg(CC2500_1A_BSCFG, 0x6c);	 |  | ||||||
| 		cc2500_writeReg(CC2500_1B_AGCCTRL2,0x43); |  | ||||||
| 		cc2500_writeReg(CC2500_1C_AGCCTRL1,0x40); |  | ||||||
| 		cc2500_writeReg(CC2500_1D_AGCCTRL0,0x91); |  | ||||||
| 		cc2500_writeReg(CC2500_21_FREND1, 0x56); |  | ||||||
| 		cc2500_writeReg(CC2500_22_FREND0, 0x10); |  | ||||||
| 		cc2500_writeReg(CC2500_23_FSCAL3, 0xa9); |  | ||||||
| 		cc2500_writeReg(CC2500_24_FSCAL2, 0x0A); |  | ||||||
| 		cc2500_writeReg(CC2500_25_FSCAL1, 0x00); |  | ||||||
| 		cc2500_writeReg(CC2500_26_FSCAL0, 0x11); |  | ||||||
| 		cc2500_writeReg(CC2500_29_FSTEST, 0x59); |  | ||||||
| 		cc2500_writeReg(CC2500_2C_TEST2, 0x88); |  | ||||||
| 		cc2500_writeReg(CC2500_2D_TEST1, 0x31); |  | ||||||
| 		cc2500_writeReg(CC2500_2E_TEST0, 0x0B); |  | ||||||
| 		cc2500_writeReg(CC2500_03_FIFOTHR, 0x07); |  | ||||||
| 		cc2500_writeReg(CC2500_09_ADDR, 0x00); |  | ||||||
| 		cc2500_writeReg(CC2500_07_PKTCTRL1, 0x04);			 |  | ||||||
| 		cc2500_writeReg(CC2500_0C_FSCTRL0, option); |  | ||||||
| 		cc2500_strobe(CC2500_SIDLE);     |  | ||||||
| 		//
 |  | ||||||
| 		for(uint8_t c=0;c < 47;c++){//calibrate hop channels
 |  | ||||||
| 			cc2500_strobe(CC2500_SIDLE);     |  | ||||||
| 			cc2500_writeReg(CC2500_0A_CHANNR,pgm_read_word(&hop_data[c])); |  | ||||||
| 			cc2500_strobe(CC2500_SCAL); |  | ||||||
| 			delayMicroseconds(900);//
 |  | ||||||
| 			calData[c][0] = cc2500_readReg(CC2500_23_FSCAL3); |  | ||||||
| 			calData[c][1] = cc2500_readReg(CC2500_24_FSCAL2);	 |  | ||||||
| 			calData[c][2] = cc2500_readReg(CC2500_25_FSCAL1); |  | ||||||
| 		} | 		} | ||||||
| 		cc2500_strobe(CC2500_SIDLE);    	 | 		while((chanskip-ctr)%4) | ||||||
| 		cc2500_writeReg(CC2500_0A_CHANNR,0x00); | 			ctr=(ctr+1)%4; | ||||||
| 		cc2500_strobe(CC2500_SCAL); |  | ||||||
| 		delayMicroseconds(900); |  | ||||||
| 		calData[47][0] = cc2500_readReg(CC2500_23_FSCAL3); |  | ||||||
| 		calData[47][1] = cc2500_readReg(CC2500_24_FSCAL2);	 |  | ||||||
| 		calData[47][2] = cc2500_readReg(CC2500_25_FSCAL1); |  | ||||||
| 		//#######END INIT########		
 |  | ||||||
| 	} |  | ||||||
| 		 | 		 | ||||||
| 	void initialize_data(uint8_t adr) | 		counter_rst=(chanskip-ctr)>>2; | ||||||
| 	{ | 		//for test***************
 | ||||||
| 		cc2500_writeReg(CC2500_0C_FSCTRL0,option);	// Frequency offset hack 
 | 		//rx_tx_addr[3]=0xB3;
 | ||||||
| 		cc2500_writeReg(CC2500_18_MCSM0,    0x8);	 | 		//rx_tx_addr[2]=0xFD;
 | ||||||
| 		cc2500_writeReg(CC2500_09_ADDR, adr ? 0x03 : rx_tx_addr[3]); | 		//************************
 | ||||||
| 		cc2500_writeReg(CC2500_07_PKTCTRL1,0x05); | 		frskyX_init();  | ||||||
| 	} |  | ||||||
| 	 |  | ||||||
| 	void frskyX_build_bind_packet() |  | ||||||
| 	{ |  | ||||||
| 		crc=0; |  | ||||||
| 		packet[0] = 0x1D;        |  | ||||||
| 		packet[1] = 0x03;           |  | ||||||
| 		packet[2] = 0x01;                |  | ||||||
| 		//
 | 		//
 | ||||||
| 		packet[3] = crc_Byte(rx_tx_addr[3]); | 		if(IS_AUTOBIND_FLAG_on) | ||||||
| 		packet[4] = crc_Byte(rx_tx_addr[2]); | 		{	    | ||||||
| 		int idx = ((state -FRSKY_BIND) % 10) * 5; | 			state = FRSKY_BIND; | ||||||
| 		packet[5] = crc_Byte(idx);	 | 			initialize_data(1); | ||||||
| 		packet[6] = crc_Byte(pgm_read_word(&hop_data[idx++])); |  | ||||||
| 		packet[7] = crc_Byte(pgm_read_word(&hop_data[idx++])); |  | ||||||
| 		packet[8] = crc_Byte(pgm_read_word(&hop_data[idx++])); |  | ||||||
| 		packet[9] = crc_Byte(pgm_read_word(&hop_data[idx++])); |  | ||||||
| 		packet[10] = crc_Byte(pgm_read_word(&hop_data[idx++])); |  | ||||||
| 		packet[11] = crc_Byte(0x02); |  | ||||||
| 		packet[12] = crc_Byte(RX_num); |  | ||||||
| 		//
 |  | ||||||
| 		for(uint8_t i=13;i<28;i++) |  | ||||||
| 			packet[i]=crc_Byte(0); |  | ||||||
| 		//
 |  | ||||||
| 		packet[28]=highByte(crc); |  | ||||||
| 		packet[29]=lowByte(crc); |  | ||||||
| 		//
 |  | ||||||
| 	} |  | ||||||
| 	 |  | ||||||
| 	void frskyX_data_frame() |  | ||||||
| 	{ |  | ||||||
| 		//0x1D 0xB3 0xFD 0x02 0x56 0x07 0x15 0x00 0x00 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x00 0x04 0x40 0x08 0x00 0x00 0x00 0x00 0x00 0x00 0x96 0x12
 |  | ||||||
| 		//
 |  | ||||||
| 		uint8_t lpass = pass_ ; |  | ||||||
| 		uint16_t chan_0 ; |  | ||||||
| 		uint16_t chan_1 ;  |  | ||||||
| 		uint8_t flag2 = 0; |  | ||||||
| 		uint8_t startChan = 0; |  | ||||||
| 		crc = 0; |  | ||||||
| 		//static uint8_t p = 0;
 |  | ||||||
| 		//
 |  | ||||||
| 		packet[0] = 0x1D;  |  | ||||||
| 		packet[1] = rx_tx_addr[3]; |  | ||||||
| 		packet[2] = rx_tx_addr[2]; |  | ||||||
| 		packet[3] = crc_Byte(0x02); |  | ||||||
| 		//  
 |  | ||||||
| 		packet[4] = crc_Byte((ctr<<6)+channr);	//*64
 |  | ||||||
| 		packet[5] = crc_Byte(counter_rst); |  | ||||||
| 		packet[6] = crc_Byte(RX_num); |  | ||||||
| 		//	FLAGS 00 - standard packet
 |  | ||||||
| 		//10, 12, 14, 16, 18, 1A, 1C, 1E - failsafe packet
 |  | ||||||
| 		//20 - range check packet
 |  | ||||||
| 		packet[7] = crc_Byte(FS_flag); |  | ||||||
| 		packet[8] = crc_Byte(flag2); |  | ||||||
| 		//
 |  | ||||||
| 		if ( lpass & 1 ) |  | ||||||
| 			startChan += 8 ; |  | ||||||
| 		 |  | ||||||
| 		for(uint8_t i = 0; i <12 ; i+=3) |  | ||||||
| 		{//12 bytes
 |  | ||||||
| 			chan_0 = scaleForPXX(startChan);		  |  | ||||||
| 			if(lpass & 1 ) |  | ||||||
| 				chan_0+=2048; |  | ||||||
| 			 |  | ||||||
| 			packet[9+i] = crc_Byte(lowByte(chan_0));//3 bytes*4
 |  | ||||||
| 			startChan++; |  | ||||||
| 			chan_1 = scaleForPXX(startChan); |  | ||||||
| 			if(lpass & 1 ) |  | ||||||
| 				chan_1+= 2048; |  | ||||||
| 			 |  | ||||||
| 			startChan++; |  | ||||||
| 			packet[9+i+1]=crc_Byte((((chan_0>>8) & 0x0F)|(chan_1 << 4))); |  | ||||||
| 			packet[9+i+2]=crc_Byte(chan_1>>4); |  | ||||||
| 		} | 		} | ||||||
| 		//packet[21]=crc_Byte(0x08);//first 
 | 		else | ||||||
| 		packet[21]=crc_Byte(0x80);//??? when received first telemetry frame is changed to 0x80
 | 		{ | ||||||
| 		//packet[21]=crc_Byte(ptr[p]);//??? 
 | 			state = FRSKY_DATA1; | ||||||
|         //p=(p+1)%4;//repeating 4 bytes sequence pattern  every 4th frame.
 | 			initialize_data(0); | ||||||
| 		 | 		} | ||||||
| 		pass_=lpass+1; | 		return 10000; | ||||||
| 		 |  | ||||||
| 		for (uint8_t i=22;i<28;i++) |  | ||||||
| 			packet[i]=crc_Byte(0); |  | ||||||
| 		 |  | ||||||
| 		packet[28]=highByte(crc); |  | ||||||
| 		packet[29]=lowByte(crc); |  | ||||||
| 	} |  | ||||||
| 
 |  | ||||||
| 	uint16_t scaleForPXX( uint8_t i ) |  | ||||||
| 	{	//mapped 860,2140(125%) range to 64,1984(PXX values);
 |  | ||||||
| 		return (uint16_t)(((Servo_data[i]-PPM_MIN)*3)>>1)+64; |  | ||||||
| 	} |  | ||||||
| 	 |  | ||||||
| 	uint8_t crc_Byte( uint8_t byte ) |  | ||||||
| 	{ |  | ||||||
| 		crc = (crc<<8) ^ pgm_read_word(&CRCTable[((uint8_t)(crc>>8) ^ byte) & 0xFF]); |  | ||||||
| 		return byte; |  | ||||||
| 	}	 | 	}	 | ||||||
| #endif | #endif | ||||||
| @ -38,45 +38,19 @@ static void __attribute__((unused)) frsky2way_init(uint8_t bind) | |||||||
| 	// Configure cc2500 for tx mode
 | 	// Configure cc2500 for tx mode
 | ||||||
| 	CC2500_Reset(); | 	CC2500_Reset(); | ||||||
| 	//
 | 	//
 | ||||||
| 	cc2500_writeReg(CC2500_02_IOCFG0, 0x06);		 | 	for(uint8_t i=0;i<36;i++) | ||||||
| 	cc2500_writeReg(CC2500_00_IOCFG2, 0x06); | 	{ | ||||||
| 	cc2500_writeReg(CC2500_17_MCSM1, 0x0c); | 		uint8_t reg=pgm_read_byte_near(&cc2500_conf[i][0]); | ||||||
| 	cc2500_writeReg(CC2500_18_MCSM0, 0x18); | 		uint8_t val=pgm_read_byte_near(&cc2500_conf[i][1]); | ||||||
| 	cc2500_writeReg(CC2500_06_PKTLEN, 0x19); | 		 | ||||||
| 	cc2500_writeReg(CC2500_07_PKTCTRL1, 0x04); | 		if(reg==CC2500_0C_FSCTRL0) | ||||||
| 	cc2500_writeReg(CC2500_08_PKTCTRL0, 0x05); | 			val=option; | ||||||
| 	cc2500_writeReg(CC2500_3E_PATABLE, 0xff); | 		else | ||||||
| 	cc2500_writeReg(CC2500_0B_FSCTRL1, 0x08); | 			if(reg==CC2500_1B_AGCCTRL2) | ||||||
| 	cc2500_writeReg(CC2500_0C_FSCTRL0, option); | 				val=bind ? 0x43 : 0x03; | ||||||
| 	//base freq              FREQ = 0x5C7627 (F = 2404MHz)
 | 		cc2500_writeReg(reg,val); | ||||||
| 	cc2500_writeReg(CC2500_0D_FREQ2, 0x5c);	 | 	} | ||||||
| 	cc2500_writeReg(CC2500_0E_FREQ1, 0x76); | 
 | ||||||
| 	cc2500_writeReg(CC2500_0F_FREQ0, 0x27); |  | ||||||
| 	//		
 |  | ||||||
| 	cc2500_writeReg(CC2500_10_MDMCFG4, 0xAA);		 |  | ||||||
| 	cc2500_writeReg(CC2500_11_MDMCFG3, 0x39); |  | ||||||
| 	cc2500_writeReg(CC2500_12_MDMCFG2, 0x11); |  | ||||||
| 	cc2500_writeReg(CC2500_13_MDMCFG1, 0x23); |  | ||||||
| 	cc2500_writeReg(CC2500_14_MDMCFG0, 0x7a); |  | ||||||
| 	cc2500_writeReg(CC2500_15_DEVIATN, 0x42); |  | ||||||
| 	cc2500_writeReg(CC2500_19_FOCCFG, 0x16); |  | ||||||
| 	cc2500_writeReg(CC2500_1A_BSCFG, 0x6c);	 |  | ||||||
| 	cc2500_writeReg(CC2500_1B_AGCCTRL2, bind ? 0x43 : 0x03); |  | ||||||
| 	cc2500_writeReg(CC2500_1C_AGCCTRL1,0x40); |  | ||||||
| 	cc2500_writeReg(CC2500_1D_AGCCTRL0,0x91); |  | ||||||
| 	cc2500_writeReg(CC2500_21_FREND1, 0x56); |  | ||||||
| 	cc2500_writeReg(CC2500_22_FREND0, 0x10); |  | ||||||
| 	cc2500_writeReg(CC2500_23_FSCAL3, 0xa9); |  | ||||||
| 	cc2500_writeReg(CC2500_24_FSCAL2, 0x0A); |  | ||||||
| 	cc2500_writeReg(CC2500_25_FSCAL1, 0x00); |  | ||||||
| 	cc2500_writeReg(CC2500_26_FSCAL0, 0x11); |  | ||||||
| 	cc2500_writeReg(CC2500_29_FSTEST, 0x59); |  | ||||||
| 	cc2500_writeReg(CC2500_2C_TEST2, 0x88); |  | ||||||
| 	cc2500_writeReg(CC2500_2D_TEST1, 0x31); |  | ||||||
| 	cc2500_writeReg(CC2500_2E_TEST0, 0x0B); |  | ||||||
| 	cc2500_writeReg(CC2500_03_FIFOTHR, 0x07); |  | ||||||
| 	cc2500_writeReg(CC2500_09_ADDR, 0x00); |  | ||||||
| 	//
 |  | ||||||
| 	CC2500_SetTxRxMode(TX_EN); | 	CC2500_SetTxRxMode(TX_EN); | ||||||
| 	CC2500_SetPower(); | 	CC2500_SetPower(); | ||||||
| 	 | 	 | ||||||
|  | |||||||
| @ -44,8 +44,6 @@ uint8_t  packet[40]; | |||||||
| // Servo data
 | // Servo data
 | ||||||
| uint16_t Servo_data[NUM_CHN]; | uint16_t Servo_data[NUM_CHN]; | ||||||
| uint8_t  Servo_AUX; | uint8_t  Servo_AUX; | ||||||
| // PPM variable
 |  | ||||||
| volatile uint16_t PPM_data[NUM_CHN]; |  | ||||||
| 
 | 
 | ||||||
| // Protocol variables
 | // Protocol variables
 | ||||||
| uint8_t  rx_tx_addr[5]; | uint8_t  rx_tx_addr[5]; | ||||||
| @ -74,6 +72,9 @@ uint8_t  RX_num; | |||||||
| uint8_t mode_select; | uint8_t mode_select; | ||||||
| uint8_t protocol_flags=0,protocol_flags2=0; | uint8_t protocol_flags=0,protocol_flags2=0; | ||||||
| 
 | 
 | ||||||
|  | // PPM variable
 | ||||||
|  | volatile uint16_t PPM_data[NUM_CHN]; | ||||||
|  | 
 | ||||||
| // Serial variables
 | // Serial variables
 | ||||||
| #define RXBUFFER_SIZE 25 | #define RXBUFFER_SIZE 25 | ||||||
| #define TXBUFFER_SIZE 12 | #define TXBUFFER_SIZE 12 | ||||||
| @ -156,7 +157,9 @@ void setup() | |||||||
| 	MProtocol_id_master=random_id(10,false); | 	MProtocol_id_master=random_id(10,false); | ||||||
| 
 | 
 | ||||||
| 	//Init RF modules
 | 	//Init RF modules
 | ||||||
| 	CC2500_Reset(); | 	#ifdef	CC2500_INSTALLED | ||||||
|  | 		CC2500_Reset(); | ||||||
|  | 	#endif | ||||||
| 
 | 
 | ||||||
| 	//Protocol and interrupts initialization
 | 	//Protocol and interrupts initialization
 | ||||||
| 	if(mode_select != MODE_SERIAL) | 	if(mode_select != MODE_SERIAL) | ||||||
| @ -582,7 +585,6 @@ void Serial_write(uint8_t data) | |||||||
| 
 | 
 | ||||||
| static void Mprotocol_serial_init() | static void Mprotocol_serial_init() | ||||||
| { | { | ||||||
| 	#define BAUD 100000 |  | ||||||
| 	#include <util/setbaud.h>	 | 	#include <util/setbaud.h>	 | ||||||
| 	UBRR0H = UBRRH_VALUE; | 	UBRR0H = UBRRH_VALUE; | ||||||
| 	UBRR0L = UBRRL_VALUE; | 	UBRR0L = UBRRL_VALUE; | ||||||
|  | |||||||
| @ -154,7 +154,7 @@ void NRF24L01_SetBitrate(uint8_t bitrate) | |||||||
|     // Note that bitrate 250kbps (and bit RF_DR_LOW) is valid only
 |     // Note that bitrate 250kbps (and bit RF_DR_LOW) is valid only
 | ||||||
|     // for nRF24L01+. There is no way to programmatically tell it from
 |     // for nRF24L01+. There is no way to programmatically tell it from
 | ||||||
|     // older version, nRF24L01, but the older is practically phased out
 |     // older version, nRF24L01, but the older is practically phased out
 | ||||||
|     // by Nordic, so we assume that we deal with with modern version.
 |     // by Nordic, so we assume that we deal with modern version.
 | ||||||
| 
 | 
 | ||||||
|     // Bit 0 goes to RF_DR_HIGH, bit 1 - to RF_DR_LOW
 |     // Bit 0 goes to RF_DR_HIGH, bit 1 - to RF_DR_LOW
 | ||||||
|     rf_setup = (rf_setup & 0xD7) | ((bitrate & 0x02) << 4) | ((bitrate & 0x01) << 3); |     rf_setup = (rf_setup & 0xD7) | ((bitrate & 0x02) << 4) | ((bitrate & 0x01) << 3); | ||||||
|  | |||||||
| @ -59,24 +59,23 @@ | |||||||
| #endif | #endif | ||||||
| 
 | 
 | ||||||
| //Update this table to set which protocol and all associated settings are called for the corresponding dial number
 | //Update this table to set which protocol and all associated settings are called for the corresponding dial number
 | ||||||
| static const PPM_Parameters PPM_prot[15]= | const PPM_Parameters PPM_prot[15]=	{ | ||||||
| { | //	Dial	Protocol 		Sub protocol	RX_Num	Power		Auto Bind		Option
 | ||||||
| //	Protocol 		Sub protocol	RX_Num	Power		Auto Bind		Option
 | /*	1	*/	{MODE_FLYSKY,	Flysky		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_FLYSKY,	Flysky		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=1
 | /*	2	*/	{MODE_HUBSAN,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_HUBSAN,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=2
 | /*	3	*/	{MODE_FRSKY	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0xD7	}, | ||||||
| 	{MODE_FRSKY	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0xD7	},	//Dial=3
 | /*	4	*/	{MODE_HISKY	,	Hisky		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_HISKY	,	Hisky		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=4
 | /*	5	*/	{MODE_V2X2	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_V2X2	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=5
 | /*	6	*/	{MODE_DSM2	,	DSM2		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_DSM2	,	DSM2		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=6
 | /*	7	*/	{MODE_DEVO	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_DEVO	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=7
 | /*	8	*/	{MODE_YD717	,	YD717		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_YD717	,	YD717		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=8
 | /*	9	*/	{MODE_KN	,	WLTOYS		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_KN	,	WLTOYS		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=9
 | /*	10	*/	{MODE_SYMAX	,	SYMAX		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_SYMAX	,	SYMAX		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=10
 | /*	11	*/	{MODE_SLT	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_SLT	,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=11
 | /*	12	*/	{MODE_CX10	,	CX10_BLUE	,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_CX10	,	CX10_BLUE	,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=12
 | /*	13	*/	{MODE_CG023	,	CG023		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_CG023	,	CG023		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=13
 | /*	14	*/	{MODE_BAYANG,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}, | ||||||
| 	{MODE_BAYANG,	0			,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		},	//Dial=14
 | /*	15	*/	{MODE_SYMAX	,	SYMAX5C		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		} | ||||||
| 	{MODE_SYMAX	,	SYMAX5C		,	0	,	P_HIGH	,	NO_AUTOBIND	,	0		}	//Dial=15
 |  | ||||||
| }; | }; | ||||||
| /* Available protocols and associated sub protocols:
 | /* Available protocols and associated sub protocols:
 | ||||||
| 	MODE_FLYSKY | 	MODE_FLYSKY | ||||||
| @ -155,10 +154,10 @@ Option		value between 0 and 255. 0xD7 or 0x00 for Frsky fine tuning. | |||||||
| 
 | 
 | ||||||
| // Turnigy PPM and channels
 | // Turnigy PPM and channels
 | ||||||
| #if defined(TX_ER9X) | #if defined(TX_ER9X) | ||||||
| #define PPM_MAX		2140 | #define PPM_MAX		2140	//	125%
 | ||||||
| #define PPM_MIN		860 | #define PPM_MIN		860		//	125%
 | ||||||
| #define PPM_MAX_100 2012 | #define PPM_MAX_100 2012	//	100%
 | ||||||
| #define PPM_MIN_100 988 | #define PPM_MIN_100 988		//	100%
 | ||||||
| enum chan_order{ | enum chan_order{ | ||||||
| 	AILERON =0, | 	AILERON =0, | ||||||
| 	ELEVATOR, | 	ELEVATOR, | ||||||
| @ -178,10 +177,10 @@ enum chan_order{ | |||||||
| 
 | 
 | ||||||
| // Devo PPM and channels
 | // Devo PPM and channels
 | ||||||
| #if defined(TX_DEVO7) | #if defined(TX_DEVO7) | ||||||
| #define PPM_MAX		2100 | #define PPM_MAX		2100	//	125%
 | ||||||
| #define PPM_MIN		900 | #define PPM_MIN		900		//	125%
 | ||||||
| #define PPM_MAX_100	1920 | #define PPM_MAX_100	1920	//	100%
 | ||||||
| #define PPM_MIN_100	1120 | #define PPM_MIN_100	1120	//	100%
 | ||||||
| enum chan_order{ | enum chan_order{ | ||||||
| 	ELEVATOR=0, | 	ELEVATOR=0, | ||||||
| 	AILERON, | 	AILERON, | ||||||
| @ -201,10 +200,10 @@ enum chan_order{ | |||||||
| 
 | 
 | ||||||
| // SPEKTRUM PPM and channels
 | // SPEKTRUM PPM and channels
 | ||||||
| #if defined(TX_SPEKTRUM) | #if defined(TX_SPEKTRUM) | ||||||
| #define PPM_MAX		2000 | #define PPM_MAX		2000	//	125%
 | ||||||
| #define PPM_MIN		1000 | #define PPM_MIN		1000	//	125%
 | ||||||
| #define PPM_MAX_100	1900 | #define PPM_MAX_100	1900	//	100%
 | ||||||
| #define PPM_MIN_100	1100 | #define PPM_MIN_100	1100	//	100%
 | ||||||
| enum chan_order{ | enum chan_order{ | ||||||
| 	THROTTLE=0, | 	THROTTLE=0, | ||||||
| 	AILERON, | 	AILERON, | ||||||
| @ -224,10 +223,10 @@ enum chan_order{ | |||||||
| 
 | 
 | ||||||
| // HISKY
 | // HISKY
 | ||||||
| #if defined(TX_HISKY) | #if defined(TX_HISKY) | ||||||
| #define PPM_MAX		2000 | #define PPM_MAX		2000	//	125%
 | ||||||
| #define PPM_MIN		1000 | #define PPM_MIN		1000	//	125%
 | ||||||
| #define PPM_MAX_100	1900 | #define PPM_MAX_100	1900	//	100%
 | ||||||
| #define PPM_MIN_100	1100 | #define PPM_MIN_100	1100	//	100%
 | ||||||
| enum chan_order{ | enum chan_order{ | ||||||
| 	AILERON =0, | 	AILERON =0, | ||||||
| 	ELEVATOR, | 	ELEVATOR, | ||||||
| @ -248,3 +247,7 @@ enum chan_order{ | |||||||
| #define PPM_MIN_COMMAND 1250 | #define PPM_MIN_COMMAND 1250 | ||||||
| #define PPM_SWITCH		1550 | #define PPM_SWITCH		1550 | ||||||
| #define PPM_MAX_COMMAND 1750 | #define PPM_MAX_COMMAND 1750 | ||||||
|  | 
 | ||||||
|  | //Uncoment the desired serial speed
 | ||||||
|  | #define BAUD 100000 | ||||||
|  | //#define BAUD 125000
 | ||||||
|  | |||||||
| @ -156,4 +156,43 @@ enum { | |||||||
| //void CC2500_WriteData(u8 *packet, u8 length);
 | //void CC2500_WriteData(u8 *packet, u8 length);
 | ||||||
| //void CC2500_ReadData(u8 *dpbuffer, int len);
 | //void CC2500_ReadData(u8 *dpbuffer, int len);
 | ||||||
| //void CC2500_SetTxRxMode(enum TXRX_State);
 | //void CC2500_SetTxRxMode(enum TXRX_State);
 | ||||||
|  | 
 | ||||||
|  | const PROGMEM uint8_t cc2500_conf[][2]={ | ||||||
|  | 	{ CC2500_02_IOCFG0, 0x06 },		 | ||||||
|  | 	{ CC2500_00_IOCFG2, 0x06 }, | ||||||
|  | 	{ CC2500_17_MCSM1, 0x0c }, | ||||||
|  | 	{ CC2500_18_MCSM0, 0x18 }, | ||||||
|  | 	{ CC2500_06_PKTLEN, 0x19 }, | ||||||
|  | 	{ CC2500_07_PKTCTRL1, 0x04 }, | ||||||
|  | 	{ CC2500_08_PKTCTRL0, 0x05 }, | ||||||
|  | 	{ CC2500_3E_PATABLE, 0xff }, | ||||||
|  | 	{ CC2500_0B_FSCTRL1, 0x08 }, | ||||||
|  | 	{ CC2500_0C_FSCTRL0, 0x00 },	// option
 | ||||||
|  | 	{ CC2500_0D_FREQ2, 0x5c },	 | ||||||
|  | 	{ CC2500_0E_FREQ1, 0x76 }, | ||||||
|  | 	{ CC2500_0F_FREQ0, 0x27 }, | ||||||
|  | 	{ CC2500_10_MDMCFG4, 0xAA },		 | ||||||
|  | 	{ CC2500_11_MDMCFG3, 0x39 }, | ||||||
|  | 	{ CC2500_12_MDMCFG2, 0x11 }, | ||||||
|  | 	{ CC2500_13_MDMCFG1, 0x23 }, | ||||||
|  | 	{ CC2500_14_MDMCFG0, 0x7a }, | ||||||
|  | 	{ CC2500_15_DEVIATN, 0x42 }, | ||||||
|  | 	{ CC2500_19_FOCCFG, 0x16 }, | ||||||
|  | 	{ CC2500_1A_BSCFG, 0x6c },	 | ||||||
|  | 	{ CC2500_1B_AGCCTRL2, 0x43 },	// bind ? 0x43 : 0x03
 | ||||||
|  | 	{ CC2500_1C_AGCCTRL1,0x40 }, | ||||||
|  | 	{ CC2500_1D_AGCCTRL0,0x91 }, | ||||||
|  | 	{ CC2500_21_FREND1, 0x56 }, | ||||||
|  | 	{ CC2500_22_FREND0, 0x10 }, | ||||||
|  | 	{ CC2500_23_FSCAL3, 0xa9 }, | ||||||
|  | 	{ CC2500_24_FSCAL2, 0x0A }, | ||||||
|  | 	{ CC2500_25_FSCAL1, 0x00 }, | ||||||
|  | 	{ CC2500_26_FSCAL0, 0x11 }, | ||||||
|  | 	{ CC2500_29_FSTEST, 0x59 }, | ||||||
|  | 	{ CC2500_2C_TEST2, 0x88 }, | ||||||
|  | 	{ CC2500_2D_TEST1, 0x31 }, | ||||||
|  | 	{ CC2500_2E_TEST0, 0x0B }, | ||||||
|  | 	{ CC2500_03_FIFOTHR, 0x07 }, | ||||||
|  | 	{ CC2500_09_ADDR, 0x00 } | ||||||
|  | }; | ||||||
| #endif | #endif | ||||||
|  | |||||||
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