mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-07-02 19:37:52 +00:00
Delete StmBoot.ino
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@ -1,558 +0,0 @@
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#define _FLASH_PROG 1
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// Temp
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#define SIGNATURE_0 0x1E
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#define SIGNATURE_1 0x55 //0x97
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#define SIGNATURE_2 0xAA //0x02
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#define SIGNATURE_3 0x97
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#define SIGNATURE_4 0x02
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#define STM32F10X_CL
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#include "stm32f10x.h"
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#include "stk500.h"
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#include "stm32f10x_flash.h"
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#define OPTIBOOT_MAJVER 4
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#define OPTIBOOT_MINVER 5
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uint32_t ResetReason ;
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uint32_t LongCount ;
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uint8_t Buff[512] ;
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uint8_t NotSynced ;
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uint8_t Port ;
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static void start_timer2()
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{
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TIM2->CNT = 0 ;
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TIM2->PSC = 71 ; // 72-1;for 72 MHZ /1.0usec/(71+1)
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TIM2->ARR = 0xFFFF; //count till max
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}
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void RCC_DeInit(void)
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{
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/* Disable APB2 Peripheral Reset */
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RCC->APB2RSTR = 0x00000000;
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/* Disable APB1 Peripheral Reset */
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RCC->APB1RSTR = 0x00000000;
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/* FLITF and SRAM Clock ON */
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RCC->AHBENR = 0x00000014;
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/* Disable APB2 Peripheral Clock */
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RCC->APB2ENR = 0x00000000;
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/* Disable APB1 Peripheral Clock */
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RCC->APB1ENR = 0x00000000;
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/* Set HSION bit */
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RCC->CR |= (u32)0x00000001;
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/* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], ADCPRE[1:0] and MCO[2:0] bits*/
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RCC->CFGR &= 0xF8FF0000;
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/* Reset HSEON, CSSON and PLLON bits */
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RCC->CR &= 0xFEF6FFFF;
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/* Reset HSEBYP bit */
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RCC->CR &= 0xFFFBFFFF;
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/* Reset PLLSRC, PLLXTPRE, PLLMUL[3:0] and USBPRE bits */
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RCC->CFGR &= 0xFF80FFFF;
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/* Disable all interrupts */
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RCC->CIR = 0x009F0000;
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}
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void disableInterrupts()
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{
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__disable_irq() ;
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NVIC_DisableIRQ(USART1_IRQn) ;
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NVIC_DisableIRQ(USART2_IRQn) ;
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NVIC_DisableIRQ(USART3_IRQn) ;
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NVIC_DisableIRQ(TIM1_BRK_IRQn) ;
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NVIC_DisableIRQ(TIM1_UP_IRQn) ;
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NVIC_DisableIRQ(TIM1_TRG_COM_IRQn) ;
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NVIC_DisableIRQ(TIM1_CC_IRQn) ;
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NVIC_DisableIRQ(TIM3_IRQn) ;
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NVIC_DisableIRQ(TIM4_IRQn) ;
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NVIC_DisableIRQ(ADC1_2_IRQn) ;
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SysTick->CTRL = 0 ;
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}
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static void executeApp()
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{
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// Expected at 0x08002000
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uint32_t *p ;
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// Disable all peripheral clocks
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// Disable used PLL
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// Disable interrupts
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// Clear pending interrupts
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p = (uint32_t *) 0x08002000 ;
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if ( *p == 0x20005000 )
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{
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USART1->CR1 = 0 ;
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USART1->BRR = 0 ;
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USART2->CR1 = 0 ;
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USART2->BRR = 0 ;
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USART3->CR1 = 0 ;
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USART3->BRR = 0 ;
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(void) USART2->SR ;
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(void) USART2->DR ;
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(void) USART1->SR ;
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(void) USART1->DR ;
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USART1->SR = 0 ;
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USART2->SR = 0 ;
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USART3->SR = 0 ;
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RCC->APB1ENR &= ~RCC_APB1ENR_USART2EN ; // Disable clock
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RCC->APB1ENR &= ~RCC_APB1ENR_USART3EN ; // Disable clock
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TIM2->CR1 = 0 ;
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disableInterrupts() ;
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NVIC->ICER[0] = 0xFFFFFFFF ;
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NVIC->ICER[1] = 0xFFFFFFFF ;
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NVIC->ICER[2] = 0xFFFFFFFF ;
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NVIC->ICPR[0] = 0xFFFFFFFF ;
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NVIC->ICPR[1] = 0xFFFFFFFF ;
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NVIC->ICPR[2] = 0xFFFFFFFF ;
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RCC_DeInit() ;
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SysTick->CTRL = 0 ;
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SysTick->LOAD = 0 ;
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SysTick->VAL = 0 ;
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asm(" mov.w r1, #134217728"); // 0x8000000
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asm(" add.w r1, #8192"); // 0x2000
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asm(" movw r0, #60680"); // 0xED08
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asm(" movt r0, #57344"); // 0xE000
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asm(" str r1, [r0, #0]"); // Set the VTOR
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asm("ldr r0, [r1, #0]"); // Stack pointer value
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asm("msr msp, r0"); // Set it
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asm("ldr r0, [r1, #4]"); // Reset address
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asm("mov.w r1, #1");
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asm("orr r0, r1"); // Set lsbit
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asm("bx r0"); // Execute application
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}
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}
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static uint16_t test0()
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{
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if ( USART2->SR & USART_SR_RXNE )
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{
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return USART2->DR ;
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}
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return 0xFFFF ;
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}
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static uint16_t test1()
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{
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if ( USART1->SR & USART_SR_RXNE )
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{
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return USART1->DR ;
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}
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return 0xFFFF ;
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}
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uint8_t getch1()
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{
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while ( ( USART1->SR & USART_SR_RXNE ) == 0 )
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{
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IWDG->KR = 0xAAAA ; // reload
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if ( TIM2->SR & TIM_SR_UIF )
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{
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TIM2->SR &= ~TIM_SR_UIF ;
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GPIOA->ODR ^= 0x0002 ;
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}
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// wait
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}
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return USART1->DR ;
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}
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uint8_t getch()
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{
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if ( Port )
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{
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return getch1() ;
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}
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while ( ( USART2->SR & USART_SR_RXNE ) == 0 )
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{
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IWDG->KR = 0xAAAA ; // reload
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if ( TIM2->SR & TIM_SR_UIF )
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{
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TIM2->SR &= ~TIM_SR_UIF ;
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GPIOA->ODR ^= 0x0002 ;
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}
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// wait
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}
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return USART2->DR ;
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}
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void putch( uint8_t byte )
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{
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if ( Port )
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{
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while ( ( USART1->SR & USART_SR_TXE ) == 0 )
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{
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// wait
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}
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USART1->DR = byte ;
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}
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else
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{
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while ( ( USART3->SR & USART_SR_TXE ) == 0 )
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{
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// wait
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}
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USART3->DR = byte ;
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}
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}
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static void serialInit()
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{
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RCC->APB2ENR |= RCC_APB2ENR_USART1EN ; // Enable clock
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RCC->APB1ENR |= RCC_APB1ENR_USART2EN ; // Enable clock
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RCC->APB1ENR |= RCC_APB1ENR_USART3EN ; // Enable clock
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RCC->APB2ENR |= RCC_APB2ENR_IOPAEN ;
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RCC->APB2ENR |= RCC_APB2ENR_IOPBEN ;
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RCC->APB2ENR |= RCC_APB2ENR_AFIOEN ;
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GPIOA->CRH = GPIOA->CRH & 0xFFFFFF0F | 0x00000090 ; // PA9
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// USART2 TX is PA2, only Rx used
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// USART3 TX is PB10, only Tx used
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GPIOB->CRH = GPIOB->CRH & 0xFFFFF0FF | 0x00000900 ; // PB10
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USART1->BRR = 72000000 / 57600 ;
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USART1->CR1 = 0x200C ;
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USART2->BRR = 36000000 / 57600 ;
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USART2->CR1 = 0x200C ;
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USART2->CR2 = 0 ;
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USART2->CR3 = 0 ;
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USART3->BRR = 36000000 / 57600 ;
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USART3->CR1 = 0x200C ;
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USART3->CR2 = 0 ;
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USART3->CR3 = 0 ;
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}
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void setup()
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{
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serialInit() ;
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start_timer2() ;//0.5us
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FLASH_Unlock() ;
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GPIOA->BSRR = 0x000000F1 ;
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GPIOA->CRL = GPIOA->CRL & 0x0000FF00 | 0x88880028 ; // LED and inputs
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// Input with pullup, 1000B, and set the ODR bit
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GPIOB->CRL = GPIOB->CRL & 0xFFFF0F0F | 0x00002020 ; // PB1 and PB3, invert controls
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GPIOB->BRR = 0x00000008 ;
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GPIOB->BSRR = 0x00000002 ;
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}
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void verifySpace()
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{
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if ( getch() != CRC_EOP)
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{
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NotSynced = 1 ;
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return ;
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}
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putch(STK_INSYNC);
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}
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void bgetNch(uint8_t count)
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{
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do
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{
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getch() ;
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} while (--count) ;
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verifySpace() ;
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}
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void loader( uint32_t check )
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{
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uint8_t ch ;
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uint8_t GPIOR0 ;
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uint32_t address = 0 ;
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uint8_t lastCh ;
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ResetReason = RCC->CSR ;
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RCC->CSR |= RCC_CSR_RMVF ;
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if ( ResetReason & RCC_CSR_SFTRSTF )
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{
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check = 0 ; // Stay in bootloader
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}
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NVIC_DisableIRQ(TIM2_IRQn) ;
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if ( check )
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{
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TIM2->CNT = 0 ;
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TIM2->SR &= ~TIM_SR_UIF ;
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while ( ( TIM2->SR & TIM_SR_UIF ) == 0 )
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{
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// wait
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}
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TIM2->SR &= ~TIM_SR_UIF ;
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while ( ( TIM2->SR & TIM_SR_UIF ) == 0 )
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{
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// wait
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}
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TIM2->SR &= ~TIM_SR_UIF ;
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ch = GPIOA->IDR & 0xF1 ;
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if ( ch != 0xF0 )
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{
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return ;
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}
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}
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disableInterrupts() ;
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NotSynced = 1 ;
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lastCh = 0 ;
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for (;;)
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{
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while ( NotSynced )
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{
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uint16_t data ;
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data = test0() ;
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if ( data != 0xFFFF )
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{
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ch = data ;
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if ( ( lastCh == STK_GET_SYNC ) && ( ch == CRC_EOP ) )
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{
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NotSynced = 0 ;
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Port = 0 ;
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break ;
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}
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lastCh = ch ;
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}
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data = test1() ;
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if ( data != 0xFFFF )
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{
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ch = data ;
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if ( ( lastCh == STK_GET_SYNC ) && ( ch == CRC_EOP ) )
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{
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NotSynced = 0 ;
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Port = 1 ;
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break ;
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}
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lastCh = ch ;
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}
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IWDG->KR = 0xAAAA ; // reload
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if ( TIM2->SR & TIM_SR_UIF )
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{
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TIM2->SR &= ~TIM_SR_UIF ;
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GPIOA->ODR ^= 0x0002 ;
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}
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}
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/* get character from UART */
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ch = getch() ;
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if(ch == STK_GET_PARAMETER)
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{
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GPIOR0 = getch() ;
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verifySpace() ;
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if (GPIOR0 == 0x82)
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{
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putch(OPTIBOOT_MINVER) ;
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}
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else if (GPIOR0 == 0x81)
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{
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putch(OPTIBOOT_MAJVER) ;
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}
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else
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{
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/*
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* GET PARAMETER returns a generic 0x03 reply for
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* other parameters - enough to keep Avrdude happy
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*/
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putch(0x03) ;
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}
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}
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else if(ch == STK_SET_DEVICE)
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{
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// SET DEVICE is ignored
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bgetNch(20) ;
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}
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else if(ch == STK_SET_DEVICE_EXT)
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{
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// SET DEVICE EXT is ignored
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bgetNch(5);
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}
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else if(ch == STK_LOAD_ADDRESS)
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{
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// LOAD ADDRESS
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uint16_t newAddress ;
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newAddress = getch() ;
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newAddress = (newAddress & 0xff) | (getch() << 8);
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address = newAddress ; // Convert from word address to byte address
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address <<= 1 ;
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verifySpace() ;
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}
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else if(ch == STK_UNIVERSAL)
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{
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// UNIVERSAL command is ignored
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bgetNch(4) ;
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putch(0x00) ;
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}
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else if(ch == STK_PROG_PAGE)
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{
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// PROGRAM PAGE - we support flash programming only, not EEPROM
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uint8_t *bufPtr;
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uint16_t addrPtr;
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uint16_t length ;
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uint16_t count ;
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uint16_t data ;
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uint8_t *memAddress ;
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length = getch() << 8 ; /* getlen() */
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length |= getch() ;
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getch() ; // discard flash/eeprom byte
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// While that is going on, read in page contents
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count = length ;
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bufPtr = Buff;
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do
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{
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*bufPtr++ = getch() ;
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}
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while (--count) ;
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if ( length & 1 )
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{
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*bufPtr = 0xFF ;
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}
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count = length ;
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count += 1 ;
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count /= 2 ;
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memAddress = (uint8_t *)(address + 0x08000000) ;
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if ( (uint32_t)memAddress < 0x08020000 )
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{
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// Read command terminator, start reply
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verifySpace();
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if ( (uint32_t)memAddress >= 0x08002000 )
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{
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if ( ((uint32_t)memAddress & 0x000003FF) == 0 )
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{
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// At page start so erase it
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FLASH_ClearFlag(FLASH_FLAG_EOP|FLASH_FLAG_PGERR|FLASH_FLAG_WRPRTERR);
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FLASH_ErasePage( (uint32_t)memAddress ) ;
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}
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bufPtr = Buff;
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while ( count )
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{
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data = *bufPtr++ ;
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data |= *bufPtr++ << 8 ;
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FLASH_ProgramHalfWord( (uint32_t)memAddress, data ) ;
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memAddress += 2 ;
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count -= 1 ;
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}
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}
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}
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else
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{
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verifySpace();
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}
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}
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else if(ch == STK_READ_PAGE)
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{
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uint16_t length ;
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uint8_t xlen ;
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uint8_t *memAddress ;
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memAddress = (uint8_t *)(address + 0x08000000) ;
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// READ PAGE - we only read flash
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xlen = getch() ; /* getlen() */
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length = getch() | (xlen << 8 ) ;
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getch() ;
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verifySpace() ;
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do
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{
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putch( *memAddress++) ;
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}
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while (--length) ;
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}
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else if(ch == STK_READ_SIGN)
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{
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// READ SIGN - return what Avrdude wants to hear
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verifySpace() ;
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putch(SIGNATURE_0) ;
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if ( Port )
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{
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putch(SIGNATURE_3) ;
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putch(SIGNATURE_4) ;
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}
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else
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{
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putch(SIGNATURE_1) ;
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putch(SIGNATURE_2) ;
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}
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}
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else if (ch == STK_LEAVE_PROGMODE)
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{ /* 'Q' */
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// Adaboot no-wait mod
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// watchdogConfig(WATCHDOG_16MS);
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verifySpace() ;
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}
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else
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{
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// This covers the response to commands like STK_ENTER_PROGMODE
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verifySpace() ;
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}
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||||
if ( NotSynced )
|
||||
{
|
||||
continue ;
|
||||
}
|
||||
putch(STK_OK);
|
||||
}
|
||||
}
|
||||
|
||||
void loop()
|
||||
{
|
||||
loader(1) ;
|
||||
|
||||
// Execute loaded application
|
||||
executeApp() ;
|
||||
|
||||
loader(0) ;
|
||||
|
||||
// The next bit not really needed as loader(0) doesn't return
|
||||
for(;;)
|
||||
{
|
||||
if ( TIM2->SR & TIM_SR_UIF )
|
||||
{
|
||||
TIM2->SR &= ~TIM_SR_UIF ;
|
||||
if ( ++LongCount > 4 )
|
||||
{
|
||||
GPIOA->ODR ^= 0x0002 ;
|
||||
LongCount = 0 ;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user