mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-02-04 16:48:10 +00:00
New protocol Traxxas
Protocol number: 43 Compatible with receivers 6519 Extended limits supported CH1=AUX3 CH2=AUX4 CH3=THROTTLE CH4=STEERING
This commit is contained in:
Pascal Langer
parent
2c9693389e
commit
6f33abb25e
@ -19,7 +19,7 @@
|
||||
#define VERSION_MAJOR 1
|
||||
#define VERSION_MINOR 2
|
||||
#define VERSION_REVISION 1
|
||||
#define VERSION_PATCH_LEVEL 68
|
||||
#define VERSION_PATCH_LEVEL 69
|
||||
|
||||
//******************
|
||||
// Protocols
|
||||
@ -277,6 +277,11 @@ enum REDPINE
|
||||
RED_FAST= 0,
|
||||
RED_SLOW= 1,
|
||||
};
|
||||
enum TRAXXAS
|
||||
{
|
||||
RX6519 = 0,
|
||||
};
|
||||
|
||||
#define NONE 0
|
||||
#define P_HIGH 1
|
||||
#define P_LOW 0
|
||||
@ -762,6 +767,8 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
|
||||
sub_protocol==REDPINE
|
||||
RED_FAST 0
|
||||
RED_SLOW 1
|
||||
sub_protocol==TRAXXAS
|
||||
RX6519 0
|
||||
|
||||
Power value => 0x80 0=High/1=Low
|
||||
Stream[3] = option_protocol;
|
||||
|
||||
@ -1058,6 +1058,13 @@ static void protocol_init()
|
||||
remote_callback = ReadJ6Pro;
|
||||
break;
|
||||
#endif
|
||||
#if defined(TRAXXAS_CYRF6936_INO)
|
||||
case PROTO_TRAXXAS:
|
||||
PE2_on; //antenna RF4
|
||||
next_callback = initTRAXXAS();
|
||||
remote_callback = ReadTRAXXAS;
|
||||
break;
|
||||
#endif
|
||||
#endif
|
||||
#ifdef NRF24L01_INSTALLED
|
||||
#if defined(HISKY_NRF24L01_INO)
|
||||
|
||||
235
Multiprotocol/TRAXXAS_cyrf6936.ino
Normal file
235
Multiprotocol/TRAXXAS_cyrf6936.ino
Normal file
@ -0,0 +1,235 @@
|
||||
/*
|
||||
This project is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
Multiprotocol is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
|
||||
|
||||
Works with Traxxas 6519 receivers https://traxxas.com/sites/default/files/24CompGuide-2016.jpg .
|
||||
*/
|
||||
|
||||
#if defined(TRAXXAS_CYRF6936_INO)
|
||||
|
||||
#include "iface_cyrf6936.h"
|
||||
|
||||
//#define TRAXXAS_FORCE_ID
|
||||
|
||||
#define TRAXXAS_CHANNEL 0x05
|
||||
#define TRAXXAS_BIND_CHANNEL 0x2B
|
||||
#define TRAXXAS_PACKET_SIZE 16
|
||||
|
||||
enum {
|
||||
TRAXXAS_BIND_PREP_RX=0,
|
||||
TRAXXAS_BIND_RX,
|
||||
TRAXXAS_BIND_TX1,
|
||||
TRAXXAS_PREP_DATA,
|
||||
TRAXXAS_DATA,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM TRAXXAS_sop_bind[] ={ 0x3C, 0x37, 0xCC, 0x91, 0xE2, 0xF8, 0xCC, 0x91 };
|
||||
const uint8_t PROGMEM TRAXXAS_sop_data[] ={ 0xA1, 0x78, 0xDC, 0x3C, 0x9E, 0x82, 0xDC, 0x3C };
|
||||
//const uint8_t PROGMEM TRAXXAS_sop_check[]={ 0x97, 0xE5, 0x14, 0x72, 0x7F, 0x1A, 0x14, 0x72 };
|
||||
|
||||
const uint8_t PROGMEM TRAXXAS_init_vals[][2] = {
|
||||
//Init from dump
|
||||
{CYRF_0B_PWR_CTRL, 0x00}, // PMU
|
||||
{CYRF_32_AUTO_CAL_TIME, 0x3C}, // Default init value
|
||||
{CYRF_35_AUTOCAL_OFFSET, 0x14}, // Default init value
|
||||
{CYRF_1B_TX_OFFSET_LSB, 0x55}, // Default init value
|
||||
{CYRF_1C_TX_OFFSET_MSB, 0x05}, // Default init value
|
||||
{CYRF_28_CLK_EN, 0x02}, // Force Receive Clock Enable
|
||||
{CYRF_06_RX_CFG, 0x88 | 0x02}, // AGC enabled, Fast Turn Mode enabled, adding overwrite enable to not lockup RX
|
||||
{CYRF_1E_RX_OVERRIDE, 0x08}, // Reject packets with 0 seed
|
||||
{CYRF_03_TX_CFG, 0x08 | CYRF_BIND_POWER}, // 8DR Mode, 32 chip codes
|
||||
};
|
||||
|
||||
static void __attribute__((unused)) TRAXXAS_cyrf_bind_config()
|
||||
{
|
||||
CYRF_PROGMEM_ConfigSOPCode(TRAXXAS_sop_bind);
|
||||
CYRF_WriteRegister(CYRF_15_CRC_SEED_LSB, 0x5A);
|
||||
CYRF_WriteRegister(CYRF_16_CRC_SEED_MSB, 0x5A);
|
||||
CYRF_ConfigRFChannel(TRAXXAS_BIND_CHANNEL);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) TRAXXAS_cyrf_data_config()
|
||||
{
|
||||
CYRF_PROGMEM_ConfigSOPCode(TRAXXAS_sop_data);
|
||||
#ifdef TRAXXAS_FORCE_ID // data taken from TX dump
|
||||
CYRF_WriteRegister(CYRF_15_CRC_SEED_LSB, 0x1B);
|
||||
CYRF_WriteRegister(CYRF_16_CRC_SEED_MSB, 0x3F);
|
||||
#else
|
||||
CYRF_WriteRegister(CYRF_15_CRC_SEED_LSB, cyrfmfg_id[0]+0xB6);
|
||||
CYRF_WriteRegister(CYRF_16_CRC_SEED_MSB, cyrfmfg_id[1]+0x5D);
|
||||
#endif
|
||||
CYRF_ConfigRFChannel(TRAXXAS_CHANNEL);
|
||||
CYRF_SetTxRxMode(TX_EN);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) TRAXXAS_send_data_packet()
|
||||
{
|
||||
packet[0] = 0x01;
|
||||
memset(&packet[1],0x00,TRAXXAS_PACKET_SIZE-1);
|
||||
//Steering
|
||||
uint16_t ch = convert_channel_16b_nolimit(RUDDER,500,1000);
|
||||
packet[2]=ch>>8;
|
||||
packet[3]=ch;
|
||||
//Throttle
|
||||
ch = convert_channel_16b_nolimit(THROTTLE,500,1000);
|
||||
packet[4]=ch>>8;
|
||||
packet[5]=ch;
|
||||
//AUX3
|
||||
ch = convert_channel_16b_nolimit(AILERON,500,1000);
|
||||
packet[6]=ch>>8;
|
||||
packet[7]=ch;
|
||||
//AUX4???
|
||||
ch = convert_channel_16b_nolimit(ELEVATOR,500,1000);
|
||||
packet[12]=ch>>8;
|
||||
packet[13]=ch;
|
||||
|
||||
CYRF_SetPower(0x08);
|
||||
CYRF_WriteDataPacketLen(packet, TRAXXAS_PACKET_SIZE);
|
||||
}
|
||||
|
||||
uint16_t ReadTRAXXAS()
|
||||
{
|
||||
uint8_t status;
|
||||
|
||||
switch(phase)
|
||||
{
|
||||
case TRAXXAS_BIND_PREP_RX:
|
||||
TRAXXAS_cyrf_bind_config();
|
||||
CYRF_SetTxRxMode(RX_EN); //Receive mode
|
||||
CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x83); //Prepare to receive
|
||||
packet_count=100; //Timeout for RX
|
||||
phase=TRAXXAS_BIND_RX;
|
||||
return 700;
|
||||
case TRAXXAS_BIND_RX:
|
||||
//Read data from RX
|
||||
status = CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
|
||||
if((status & 0x03) == 0x02) // RXC=1, RXE=0 then 2nd check is required (debouncing)
|
||||
status |= CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
|
||||
debugln("s=%02X",status);
|
||||
CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80); // need to set RXOW before data read
|
||||
if((status & 0x07) == 0x02)
|
||||
{ // Data received with no errors
|
||||
len=CYRF_ReadRegister(CYRF_09_RX_COUNT);
|
||||
debugln("L=%02X",len)
|
||||
if(len==TRAXXAS_PACKET_SIZE)
|
||||
{
|
||||
CYRF_ReadDataPacketLen(packet, TRAXXAS_PACKET_SIZE);
|
||||
debug("RX=");
|
||||
for(uint8_t i=0;i<TRAXXAS_PACKET_SIZE;i++)
|
||||
debug(" %02X",packet[i]);
|
||||
debugln("");
|
||||
for(uint8_t i=0;i<6;i++)
|
||||
packet[i+1]=cyrfmfg_id[i];
|
||||
packet[10]=0x01;
|
||||
packet_count=12;
|
||||
CYRF_SetTxRxMode(TX_EN);
|
||||
phase=TRAXXAS_BIND_TX1;
|
||||
return 200;
|
||||
}
|
||||
}
|
||||
if( --packet_count == 0 )
|
||||
{ // Retry RX
|
||||
CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20); // Enable RX abort
|
||||
CYRF_WriteRegister(CYRF_0F_XACT_CFG, 0x24); // Force end state
|
||||
CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Disable RX abort
|
||||
if(--bind_counter != 0)
|
||||
phase=TRAXXAS_BIND_PREP_RX; // Retry receiving bind packet
|
||||
else
|
||||
phase=TRAXXAS_PREP_DATA; // Abort binding
|
||||
}
|
||||
return 700;
|
||||
case TRAXXAS_BIND_TX1:
|
||||
CYRF_WriteDataPacketLen(packet, TRAXXAS_PACKET_SIZE);
|
||||
debug("P=");
|
||||
for(uint8_t i=0;i<TRAXXAS_PACKET_SIZE;i++)
|
||||
debug(" %02X",packet[i]);
|
||||
debugln("");
|
||||
if(--packet_count==0) // Switch to normal mode
|
||||
phase=TRAXXAS_PREP_DATA;
|
||||
break;
|
||||
case TRAXXAS_PREP_DATA:
|
||||
BIND_DONE;
|
||||
TRAXXAS_cyrf_data_config();
|
||||
phase++;
|
||||
case TRAXXAS_DATA:
|
||||
TRAXXAS_send_data_packet();
|
||||
break;
|
||||
}
|
||||
return 13940;
|
||||
}
|
||||
|
||||
uint16_t initTRAXXAS()
|
||||
{
|
||||
CYRF_Reset();
|
||||
|
||||
//Config CYRF registers
|
||||
for(uint8_t i = 0; i < sizeof(TRAXXAS_init_vals) / 2; i++)
|
||||
CYRF_WriteRegister(pgm_read_byte_near(&TRAXXAS_init_vals[i][0]), pgm_read_byte_near(&TRAXXAS_init_vals[i][1]));
|
||||
|
||||
//Read CYRF ID
|
||||
CYRF_GetMfgData(cyrfmfg_id);
|
||||
cyrfmfg_id[0]+=RX_num;
|
||||
|
||||
#ifdef TRAXXAS_FORCE_ID // data taken from TX dump
|
||||
cyrfmfg_id[0]=0x65; // CYRF MFG ID
|
||||
cyrfmfg_id[1]=0xE2;
|
||||
cyrfmfg_id[2]=0x5E;
|
||||
cyrfmfg_id[3]=0x55;
|
||||
cyrfmfg_id[4]=0x4D;
|
||||
cyrfmfg_id[5]=0xFE;
|
||||
#endif
|
||||
|
||||
if(IS_BIND_IN_PROGRESS)
|
||||
{
|
||||
bind_counter=100;
|
||||
phase = TRAXXAS_BIND_PREP_RX;
|
||||
}
|
||||
else
|
||||
phase = TRAXXAS_PREP_DATA;
|
||||
return 1000;
|
||||
}
|
||||
|
||||
/*
|
||||
Bind phase 1
|
||||
CHANNEL: 0x2B
|
||||
SOP_CODE: 0x3C 0x37 0xCC 0x91 0xE2 0xF8 0xCC 0x91
|
||||
CRC_SEED_LSB: 0x5A
|
||||
CRC_SEED_MSB: 0x5A
|
||||
RX1: 0x02 0x4A 0xA3 0x2D 0x1A 0x49 0xFE 0x06 0x00 0x00 0x02 0x01 0x06 0x06 0x00 0x00
|
||||
TX1: 0x02 0x65 0xE2 0x5E 0x55 0x4D 0xFE 0xEE 0x00 0x00 0x01 0x01 0x06 0x05 0x00 0x00
|
||||
Note: RX cyrfmfg_id is 0x4A,0xA3,0x2D,0x1A,0x49,0xFE and TX cyrfmfg_id is 0x65,0xE2,0x5E,0x55,0x4D,0xFE
|
||||
|
||||
Bind phase 2 (looks like normal mode?)
|
||||
CHANNEL: 0x05
|
||||
SOP_CODE: 0xA1 0x78 0xDC 0x3C 0x9E 0x82 0xDC 0x3C
|
||||
CRC_SEED_LSB: 0x1B
|
||||
CRC_SEED_MSB: 0x3F
|
||||
RX2: 0x03 0x4A 0xA3 0x2D 0x1A 0x49 0xFE 0x06 0x00 0x00 0x02 0x01 0x06 0x06 0x00 0x00
|
||||
TX2: 0x01 0x65 0x01 0xF4 0x03 0xE7 0x02 0x08 0x00 0x00 0x01 0x01 0x02 0xEE 0x00 0x00
|
||||
Note: TX2 is nearly a normal packet at the exception of the 2nd byte equal to cyrfmfg_id[0]
|
||||
|
||||
Bind phase 3 (check?)
|
||||
CHANNEL: 0x22
|
||||
SOP_CODE: 0x97 0xE5 0x14 0x72 0x7F 0x1A 0x14 0x72
|
||||
CRC_SEED_LSB: 0xA5
|
||||
CRC_SEED_MSB: 0xA5
|
||||
RX3: 0x04 0x4A 0xA3 0x2D 0x1A 0x49 0xFE 0x06 0x00 0x00 0x02 0x01 0x06 0x06 0x00 0x00
|
||||
|
||||
Switch to normal mode
|
||||
CHANNEL: 0x05
|
||||
SOP_CODE: 0xA1 0x78 0xDC 0x3C 0x9E 0x82 0xDC 0x3C
|
||||
CRC_SEED_LSB: 0x1B
|
||||
CRC_SEED_MSB: 0x3F
|
||||
TX3: 0x01 0x00 0x02 0xA8 0x03 0xE7 0x02 0x08 0x00 0x00 0x01 0x01 0x02 0xEE 0x00 0x00
|
||||
*/
|
||||
#endif
|
||||
@ -155,7 +155,7 @@
|
||||
#undef J6PRO_CYRF6936_INO
|
||||
#undef WFLY_CYRF6936_INO
|
||||
#undef WK2x01_CYRF6936_INO
|
||||
#undef TRAXXAS_CYRF6936_INO
|
||||
#undef TRAXXAS_CYRF6936_INO
|
||||
#endif
|
||||
#ifndef CC2500_INSTALLED
|
||||
#undef FRSKYD_CC2500_INO
|
||||
|
||||
@ -165,8 +165,7 @@
|
||||
#define J6PRO_CYRF6936_INO
|
||||
#define WFLY_CYRF6936_INO
|
||||
#define WK2x01_CYRF6936_INO
|
||||
|
||||
//#define TRAXXAS_CYRF6936_INO
|
||||
#define TRAXXAS_CYRF6936_INO
|
||||
|
||||
//The protocols below need a CC2500 to be installed
|
||||
#define CORONA_CC2500_INO
|
||||
@ -621,7 +620,7 @@ const PPM_Parameters PPM_prot[14*NBR_BANKS]= {
|
||||
SYMAX
|
||||
SYMAX5C
|
||||
PROTO_TRAXXAS
|
||||
NONE
|
||||
RX6519
|
||||
PROTO_V2X2
|
||||
V2X2
|
||||
JXD506
|
||||
|
||||
@ -111,7 +111,7 @@ CFlie|38|CFlie||||||||NRF24L01
|
||||
[Shenqi](Protocols_Details.md#Shenqi---19)|19|Shenqi||||||||NRF24L01
|
||||
[SLT](Protocols_Details.md#SLT---11)|11|SLT_V1|SLT_V2|Q100|Q200|MR100||||NRF24L01
|
||||
[SymaX](Protocols_Details.md#Symax---10)|10|SYMAX|SYMAX5C|||||||NRF24L01
|
||||
Traxxas|43|Traxxas||||||||NRF24L01
|
||||
[Traxxas](Protocols_Details.md#Traxxas---43)|43|Traxxas|RX6519|||||||CYRF6936
|
||||
[V2x2](Protocols_Details.md#V2X2---5)|5|V2x2|JXD506|||||||NRF24L01
|
||||
[V761](Protocols_Details.md#V761---48)|48|V761||||||||NRF24L01
|
||||
[V911S](Protocols_Details.md#V911S---46)|46|V911S*||||||||NRF24L01
|
||||
@ -519,6 +519,15 @@ CH1|CH2|CH3|CH4|CH5|CH6|CH7|CH8|CH9|CH10|CH11|CH12
|
||||
---|---|---|---|---|---|---|---|---|----|----|----
|
||||
A|E|T|R|CH5|CH6|CH7|CH8|CH9|CH10|CH11|CH12
|
||||
|
||||
## Traxxas - *43*
|
||||
Receiver 6519
|
||||
|
||||
Extended limits supported
|
||||
|
||||
CH1|CH2|CH3|CH4
|
||||
---|---|---|---
|
||||
AUX3|AUX4|THROTTLE|STEERING
|
||||
|
||||
## WFLY - *40*
|
||||
Receivers: WFR04S, WFR07S, WFR09S
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user