mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-11-30 17:09:40 +00:00
New protocols and optimizations
New protocols: - FQ777 for FQ777-124 - MT99xx -> "LS" for 114/124
This commit is contained in:
@@ -14,63 +14,12 @@
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*/
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#include "iface_cyrf6936.h"
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#ifdef XMEGA
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#define XNOP() NOP()
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#else
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#define XNOP()
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#endif
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static void cyrf_spi_write(uint8_t command)
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{
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uint8_t n=8;
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SCK_off;//SCK start low
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XNOP() ;
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SDI_off;
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XNOP() ;
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while(n--) {
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if(command&0x80)
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SDI_on;
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else
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SDI_off;
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XNOP() ;
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SCK_on;
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NOP();
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XNOP() ;
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XNOP() ;
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SCK_off;
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command = command << 1;
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XNOP() ;
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}
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SDI_on;
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}
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static uint8_t cyrf_spi_read()
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{
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uint8_t result;
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uint8_t i;
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result=0;
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for(i=0;i<8;i++)
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{
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result<<=1;
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if(SDO_1) ///
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result|=0x01;
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SCK_on;
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XNOP() ;
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XNOP() ;
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NOP();
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SCK_off;
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XNOP() ;
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XNOP() ;
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NOP();
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}
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return result;
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}
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void CYRF_WriteRegister(uint8_t address, uint8_t data)
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{
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CYRF_CSN_off;
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cyrf_spi_write(0x80 | address);
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cyrf_spi_write(data);
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SPI_Write(0x80 | address);
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SPI_Write(data);
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CYRF_CSN_on;
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}
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@@ -79,9 +28,9 @@ static void CYRF_WriteRegisterMulti(uint8_t address, const uint8_t data[], uint8
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uint8_t i;
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CYRF_CSN_off;
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cyrf_spi_write(0x80 | address);
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SPI_Write(0x80 | address);
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for(i = 0; i < length; i++)
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cyrf_spi_write(data[i]);
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SPI_Write(data[i]);
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CYRF_CSN_on;
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}
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@@ -90,9 +39,9 @@ static void CYRF_ReadRegisterMulti(uint8_t address, uint8_t data[], uint8_t leng
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uint8_t i;
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CYRF_CSN_off;
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cyrf_spi_write(address);
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SPI_Write(address);
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for(i = 0; i < length; i++)
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data[i] = cyrf_spi_read();
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data[i] = SPI_Read();
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CYRF_CSN_on;
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}
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@@ -100,8 +49,8 @@ uint8_t CYRF_ReadRegister(uint8_t address)
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{
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uint8_t data;
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CYRF_CSN_off;
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cyrf_spi_write(address);
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data = cyrf_spi_read();
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SPI_Write(address);
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data = SPI_Read();
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CYRF_CSN_on;
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return data;
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}
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@@ -110,11 +59,11 @@ uint8_t CYRF_ReadRegister(uint8_t address)
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uint8_t CYRF_Reset()
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{
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CYRF_WriteRegister(CYRF_1D_MODE_OVERRIDE, 0x01);//software reset
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_delay_us(200);//
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delayMicroseconds(200);//
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// RS_HI;
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// _delay_us(100);
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// delayMicroseconds(100);
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// RS_LO;
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// _delay_us(100);
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// delayMicroseconds(100);
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CYRF_WriteRegister(CYRF_0C_XTAL_CTRL, 0xC0); //Enable XOUT as GPIO
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CYRF_WriteRegister(CYRF_0D_IO_CFG, 0x04); //Enable PACTL as GPIO
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CYRF_SetTxRxMode(TXRX_OFF);
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@@ -211,10 +160,10 @@ void CYRF_ConfigDataCode(const uint8_t *datacodes, uint8_t len)
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void CYRF_WritePreamble(uint32_t preamble)
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{
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CYRF_CSN_off;
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cyrf_spi_write(0x80 | 0x24);
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cyrf_spi_write(preamble & 0xff);
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cyrf_spi_write((preamble >> 8) & 0xff);
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cyrf_spi_write((preamble >> 16) & 0xff);
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SPI_Write(0x80 | 0x24);
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SPI_Write(preamble & 0xff);
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SPI_Write((preamble >> 8) & 0xff);
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SPI_Write((preamble >> 16) & 0xff);
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CYRF_CSN_on;
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}
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/*
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@@ -277,13 +226,13 @@ void CYRF_FindBestChannels(uint8_t *channels, uint8_t len, uint8_t minspace, uin
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CYRF_ConfigCRCSeed(0x0000);
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CYRF_SetTxRxMode(RX_EN);
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//Wait for pre-amp to switch from send to receive
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_delay_us(1000);
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delayMicroseconds(1000);
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for(i = 0; i < NUM_FREQ; i++)
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{
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CYRF_ConfigRFChannel(i);
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CYRF_ReadRegister(CYRF_13_RSSI);
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CYRF_StartReceive();
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_delay_us(10);
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delayMicroseconds(10);
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rssi[i] = CYRF_ReadRegister(CYRF_13_RSSI);
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}
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