mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-12-15 20:33:16 +00:00
XN297EMU: option=0->nrf24L01, option!=0 -> CC2500
XN297L@250kbps is emulated by default with the NRF24L01. If option (freq tune) is diffrent from 0, the CC2500 module (if installed) will be used instead with option being the freq usual tuning.
This commit is contained in:
pascallanger
@@ -12,212 +12,344 @@
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifdef NRF24L01_INSTALLED
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#include "iface_xn297l.h"
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#if defined (XN297L_CC2500_EMU)
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static void __attribute__((unused)) XN297L_Init()
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{
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PE1_off; // antenna RF2
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PE2_on;
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CC2500_Reset();
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CC2500_Strobe(CC2500_SIDLE);
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#ifdef CC2500_INSTALLED
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if(option==0)
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#endif
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{//NRF
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debugln("Using NRF");
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PE1_on; //NRF24L01 antenna RF3 by default
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PE2_off; //NRF24L01 antenna RF3 by default
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NRF24L01_Initialize();
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NRF24L01_SetTxRxMode(TX_EN);
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NRF24L01_FlushTx();
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NRF24L01_FlushRx();
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
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NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
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NRF24L01_SetBitrate(NRF24L01_BR_250K); // 250Kbps
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NRF24L01_SetPower();
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return;
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}
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//CC2500
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#ifdef CC2500_INSTALLED
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debugln("Using CC2500");
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PE1_off; // antenna RF2
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PE2_on;
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CC2500_Reset();
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CC2500_Strobe(CC2500_SIDLE);
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// Address Config = No address check
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// Base Frequency = 2400
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// CRC Autoflush = false
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// CRC Enable = false
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// Channel Spacing = 333.251953
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// Data Format = Normal mode
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// Data Rate = 249.939
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// Deviation = 126.953125
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// Device Address = 0
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// Manchester Enable = false
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// Modulated = true
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// Modulation Format = GFSK
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// Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word
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// RX Filter BW = 203.125000
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// Sync Word Qualifier Mode = No preamble/sync
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// TX Power = 0
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// Whitening = false
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// Fast Frequency Hopping - no PLL auto calibration
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// Address Config = No address check
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// Base Frequency = 2400
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// CRC Autoflush = false
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// CRC Enable = false
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// Channel Spacing = 333.251953
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// Data Format = Normal mode
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// Data Rate = 249.939
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// Deviation = 126.953125
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// Device Address = 0
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// Manchester Enable = false
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// Modulated = true
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// Modulation Format = GFSK
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// Packet Length Mode = Variable packet length mode. Packet length configured by the first byte after sync word
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// RX Filter BW = 203.125000
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// Sync Word Qualifier Mode = No preamble/sync
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// TX Power = 0
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// Whitening = false
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// Fast Frequency Hopping - no PLL auto calibration
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01); // Packet Automation Control
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // Frequency Control Word, High Byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // Frequency Control Word, Middle Byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xC3); // Frequency Control Word, Low Byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x8D); // Modem Configuration
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x3B); // Modem Configuration
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // Modem Configuration
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // Modem Configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x62); // Modem Deviation Setting
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x1C); // Bit Synchronization Configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0xC7); // AGC Control
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x00); // AGC Control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0xB0); // AGC Control
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CC2500_WriteReg(CC2500_21_FREND1, 0xB6); // Front End RX Configuration
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01); // Packet Automation Control
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // Frequency Control Word, High Byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // Frequency Control Word, Middle Byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xC3); // Frequency Control Word, Low Byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x8D); // Modem Configuration
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x3B); // Modem Configuration
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // Modem Configuration
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // Modem Configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x62); // Modem Deviation Setting
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x1C); // Bit Synchronization Configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0xC7); // AGC Control
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x00); // AGC Control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0xB0); // AGC Control
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CC2500_WriteReg(CC2500_21_FREND1, 0xB6); // Front End RX Configuration
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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CC2500_SetTxRxMode(TX_EN);
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CC2500_SetPower();
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xn297_scramble_enabled=XN297_SCRAMBLED; //enabled by default
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CC2500_SetTxRxMode(TX_EN);
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CC2500_SetPower();
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xn297_scramble_enabled=XN297_SCRAMBLED; //enabled by default
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#endif
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}
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static void __attribute__((unused)) XN297L_SetTXAddr(const uint8_t* addr, uint8_t len)
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{
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if (len > 5) len = 5;
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if (len < 3) len = 3;
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xn297_addr_len = len;
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memcpy(xn297_tx_addr, addr, len);
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#ifdef CC2500_INSTALLED
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if(option==0)
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#endif
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{//NRF
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XN297_SetTXAddr(addr,len);
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return;
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}
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//CC2500
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#ifdef CC2500_INSTALLED
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if (len > 5) len = 5;
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if (len < 3) len = 3;
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xn297_addr_len = len;
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memcpy(xn297_tx_addr, addr, len);
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#endif
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}
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static void __attribute__((unused)) XN297L_WritePayload(uint8_t* msg, uint8_t len)
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{
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uint8_t buf[32];
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uint8_t last = 0;
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uint8_t i;
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static const uint16_t initial = 0xb5d2;
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// address
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for (i = 0; i < xn297_addr_len; ++i)
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{
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buf[last] = xn297_tx_addr[xn297_addr_len - i - 1];
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[i];
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last++;
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#ifdef CC2500_INSTALLED
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if(option==0)
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#endif
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{//NRF
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XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP));
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
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NRF24L01_FlushTx();
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XN297_WritePayload(msg, len);
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return;
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}
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//CC2500
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#ifdef CC2500_INSTALLED
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uint8_t buf[32];
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uint8_t last = 0;
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uint8_t i;
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static const uint16_t initial = 0xb5d2;
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// payload
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for (i = 0; i < len; ++i) {
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// bit-reverse bytes in packet
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buf[last] = bit_reverse(msg[i]);
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// address
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for (i = 0; i < xn297_addr_len; ++i)
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{
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buf[last] = xn297_tx_addr[xn297_addr_len - i - 1];
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[i];
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last++;
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}
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// payload
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for (i = 0; i < len; ++i) {
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// bit-reverse bytes in packet
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buf[last] = bit_reverse(msg[i]);
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[xn297_addr_len+i];
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last++;
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}
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// crc
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uint16_t crc = initial;
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for (uint8_t i = 0; i < last; ++i)
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crc = crc16_update(crc, buf[i], 8);
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[xn297_addr_len+i];
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last++;
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crc ^= pgm_read_word(&xn297_crc_xorout_scrambled[xn297_addr_len - 3 + len]);
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else
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crc ^= pgm_read_word(&xn297_crc_xorout[xn297_addr_len - 3 + len]);
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buf[last++] = crc >> 8;
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buf[last++] = crc & 0xff;
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// stop TX/RX
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CC2500_Strobe(CC2500_SIDLE);
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// flush tx FIFO
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CC2500_Strobe(CC2500_SFTX);
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// packet length
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CC2500_WriteReg(CC2500_3F_TXFIFO, last + 3);
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// xn297L preamble
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, (uint8_t*)"\x71\x0f\x55", 3);
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// xn297 packet
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buf, last);
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// transmit
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CC2500_Strobe(CC2500_STX);
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#endif
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}
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static void __attribute__((unused)) XN297L_WriteEnhancedPayload(uint8_t* msg, uint8_t len, uint8_t noack)
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{
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#ifdef CC2500_INSTALLED
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if(option==0)
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#endif
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{//NRF
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XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP));
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
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NRF24L01_FlushTx();
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XN297_WriteEnhancedPayload(msg, len, noack);
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return;
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}
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//CC2500
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#ifdef CC2500_INSTALLED
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uint8_t buf[32];
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uint8_t scramble_index=0;
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uint8_t last = 0;
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static uint8_t pid=0;
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// crc
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uint16_t crc = initial;
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for (uint8_t i = 0; i < last; ++i)
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crc = crc16_update(crc, buf[i], 8);
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if(xn297_scramble_enabled)
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crc ^= pgm_read_word(&xn297_crc_xorout_scrambled[xn297_addr_len - 3 + len]);
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else
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crc ^= pgm_read_word(&xn297_crc_xorout[xn297_addr_len - 3 + len]);
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buf[last++] = crc >> 8;
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buf[last++] = crc & 0xff;
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// address
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if (xn297_addr_len < 4)
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{
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// If address length (which is defined by receive address length)
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// is less than 4 the TX address can't fit the preamble, so the last
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// byte goes here
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buf[last++] = 0x55;
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}
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for (uint8_t i = 0; i < xn297_addr_len; ++i)
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{
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buf[last] = xn297_tx_addr[xn297_addr_len-i-1];
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[scramble_index++];
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last++;
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}
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// stop TX/RX
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CC2500_Strobe(CC2500_SIDLE);
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// flush tx FIFO
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CC2500_Strobe(CC2500_SFTX);
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// packet length
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CC2500_WriteReg(CC2500_3F_TXFIFO, last + 3);
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// xn297L preamble
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, (uint8_t*)"\x71\x0f\x55", 3);
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// xn297 packet
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buf, last);
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// transmit
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CC2500_Strobe(CC2500_STX);
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// pcf
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buf[last] = (len << 1) | (pid>>1);
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[scramble_index++];
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last++;
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buf[last] = (pid << 7) | (noack << 6);
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// payload
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buf[last]|= bit_reverse(msg[0]) >> 2; // first 6 bit of payload
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[scramble_index++];
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for (uint8_t i = 0; i < len-1; ++i)
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{
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last++;
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buf[last] = (bit_reverse(msg[i]) << 6) | (bit_reverse(msg[i+1]) >> 2);
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[scramble_index++];
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}
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last++;
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buf[last] = bit_reverse(msg[len-1]) << 6; // last 2 bit of payload
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if(xn297_scramble_enabled)
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buf[last] ^= xn297_scramble[scramble_index++] & 0xc0;
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// crc
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if (xn297_crc)
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{
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uint8_t offset = xn297_addr_len < 4 ? 1 : 0;
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uint16_t crc = 0xb5d2;
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for (uint8_t i = offset; i < last; ++i)
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crc = crc16_update(crc, buf[i], 8);
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crc = crc16_update(crc, buf[last] & 0xc0, 2);
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if (xn297_scramble_enabled)
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crc ^= pgm_read_word(&xn297_crc_xorout_scrambled_enhanced[xn297_addr_len-3+len]);
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//else
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// crc ^= pgm_read_word(&xn297_crc_xorout_enhanced[xn297_addr_len - 3 + len]);
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buf[last++] |= (crc >> 8) >> 2;
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buf[last++] = ((crc >> 8) << 6) | ((crc & 0xff) >> 2);
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buf[last++] = (crc & 0xff) << 6;
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}
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NRF24L01_WritePayload(packet, last);
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pid++;
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if(pid>3)
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pid=0;
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// stop TX/RX
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CC2500_Strobe(CC2500_SIDLE);
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// flush tx FIFO
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CC2500_Strobe(CC2500_SFTX);
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// packet length
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CC2500_WriteReg(CC2500_3F_TXFIFO, last + 3);
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// xn297L preamble
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, (uint8_t*)"\x71\x0f\x55", 3);
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// xn297 packet
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buf, last);
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// transmit
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CC2500_Strobe(CC2500_STX);
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#endif
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}
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static void __attribute__((unused)) XN297L_HoppingCalib(uint8_t num_freq)
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{ //calibrate hopping frequencies
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for (uint8_t i = 0; i < num_freq; i++)
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{
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#ifdef CC2500_INSTALLED
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if(option==0)
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#endif
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return; //NRF
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#ifdef CC2500_INSTALLED
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for (uint8_t i = 0; i < num_freq; i++)
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{
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[i]*3);
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CC2500_Strobe(CC2500_SCAL);
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delayMicroseconds(900);
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calData[i]=CC2500_ReadReg(CC2500_25_FSCAL1);
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}
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#endif
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}
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static void __attribute__((unused)) XN297L_Hopping(uint8_t index)
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{
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#ifdef CC2500_INSTALLED
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if(option==0)
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#endif
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{//NRF
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NRF24L01_WriteReg(NRF24L01_05_RF_CH, hopping_frequency[index]);
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return;
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}
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#ifdef CC2500_INSTALLED
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// spacing is 333.25 kHz, must multiply xn297 channel by 3
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[index] * 3);
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// set PLL calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, calData[index]);
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#endif
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}
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|
||||
static void __attribute__((unused)) XN297L_RFChannel(uint8_t number)
|
||||
{ //change channel
|
||||
#ifdef CC2500_INSTALLED
|
||||
if(option==0)
|
||||
#endif
|
||||
{//NRF
|
||||
NRF24L01_WriteReg(NRF24L01_05_RF_CH, number);
|
||||
return;
|
||||
}
|
||||
#ifdef CC2500_INSTALLED
|
||||
CC2500_Strobe(CC2500_SIDLE);
|
||||
CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[i]*3);
|
||||
CC2500_WriteReg(CC2500_0A_CHANNR, number*3);
|
||||
CC2500_Strobe(CC2500_SCAL);
|
||||
delayMicroseconds(900);
|
||||
calData[i]=CC2500_ReadReg(CC2500_25_FSCAL1);
|
||||
}
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_Hopping(uint8_t index)
|
||||
{
|
||||
// spacing is 333.25 kHz, must multiply xn297 channel by 3
|
||||
CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[index] * 3);
|
||||
// set PLL calibration
|
||||
CC2500_WriteReg(CC2500_25_FSCAL1, calData[index]);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_RFChannel(uint8_t number)
|
||||
{ //change channel
|
||||
CC2500_Strobe(CC2500_SIDLE);
|
||||
CC2500_WriteReg(CC2500_0A_CHANNR, number*3);
|
||||
CC2500_Strobe(CC2500_SCAL);
|
||||
delayMicroseconds(900);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_SetPower()
|
||||
{
|
||||
CC2500_SetPower();
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_SetFreqOffset()
|
||||
{ // Frequency offset
|
||||
if (prev_option != option)
|
||||
{
|
||||
prev_option = option;
|
||||
CC2500_WriteReg(CC2500_0C_FSCTRL0, option);
|
||||
#ifdef CC2500_INSTALLED
|
||||
if(option==0)
|
||||
#endif
|
||||
{//NRF
|
||||
NRF24L01_SetPower();
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
#elif defined (NRF24L01_INSTALLED)
|
||||
|
||||
static void __attribute__((unused)) XN297L_Init()
|
||||
{
|
||||
NRF24L01_Initialize();
|
||||
NRF24L01_SetTxRxMode(TX_EN);
|
||||
NRF24L01_FlushTx();
|
||||
NRF24L01_FlushRx();
|
||||
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
|
||||
NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x00); // No Auto Acknowldgement on all data pipes
|
||||
NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0 only
|
||||
NRF24L01_SetBitrate(NRF24L01_BR_250K); // 250Kbps
|
||||
NRF24L01_SetPower();
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_SetTXAddr(const uint8_t* addr, uint8_t len)
|
||||
{
|
||||
XN297_SetTXAddr(addr,len);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_WritePayload(uint8_t* msg, uint8_t len)
|
||||
{
|
||||
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP));
|
||||
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
|
||||
NRF24L01_FlushTx();
|
||||
XN297_WritePayload(msg, len);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_HoppingCalib(__attribute__((unused)) uint8_t num_freq)
|
||||
{ //calibrate hopping frequencies
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_Hopping(uint8_t index)
|
||||
{
|
||||
NRF24L01_WriteReg(NRF24L01_05_RF_CH, hopping_frequency[index]);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_RFChannel(uint8_t number)
|
||||
{ //change channel
|
||||
NRF24L01_WriteReg(NRF24L01_05_RF_CH, number);
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_SetPower()
|
||||
{
|
||||
NRF24L01_SetPower();
|
||||
#ifdef CC2500_INSTALLED
|
||||
CC2500_SetPower();
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __attribute__((unused)) XN297L_SetFreqOffset()
|
||||
{ // Frequency offset
|
||||
#ifdef CC2500_INSTALLED
|
||||
if(option==0 && prev_option==0)
|
||||
#endif
|
||||
return; //NRF
|
||||
#ifdef CC2500_INSTALLED
|
||||
if (prev_option != option)
|
||||
{
|
||||
if(prev_option==0 || option==0)
|
||||
CHANGE_PROTOCOL_FLAG_on;
|
||||
prev_option = option;
|
||||
CC2500_WriteReg(CC2500_0C_FSCTRL0, option);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user