mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-12-14 19:53:14 +00:00
Roll back to older STM32 core files (#128)
This commit is contained in:
@@ -521,28 +521,6 @@ uint16 EEPROMClass::write(uint16 Address, uint16 Data)
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Writes/upadtes variable data in EEPROM.
|
||||
The value is written only if differs from the one already saved at the same address.
|
||||
* @param VirtAddress: Variable virtual address
|
||||
* @param Data: 16 bit data to be written
|
||||
* @retval Success or error status:
|
||||
* - EEPROM_SAME_VALUE: If new Data matches existing EEPROM Data
|
||||
* - FLASH_COMPLETE: on success
|
||||
* - EEPROM_BAD_ADDRESS: if address = 0xFFFF
|
||||
* - EEPROM_PAGE_FULL: if valid page is full
|
||||
* - EEPROM_NO_VALID_PAGE: if no valid page was found
|
||||
* - EEPROM_OUT_SIZE: if no empty EEPROM variables
|
||||
* - Flash error code: on write Flash error
|
||||
*/
|
||||
uint16 EEPROMClass::update(uint16 Address, uint16 Data)
|
||||
{
|
||||
if (read(Address) == Data)
|
||||
return EEPROM_SAME_VALUE;
|
||||
else
|
||||
return write(Address, Data);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Return number of variable
|
||||
* @retval Number of variables
|
||||
|
||||
@@ -47,7 +47,6 @@ enum : uint16
|
||||
EEPROM_BAD_ADDRESS = ((uint16)0x0082),
|
||||
EEPROM_BAD_FLASH = ((uint16)0x0083),
|
||||
EEPROM_NOT_INIT = ((uint16)0x0084),
|
||||
EEPROM_SAME_VALUE = ((uint16)0x0085),
|
||||
EEPROM_NO_VALID_PAGE = ((uint16)0x00AB)
|
||||
};
|
||||
|
||||
@@ -68,7 +67,6 @@ public:
|
||||
uint16 read (uint16 address);
|
||||
uint16 read (uint16 address, uint16 *data);
|
||||
uint16 write(uint16 address, uint16 data);
|
||||
uint16 update(uint16 address, uint16 data);
|
||||
uint16 count(uint16 *);
|
||||
uint16 maxcount(void);
|
||||
|
||||
|
||||
@@ -31,6 +31,7 @@
|
||||
|
||||
#include "SPI.h"
|
||||
|
||||
//#define SPI_DEBUG
|
||||
|
||||
#include <libmaple/timer.h>
|
||||
#include <libmaple/util.h>
|
||||
@@ -40,8 +41,6 @@
|
||||
#include "boards.h"
|
||||
|
||||
//#include "HardwareSerial.h"
|
||||
/** Time in ms for DMA receive timeout */
|
||||
#define DMA_TIMEOUT 100
|
||||
|
||||
#if CYCLES_PER_MICROSECOND != 72
|
||||
/* TODO [0.2.0?] something smarter than this */
|
||||
@@ -91,80 +90,79 @@ static const spi_pins board_spi_pins[] __FLASH__ = {
|
||||
* Constructor
|
||||
*/
|
||||
|
||||
SPIClass::SPIClass(uint32 spi_num)
|
||||
{
|
||||
_currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed
|
||||
SPIClass::SPIClass(uint32 spi_num) {
|
||||
|
||||
_currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed
|
||||
|
||||
|
||||
switch (spi_num) {
|
||||
#if BOARD_NR_SPI >= 1
|
||||
case 1:
|
||||
_currentSetting->spi_d = SPI1;
|
||||
_spi1_this = (void*) this;
|
||||
break;
|
||||
#endif
|
||||
#if BOARD_NR_SPI >= 2
|
||||
case 2:
|
||||
_currentSetting->spi_d = SPI2;
|
||||
_spi2_this = (void*) this;
|
||||
break;
|
||||
#endif
|
||||
#if BOARD_NR_SPI >= 3
|
||||
case 3:
|
||||
_currentSetting->spi_d = SPI3;
|
||||
_spi3_this = (void*) this;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
ASSERT(0);
|
||||
}
|
||||
|
||||
// Init things specific to each SPI device
|
||||
// clock divider setup is a bit of hack, and needs to be improved at a later date.
|
||||
_settings[0].spi_d = SPI1;
|
||||
_settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock);
|
||||
_settings[0].spiDmaDev = DMA1;
|
||||
_settings[0].spiTxDmaChannel = DMA_CH3;
|
||||
_settings[0].spiRxDmaChannel = DMA_CH2;
|
||||
_settings[1].spi_d = SPI2;
|
||||
_settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock);
|
||||
_settings[1].spiDmaDev = DMA1;
|
||||
_settings[1].spiTxDmaChannel = DMA_CH5;
|
||||
_settings[1].spiRxDmaChannel = DMA_CH4;
|
||||
|
||||
// Init things specific to each SPI device
|
||||
// clock divider setup is a bit of hack, and needs to be improved at a later date.
|
||||
_settings[0].spi_d = SPI1;
|
||||
_settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock);
|
||||
_settings[0].spiDmaDev = DMA1;
|
||||
_settings[0].spiTxDmaChannel = DMA_CH3;
|
||||
_settings[0].spiRxDmaChannel = DMA_CH2;
|
||||
_settings[1].spi_d = SPI2;
|
||||
_settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock);
|
||||
_settings[1].spiDmaDev = DMA1;
|
||||
_settings[1].spiTxDmaChannel = DMA_CH5;
|
||||
_settings[1].spiRxDmaChannel = DMA_CH4;
|
||||
#if BOARD_NR_SPI >= 3
|
||||
_settings[2].spi_d = SPI3;
|
||||
_settings[2].clockDivider = determine_baud_rate(_settings[2].spi_d, _settings[2].clock);
|
||||
_settings[2].spiDmaDev = DMA2;
|
||||
_settings[2].spiTxDmaChannel = DMA_CH2;
|
||||
_settings[2].spiRxDmaChannel = DMA_CH1;
|
||||
#endif
|
||||
|
||||
// added for DMA callbacks.
|
||||
_currentSetting->state = SPI_STATE_IDLE;
|
||||
_settings[2].spi_d = SPI3;
|
||||
_settings[2].clockDivider = determine_baud_rate(_settings[2].spi_d, _settings[2].clock);
|
||||
_settings[2].spiDmaDev = DMA2;
|
||||
_settings[2].spiTxDmaChannel = DMA_CH2;
|
||||
_settings[2].spiRxDmaChannel = DMA_CH1;
|
||||
#endif
|
||||
|
||||
//pinMode(BOARD_SPI_DEFAULT_SS,OUTPUT);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set up/tear down
|
||||
*/
|
||||
void SPIClass::updateSettings(void) {
|
||||
uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE | SPI_SOFT_SS);
|
||||
spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags);
|
||||
uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE | SPI_SOFT_SS);
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.print("spi_master_enable("); Serial.print(_currentSetting->clockDivider); Serial.print(","); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")");
|
||||
#endif
|
||||
spi_master_enable(_currentSetting->spi_d, (spi_baud_rate)_currentSetting->clockDivider, (spi_mode)_currentSetting->dataMode, flags);
|
||||
}
|
||||
|
||||
void SPIClass::begin(void) {
|
||||
spi_init(_currentSetting->spi_d);
|
||||
configure_gpios(_currentSetting->spi_d, 1);
|
||||
updateSettings();
|
||||
// added for DMA callbacks.
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
}
|
||||
|
||||
void SPIClass::beginSlave(void) {
|
||||
spi_init(_currentSetting->spi_d);
|
||||
configure_gpios(_currentSetting->spi_d, 0);
|
||||
uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_RX_ONLY);
|
||||
uint32 flags = ((_currentSetting->bitOrder == MSBFIRST ? SPI_FRAME_MSB : SPI_FRAME_LSB) | _currentSetting->dataSize | SPI_SW_SLAVE);
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.print("spi_slave_enable("); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")");
|
||||
#endif
|
||||
spi_slave_enable(_currentSetting->spi_d, (spi_mode)_currentSetting->dataMode, flags);
|
||||
// added for DMA callbacks.
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
}
|
||||
|
||||
void SPIClass::end(void) {
|
||||
@@ -183,25 +181,28 @@ void SPIClass::end(void) {
|
||||
while (spi_is_busy(_currentSetting->spi_d))
|
||||
;
|
||||
spi_peripheral_disable(_currentSetting->spi_d);
|
||||
// added for DMA callbacks.
|
||||
// Need to add unsetting the callbacks for the DMA channels.
|
||||
_currentSetting->state = SPI_STATE_IDLE;
|
||||
}
|
||||
|
||||
/* Roger Clark added 3 functions */
|
||||
void SPIClass::setClockDivider(uint32_t clockDivider)
|
||||
{
|
||||
_currentSetting->clockDivider = clockDivider;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_BR);
|
||||
_currentSetting->spi_d->regs->CR1 = cr1 | (clockDivider & SPI_CR1_BR);
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.print("Clock divider set to "); Serial.println(clockDivider);
|
||||
#endif
|
||||
_currentSetting->clockDivider = clockDivider;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_BR);
|
||||
_currentSetting->spi_d->regs->CR1 = cr1 | (clockDivider & SPI_CR1_BR);
|
||||
}
|
||||
|
||||
void SPIClass::setBitOrder(BitOrder bitOrder)
|
||||
{
|
||||
_currentSetting->bitOrder = bitOrder;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_LSBFIRST);
|
||||
if ( bitOrder==LSBFIRST ) cr1 |= SPI_CR1_LSBFIRST;
|
||||
_currentSetting->spi_d->regs->CR1 = cr1;
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.print("Bit order set to "); Serial.println(bitOrder);
|
||||
#endif
|
||||
_currentSetting->bitOrder = bitOrder;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_LSBFIRST);
|
||||
if ( bitOrder==LSBFIRST ) cr1 |= SPI_CR1_LSBFIRST;
|
||||
_currentSetting->spi_d->regs->CR1 = cr1;
|
||||
}
|
||||
|
||||
/* Victor Perez. Added to test changing datasize from 8 to 16 bit modes on the fly.
|
||||
@@ -210,11 +211,9 @@ void SPIClass::setBitOrder(BitOrder bitOrder)
|
||||
*/
|
||||
void SPIClass::setDataSize(uint32 datasize)
|
||||
{
|
||||
_currentSetting->dataSize = datasize;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF);
|
||||
uint8 en = spi_is_enabled(_currentSetting->spi_d);
|
||||
spi_peripheral_disable(_currentSetting->spi_d);
|
||||
_currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF) | en;
|
||||
_currentSetting->dataSize = datasize;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_DFF);
|
||||
_currentSetting->spi_d->regs->CR1 = cr1 | (datasize & SPI_CR1_DFF);
|
||||
}
|
||||
|
||||
void SPIClass::setDataMode(uint8_t dataMode)
|
||||
@@ -244,44 +243,59 @@ bit 0 - CPHA : Clock phase
|
||||
|
||||
If someone finds this is not the case or sees a logic error with this let me know ;-)
|
||||
*/
|
||||
_currentSetting->dataMode = dataMode;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA);
|
||||
_currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA));
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.print("Data mode set to "); Serial.println(dataMode);
|
||||
#endif
|
||||
_currentSetting->dataMode = dataMode;
|
||||
uint32 cr1 = _currentSetting->spi_d->regs->CR1 & ~(SPI_CR1_CPOL|SPI_CR1_CPHA);
|
||||
_currentSetting->spi_d->regs->CR1 = cr1 | (dataMode & (SPI_CR1_CPOL|SPI_CR1_CPHA));
|
||||
}
|
||||
|
||||
void SPIClass::beginTransaction(uint8_t pin, SPISettings settings)
|
||||
{
|
||||
setBitOrder(settings.bitOrder);
|
||||
setDataMode(settings.dataMode);
|
||||
setDataSize(settings.dataSize);
|
||||
setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock));
|
||||
begin();
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.println("SPIClass::beginTransaction");
|
||||
#endif
|
||||
//_SSPin=pin;
|
||||
//pinMode(_SSPin,OUTPUT);
|
||||
//digitalWrite(_SSPin,LOW);
|
||||
setBitOrder(settings.bitOrder);
|
||||
setDataMode(settings.dataMode);
|
||||
setDataSize(settings.dataSize);
|
||||
setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock));
|
||||
begin();
|
||||
}
|
||||
|
||||
void SPIClass::beginTransactionSlave(SPISettings settings)
|
||||
{
|
||||
setBitOrder(settings.bitOrder);
|
||||
setDataMode(settings.dataMode);
|
||||
setDataSize(settings.dataSize);
|
||||
beginSlave();
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.println(F("SPIClass::beginTransactionSlave"));
|
||||
#endif
|
||||
setBitOrder(settings.bitOrder);
|
||||
setDataMode(settings.dataMode);
|
||||
setDataSize(settings.dataSize);
|
||||
beginSlave();
|
||||
}
|
||||
|
||||
void SPIClass::endTransaction(void)
|
||||
{
|
||||
//digitalWrite(_SSPin,HIGH);
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.println("SPIClass::endTransaction");
|
||||
#endif
|
||||
//digitalWrite(_SSPin,HIGH);
|
||||
#if false
|
||||
// code from SAM core
|
||||
uint8_t mode = interruptMode;
|
||||
if (mode > 0) {
|
||||
if (mode < 16) {
|
||||
if (mode & 1) PIOA->PIO_IER = interruptMask[0];
|
||||
if (mode & 2) PIOB->PIO_IER = interruptMask[1];
|
||||
if (mode & 4) PIOC->PIO_IER = interruptMask[2];
|
||||
if (mode & 8) PIOD->PIO_IER = interruptMask[3];
|
||||
} else {
|
||||
if (interruptSave) interrupts();
|
||||
}
|
||||
}
|
||||
uint8_t mode = interruptMode;
|
||||
if (mode > 0) {
|
||||
if (mode < 16) {
|
||||
if (mode & 1) PIOA->PIO_IER = interruptMask[0];
|
||||
if (mode & 2) PIOB->PIO_IER = interruptMask[1];
|
||||
if (mode & 4) PIOC->PIO_IER = interruptMask[2];
|
||||
if (mode & 8) PIOD->PIO_IER = interruptMask[3];
|
||||
} else {
|
||||
if (interruptSave) interrupts();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -290,354 +304,211 @@ void SPIClass::endTransaction(void)
|
||||
* I/O
|
||||
*/
|
||||
|
||||
uint16 SPIClass::read(void)
|
||||
{
|
||||
while ( spi_is_rx_nonempty(_currentSetting->spi_d)==0 ) ;
|
||||
return (uint16)spi_rx_reg(_currentSetting->spi_d);
|
||||
uint8 SPIClass::read(void) {
|
||||
uint8 buf[1];
|
||||
this->read(buf, 1);
|
||||
return buf[0];
|
||||
}
|
||||
|
||||
void SPIClass::read(uint8 *buf, uint32 len)
|
||||
{
|
||||
if ( len == 0 ) return;
|
||||
spi_rx_reg(_currentSetting->spi_d); // clear the RX buffer in case a byte is waiting on it.
|
||||
spi_reg_map * regs = _currentSetting->spi_d->regs;
|
||||
// start sequence: write byte 0
|
||||
regs->DR = 0x00FF; // write the first byte
|
||||
// main loop
|
||||
while ( (--len) ) {
|
||||
while( !(regs->SR & SPI_SR_TXE) ); // wait for TXE flag
|
||||
noInterrupts(); // go atomic level - avoid interrupts to surely get the previously received data
|
||||
regs->DR = 0x00FF; // write the next data item to be transmitted into the SPI_DR register. This clears the TXE flag.
|
||||
while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the DR register
|
||||
*buf++ = (uint8)(regs->DR); // read and store the received byte. This clears the RXNE flag.
|
||||
interrupts(); // let systick do its job
|
||||
void SPIClass::read(uint8 *buf, uint32 len) {
|
||||
uint32 rxed = 0;
|
||||
while (rxed < len) {
|
||||
while (!spi_is_rx_nonempty(_currentSetting->spi_d))
|
||||
;
|
||||
buf[rxed++] = (uint8)spi_rx_reg(_currentSetting->spi_d);
|
||||
}
|
||||
// read remaining last byte
|
||||
while ( !(regs->SR & SPI_SR_RXNE) ); // wait till data is available in the Rx register
|
||||
*buf++ = (uint8)(regs->DR); // read and store the received byte
|
||||
}
|
||||
|
||||
void SPIClass::write(uint16 data)
|
||||
{
|
||||
/* Added for 16bit data Victor Perez. Roger Clark
|
||||
* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion,
|
||||
* by taking the Tx code from transfer(byte)
|
||||
* This almost doubles the speed of this function.
|
||||
*/
|
||||
spi_tx_reg(_currentSetting->spi_d, data); // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
void SPIClass::write(uint16 data) {
|
||||
// this->write(&data, 1);
|
||||
|
||||
/* Added for 16bit data Victor Perez. Roger Clark
|
||||
* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, * by taking the Tx code from transfer(byte)
|
||||
* The original method, of calling write(*data, length) .
|
||||
* This almost doubles the speed of this function.
|
||||
*/
|
||||
|
||||
spi_tx_reg(_currentSetting->spi_d, data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
}
|
||||
|
||||
void SPIClass::write16(uint16 data)
|
||||
{
|
||||
// Added by stevestrong: write two consecutive bytes in 8 bit mode (DFF=0)
|
||||
spi_tx_reg(_currentSetting->spi_d, data>>8); // write high byte
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // Wait until TXE=1
|
||||
spi_tx_reg(_currentSetting->spi_d, data); // write low byte
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // Wait until TXE=1
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // wait until BSY=0
|
||||
}
|
||||
//void SPIClass::write(uint8 byte) {
|
||||
// this->write(&byte, 1);
|
||||
|
||||
void SPIClass::write(uint16 data, uint32 n)
|
||||
{
|
||||
// Added by stevstrong: Repeatedly send same data by the specified number of times
|
||||
spi_reg_map * regs = _currentSetting->spi_d->regs;
|
||||
while ( (n--)>0 ) {
|
||||
regs->DR = data; // write the data to be transmitted into the SPI_DR register (this clears the TXE flag)
|
||||
while ( (regs->SR & SPI_SR_TXE)==0 ) ; // wait till Tx empty
|
||||
/* Roger Clark
|
||||
* Improved speed by just directly writing the single byte to the SPI data reg and wait for completion, * by taking the Tx code from transfer(byte)
|
||||
* The original method, of calling write(*data, length) .
|
||||
* This almost doubles the speed of this function.
|
||||
*/
|
||||
|
||||
// spi_tx_reg(_currentSetting->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
|
||||
// while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
// while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
//}
|
||||
|
||||
void SPIClass::write(const uint8 *data, uint32 length) {
|
||||
uint32 txed = 0;
|
||||
while (txed < length) {
|
||||
txed += spi_tx(_currentSetting->spi_d, data + txed, length - txed);
|
||||
}
|
||||
while ( (regs->SR & SPI_SR_BSY) != 0); // wait until BSY=0 before returning
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "4. After writing the last data item into the SPI_DR register, wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... then wait until BSY=0, this indicates that the transmission of the last data is complete."
|
||||
// taken from SdSpiSTM32F1.cpp - Victor's lib, and adapted to support device selection
|
||||
if (spi_is_rx_nonempty(_currentSetting->spi_d)) {
|
||||
uint8_t b = spi_rx_reg(_currentSetting->spi_d);
|
||||
}
|
||||
}
|
||||
|
||||
void SPIClass::write(const void *data, uint32 length)
|
||||
{
|
||||
spi_dev * spi_d = _currentSetting->spi_d;
|
||||
spi_tx(spi_d, data, length); // data can be array of bytes or words
|
||||
while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
uint16_t SPIClass::transfer16(uint16_t wr_data) const {
|
||||
spi_tx_reg(_currentSetting->spi_d, wr_data); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
|
||||
while (spi_is_rx_nonempty(_currentSetting->spi_d) == 0); // "4. Wait until RXNE=1 ..."
|
||||
uint16_t rd_data = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
|
||||
// while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
// while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
return rd_data;
|
||||
}
|
||||
|
||||
uint8 SPIClass::transfer(uint8 byte) const
|
||||
{
|
||||
spi_dev * spi_d = _currentSetting->spi_d;
|
||||
spi_rx_reg(spi_d); // read any previous data
|
||||
spi_tx_reg(spi_d, byte); // Write the data item to be transmitted into the SPI_DR register
|
||||
while (spi_is_tx_empty(spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
return (uint8)spi_rx_reg(spi_d); // "... and read the last received data."
|
||||
uint8 SPIClass::transfer(uint8 byte) const {
|
||||
spi_tx_reg(_currentSetting->spi_d, byte); // "2. Write the first data item to be transmitted into the SPI_DR register (this clears the TXE flag)."
|
||||
while (spi_is_rx_nonempty(_currentSetting->spi_d) == 0); // "4. Wait until RXNE=1 ..."
|
||||
uint8 b = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
return b;
|
||||
}
|
||||
|
||||
uint16_t SPIClass::transfer16(uint16_t data) const
|
||||
{
|
||||
// Modified by stevestrong: write & read two consecutive bytes in 8 bit mode (DFF=0)
|
||||
// This is more effective than two distinct byte transfers
|
||||
spi_dev * spi_d = _currentSetting->spi_d;
|
||||
spi_rx_reg(spi_d); // read any previous data
|
||||
spi_tx_reg(spi_d, data>>8); // write high byte
|
||||
while (spi_is_tx_empty(spi_d) == 0); // wait until TXE=1
|
||||
while (spi_is_busy(spi_d) != 0); // wait until BSY=0
|
||||
uint16_t ret = spi_rx_reg(spi_d)<<8; // read and shift high byte
|
||||
spi_tx_reg(spi_d, data); // write low byte
|
||||
while (spi_is_tx_empty(spi_d) == 0); // wait until TXE=1
|
||||
while (spi_is_busy(spi_d) != 0); // wait until BSY=0
|
||||
ret += spi_rx_reg(spi_d); // read low byte
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Roger Clark and Victor Perez, 2015
|
||||
* Performs a DMA SPI transfer with at least a receive buffer.
|
||||
* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer.
|
||||
* On exit TX buffer is not modified, and RX buffer cotains the received data.
|
||||
* Still in progress.
|
||||
*/
|
||||
void SPIClass::dmaTransferSet(const void *transmitBuf, void *receiveBuf) {
|
||||
uint8 SPIClass::dmaTransfer(uint8 *transmitBuf, uint8 *receiveBuf, uint16 length) {
|
||||
if (length == 0) return 0;
|
||||
uint8 b = 0;
|
||||
if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) b = spi_rx_reg(_currentSetting->spi_d); //Clear the RX buffer in case a byte is waiting on it.
|
||||
// dma1_ch3_Active=true;
|
||||
dma_init(_currentSetting->spiDmaDev);
|
||||
//spi_rx_dma_enable(_currentSetting->spi_d);
|
||||
//spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
|
||||
receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT ));// receive buffer DMA
|
||||
if (!transmitBuf) {
|
||||
transmitBuf = &ff;
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
|
||||
(volatile void*)transmitBuf, dma_bit_size, (DMA_FROM_MEM));// Transmit FF repeatedly
|
||||
}
|
||||
else {
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
|
||||
(volatile void*)transmitBuf, dma_bit_size, (DMA_MINC_MODE | DMA_FROM_MEM ));// Transmit buffer DMA
|
||||
}
|
||||
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW);
|
||||
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH);
|
||||
}
|
||||
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
|
||||
|
||||
// RX
|
||||
spi_rx_dma_enable(_currentSetting->spi_d);
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
|
||||
receiveBuf, DMA_SIZE_8BITS, (DMA_MINC_MODE | DMA_TRNS_CMPLT));// receive buffer DMA
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
|
||||
|
||||
// TX
|
||||
spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
if (!transmitBuf) {
|
||||
static uint8_t ff = 0XFF;
|
||||
transmitBuf = &ff;
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
|
||||
transmitBuf, DMA_SIZE_8BITS, (DMA_FROM_MEM | DMA_TRNS_CMPLT));// Transmit FF repeatedly
|
||||
}
|
||||
else {
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
|
||||
transmitBuf, DMA_SIZE_8BITS, (DMA_MINC_MODE | DMA_FROM_MEM | DMA_TRNS_CMPLT));// Transmit buffer DMA
|
||||
}
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
|
||||
|
||||
uint8 SPIClass::dmaTransferRepeat(uint16 length) {
|
||||
if (length == 0) return 0;
|
||||
if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d);
|
||||
_currentSetting->state = SPI_STATE_TRANSFER;
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
||||
spi_rx_dma_enable(_currentSetting->spi_d);
|
||||
spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
if (_currentSetting->receiveCallback){
|
||||
return 0;
|
||||
}
|
||||
//uint32_t m = millis();
|
||||
uint8 b = 0;
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
||||
|
||||
// while (dma1_ch3_Active);
|
||||
// if (receiveBuf) {
|
||||
uint32_t m = millis();
|
||||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {
|
||||
//Avoid interrupts and just loop waiting for the flag to be set.
|
||||
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
||||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
|
||||
if ((millis() - m) > 100) {
|
||||
// dma1_ch3_Active = 0;
|
||||
b = 2;
|
||||
break;
|
||||
}
|
||||
}
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
spi_rx_dma_disable(_currentSetting->spi_d);
|
||||
// }
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
|
||||
spi_rx_dma_disable(_currentSetting->spi_d); // And disable generation of DMA request from the SPI port so other peripherals can use the channels
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
if (spi_is_rx_nonempty(_currentSetting->spi_d) != 0){; // "4. Wait until RXNE=1 ..."
|
||||
uint8 x = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
|
||||
}
|
||||
return b;
|
||||
}
|
||||
|
||||
/* Roger Clark and Victor Perez, 2015
|
||||
* Performs a DMA SPI transfer with at least a receive buffer.
|
||||
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
|
||||
* On exit TX buffer is not modified, and RX buffer contains the received data.
|
||||
* Still in progress.
|
||||
*/
|
||||
|
||||
uint8 SPIClass::dmaTransfer(const void *transmitBuf, void *receiveBuf, uint16 length) {
|
||||
dmaTransferSet(transmitBuf, receiveBuf);
|
||||
return dmaTransferRepeat(length);
|
||||
}
|
||||
|
||||
/* Roger Clark and Victor Perez, 2015
|
||||
* Performs a DMA SPI send using a TX buffer.
|
||||
* On exit TX buffer is not modified.
|
||||
* Still in progress.
|
||||
* 2016 - stevstrong - reworked to automatically detect bit size from SPI setting
|
||||
*/
|
||||
|
||||
void SPIClass::dmaSendSet(const void * transmitBuf, bool minc) {
|
||||
uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
|
||||
dma_init(_currentSetting->spiDmaDev);
|
||||
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
|
||||
(volatile void*)transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
|
||||
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW);
|
||||
}
|
||||
|
||||
uint8 SPIClass::dmaSendRepeat(uint16 length) {
|
||||
if (length == 0) return 0;
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
|
||||
_currentSetting->state = SPI_STATE_TRANSMIT;
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
||||
spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
if (_currentSetting->transmitCallback)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
uint32_t m = millis();
|
||||
uint8 b = 0;
|
||||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {
|
||||
//Avoid interrupts and just loop waiting for the flag to be set.
|
||||
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
||||
}
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
return b;
|
||||
}
|
||||
|
||||
uint8 SPIClass::dmaSend(const void * transmitBuf, uint16 length, bool minc) {
|
||||
dmaSendSet(transmitBuf, minc);
|
||||
return dmaSendRepeat(length);
|
||||
}
|
||||
|
||||
uint8 SPIClass::dmaSendAsync(const void * transmitBuf, uint16 length, bool minc) {
|
||||
uint8 b = 0;
|
||||
|
||||
if (_currentSetting->state != SPI_STATE_READY)
|
||||
{
|
||||
|
||||
uint32_t m = millis();
|
||||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
|
||||
//delayMicroseconds(10);
|
||||
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
|
||||
}
|
||||
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
}
|
||||
|
||||
if (length == 0) return 0;
|
||||
uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
|
||||
|
||||
uint8 SPIClass::dmaSend(uint8 *transmitBuf, uint16 length, bool minc) {
|
||||
if (length == 0) return 0;
|
||||
uint32 flags = ((DMA_MINC_MODE * minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
|
||||
uint8 b = 0;
|
||||
// dma1_ch3_Active=true;
|
||||
dma_init(_currentSetting->spiDmaDev);
|
||||
// TX
|
||||
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
|
||||
(volatile void*)transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
||||
spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
|
||||
|
||||
_currentSetting->state = SPI_STATE_TRANSMIT;
|
||||
// TX
|
||||
spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_8BITS,
|
||||
transmitBuf, DMA_SIZE_8BITS, flags);// Transmit buffer DMA
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
||||
|
||||
// while (dma1_ch3_Active);
|
||||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0); //Avoid interrupts and just loop waiting for the flag to be set.
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
if (spi_is_rx_nonempty(_currentSetting->spi_d) != 0){; // "4. Wait until RXNE=1 ..."
|
||||
uint8 x = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
|
||||
}
|
||||
return b;
|
||||
}
|
||||
|
||||
uint8 SPIClass::dmaSend(uint16 *transmitBuf, uint16 length, bool minc) {
|
||||
if (length == 0) return 0;
|
||||
uint32 flags = ((DMA_MINC_MODE * minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
|
||||
uint8 b;
|
||||
dma1_ch3_Active=true;
|
||||
dma_init(_currentSetting->spiDmaDev);
|
||||
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
|
||||
|
||||
/*
|
||||
New functions added to manage callbacks.
|
||||
Victor Perez 2017
|
||||
*/
|
||||
// TX
|
||||
spi_tx_dma_enable(_currentSetting->spi_d);
|
||||
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, DMA_SIZE_16BITS,
|
||||
transmitBuf, DMA_SIZE_16BITS, flags);// Transmit buffer DMA
|
||||
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
|
||||
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
|
||||
|
||||
// while (dma1_ch3_Active);
|
||||
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & 0x2)==0); //Avoid interrupts and just loop waiting for the flag to be set.
|
||||
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
|
||||
void SPIClass::onReceive(void(*callback)(void)) {
|
||||
_currentSetting->receiveCallback = callback;
|
||||
if (callback){
|
||||
switch (_currentSetting->spi_d->clk_id) {
|
||||
case RCC_SPI1:
|
||||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback);
|
||||
break;
|
||||
case RCC_SPI2:
|
||||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback);
|
||||
break;
|
||||
#if BOARD_NR_SPI >= 3
|
||||
case RCC_SPI3:
|
||||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
ASSERT(0);
|
||||
}
|
||||
}
|
||||
else {
|
||||
dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
|
||||
}
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
|
||||
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
if (spi_is_rx_nonempty(_currentSetting->spi_d) != 0){; // "4. Wait until RXNE=1 ..."
|
||||
b = spi_rx_reg(_currentSetting->spi_d); // "... and read the last received data."
|
||||
}
|
||||
return b;
|
||||
}
|
||||
|
||||
void SPIClass::onTransmit(void(*callback)(void)) {
|
||||
_currentSetting->transmitCallback = callback;
|
||||
if (callback){
|
||||
switch (_currentSetting->spi_d->clk_id) {
|
||||
case RCC_SPI1:
|
||||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback);
|
||||
break;
|
||||
case RCC_SPI2:
|
||||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback);
|
||||
break;
|
||||
#if BOARD_NR_SPI >= 3
|
||||
case RCC_SPI3:
|
||||
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
ASSERT(0);
|
||||
}
|
||||
}
|
||||
else {
|
||||
dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
TODO: check if better to first call the customer code, next disable the DMA requests.
|
||||
Also see if we need to check whether callbacks are set or not, may be better to be checked during the initial setup and only set the callback to EventCallback if they are set.
|
||||
*/
|
||||
|
||||
void SPIClass::EventCallback() {
|
||||
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
|
||||
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0"
|
||||
switch (_currentSetting->state) {
|
||||
case SPI_STATE_TRANSFER:
|
||||
while (spi_is_rx_nonempty(_currentSetting->spi_d));
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
spi_rx_dma_disable(_currentSetting->spi_d);
|
||||
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
|
||||
|
||||
if (_currentSetting->receiveCallback)
|
||||
{
|
||||
_currentSetting->receiveCallback();
|
||||
}
|
||||
break;
|
||||
case SPI_STATE_TRANSMIT:
|
||||
_currentSetting->state = SPI_STATE_READY;
|
||||
spi_tx_dma_disable(_currentSetting->spi_d);
|
||||
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
|
||||
if (_currentSetting->transmitCallback)
|
||||
{
|
||||
_currentSetting->transmitCallback();
|
||||
}
|
||||
|
||||
break;
|
||||
default:
|
||||
// we shouldn't get here, so better to add an assert and fail.
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
void SPIClass::attachInterrupt(void) {
|
||||
// Should be enableInterrupt()
|
||||
// Should be enableInterrupt()
|
||||
}
|
||||
|
||||
void SPIClass::detachInterrupt(void) {
|
||||
// Should be disableInterrupt()
|
||||
// Should be disableInterrupt()
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -665,39 +536,28 @@ uint8 SPIClass::nssPin(void) {
|
||||
*/
|
||||
|
||||
uint8 SPIClass::send(uint8 data) {
|
||||
this->write(data);
|
||||
return 1;
|
||||
uint8 buf[] = {data};
|
||||
return this->send(buf, 1);
|
||||
}
|
||||
|
||||
uint8 SPIClass::send(uint8 *buf, uint32 len) {
|
||||
this->write(buf, len);
|
||||
return len;
|
||||
uint32 txed = 0;
|
||||
uint8 ret = 0;
|
||||
while (txed < len) {
|
||||
this->write(buf[txed++]);
|
||||
ret = this->read();
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint8 SPIClass::recv(void) {
|
||||
return this->read();
|
||||
}
|
||||
|
||||
/*
|
||||
DMA call back functions, one per port.
|
||||
*/
|
||||
|
||||
void SPIClass::_spi1EventCallback()
|
||||
{
|
||||
reinterpret_cast<class SPIClass*>(_spi1_this)->EventCallback();
|
||||
}
|
||||
|
||||
void SPIClass::_spi2EventCallback() {
|
||||
reinterpret_cast<class SPIClass*>(_spi2_this)->EventCallback();
|
||||
}
|
||||
#if BOARD_NR_SPI >= 3
|
||||
void SPIClass::_spi3EventCallback() {
|
||||
reinterpret_cast<class SPIClass*>(_spi3_this)->EventCallback();
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* Auxiliary functions
|
||||
*/
|
||||
* Auxiliary functions
|
||||
*/
|
||||
|
||||
static const spi_pins* dev_to_spi_pins(spi_dev *dev) {
|
||||
switch (dev->clk_id) {
|
||||
@@ -738,8 +598,8 @@ static void configure_gpios(spi_dev *dev, bool as_master) {
|
||||
disable_pwm(mosii);
|
||||
|
||||
spi_config_gpios(dev, as_master, nssi->gpio_device, nssi->gpio_bit,
|
||||
scki->gpio_device, scki->gpio_bit, misoi->gpio_bit,
|
||||
mosii->gpio_bit);
|
||||
scki->gpio_device, scki->gpio_bit, misoi->gpio_bit,
|
||||
mosii->gpio_bit);
|
||||
}
|
||||
|
||||
static const spi_baud_rate baud_rates[8] __FLASH__ = {
|
||||
@@ -754,23 +614,26 @@ static const spi_baud_rate baud_rates[8] __FLASH__ = {
|
||||
};
|
||||
|
||||
/*
|
||||
* Note: This assumes you're on a LeafLabs-style board
|
||||
* (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz).
|
||||
*/
|
||||
* Note: This assumes you're on a LeafLabs-style board
|
||||
* (CYCLES_PER_MICROSECOND == 72, APB2 at 72MHz, APB1 at 36MHz).
|
||||
*/
|
||||
static spi_baud_rate determine_baud_rate(spi_dev *dev, uint32_t freq) {
|
||||
uint32_t clock = 0, i;
|
||||
uint32_t clock = 0, i;
|
||||
#ifdef SPI_DEBUG
|
||||
Serial.print("determine_baud_rate("); Serial.print(freq); Serial.println(")");
|
||||
#endif
|
||||
switch (rcc_dev_clk(dev->clk_id))
|
||||
{
|
||||
case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz
|
||||
case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz
|
||||
case RCC_APB2: clock = STM32_PCLK2; break; // 72 Mhz
|
||||
case RCC_APB1: clock = STM32_PCLK1; break; // 36 Mhz
|
||||
}
|
||||
clock /= 2;
|
||||
i = 0;
|
||||
while (i < 7 && freq < clock) {
|
||||
clock /= 2;
|
||||
i++;
|
||||
clock /= 2;
|
||||
i++;
|
||||
}
|
||||
return baud_rates[i];
|
||||
return baud_rates[i];
|
||||
}
|
||||
|
||||
SPIClass SPI(1);
|
||||
|
||||
@@ -99,13 +99,6 @@
|
||||
#define DATA_SIZE_8BIT SPI_CR1_DFF_8_BIT
|
||||
#define DATA_SIZE_16BIT SPI_CR1_DFF_16_BIT
|
||||
|
||||
typedef enum {
|
||||
SPI_STATE_IDLE,
|
||||
SPI_STATE_READY,
|
||||
SPI_STATE_RECEIVE,
|
||||
SPI_STATE_TRANSMIT,
|
||||
SPI_STATE_TRANSFER
|
||||
} spi_mode_t;
|
||||
class SPISettings {
|
||||
public:
|
||||
SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
|
||||
@@ -122,13 +115,6 @@ public:
|
||||
init_MightInline(clock, bitOrder, dataMode, dataSize);
|
||||
}
|
||||
}
|
||||
SPISettings(uint32_t clock) {
|
||||
if (__builtin_constant_p(clock)) {
|
||||
init_AlwaysInline(clock, MSBFIRST, SPI_MODE0, DATA_SIZE_8BIT);
|
||||
} else {
|
||||
init_MightInline(clock, MSBFIRST, SPI_MODE0, DATA_SIZE_8BIT);
|
||||
}
|
||||
}
|
||||
SPISettings() { init_AlwaysInline(4000000, MSBFIRST, SPI_MODE0, DATA_SIZE_8BIT); }
|
||||
private:
|
||||
void init_MightInline(uint32_t clock, BitOrder bitOrder, uint8_t dataMode, uint32_t dataSize) {
|
||||
@@ -141,31 +127,21 @@ private:
|
||||
this->dataSize = dataSize;
|
||||
}
|
||||
uint32_t clock;
|
||||
uint32_t dataSize;
|
||||
uint32_t clockDivider;
|
||||
BitOrder bitOrder;
|
||||
uint8_t dataMode;
|
||||
uint8_t _SSPin;
|
||||
volatile spi_mode_t state;
|
||||
uint32_t dataSize;
|
||||
|
||||
spi_dev *spi_d;
|
||||
uint8_t _SSPin;
|
||||
uint32_t clockDivider;
|
||||
dma_channel spiRxDmaChannel, spiTxDmaChannel;
|
||||
dma_dev* spiDmaDev;
|
||||
void (*receiveCallback)(void) = NULL;
|
||||
void (*transmitCallback)(void) = NULL;
|
||||
|
||||
friend class SPIClass;
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
Should move this to within the class once tested out, just for tidyness
|
||||
*/
|
||||
static uint8_t ff = 0XFF;
|
||||
static void (*_spi1_this);
|
||||
static void (*_spi2_this);
|
||||
#if BOARD_NR_SPI >= 3
|
||||
static void (*_spi3_this);
|
||||
#endif
|
||||
volatile static bool dma1_ch3_Active;
|
||||
|
||||
/**
|
||||
* @brief Wirish SPI interface.
|
||||
@@ -176,6 +152,8 @@ static void (*_spi3_this);
|
||||
class SPIClass {
|
||||
public:
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @param spiPortNumber Number of the SPI port to manage.
|
||||
*/
|
||||
@@ -185,6 +163,8 @@ public:
|
||||
* Set up/tear down
|
||||
*/
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* @brief Equivalent to begin(SPI_1_125MHZ, MSBFIRST, 0).
|
||||
*/
|
||||
@@ -230,55 +210,46 @@ public:
|
||||
*/
|
||||
void setDataSize(uint32 ds);
|
||||
|
||||
/* Victor Perez 2017. Added to set and clear callback functions for callback
|
||||
* on DMA transfer completion.
|
||||
* onReceive used to set the callback in case of dmaTransfer (tx/rx), once rx is completed
|
||||
* onTransmit used to set the callback in case of dmaSend (tx only). That function
|
||||
* will NOT be called in case of TX/RX
|
||||
*/
|
||||
void onReceive(void(*)(void));
|
||||
void onTransmit(void(*)(void));
|
||||
|
||||
|
||||
/*
|
||||
* I/O
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Return the next unread byte/word.
|
||||
* @brief Return the next unread byte.
|
||||
*
|
||||
* If there is no unread byte/word waiting, this function will block
|
||||
* If there is no unread byte waiting, this function will block
|
||||
* until one is received.
|
||||
*/
|
||||
uint16 read(void);
|
||||
uint8 read(void);
|
||||
|
||||
/**
|
||||
* @brief Read length bytes, storing them into buffer.
|
||||
* @param buffer Buffer to store received bytes into.
|
||||
* @param length Number of bytes to store in buffer. This
|
||||
* @param length Number of bytes to store in buffer. This
|
||||
* function will block until the desired number of
|
||||
* bytes have been read.
|
||||
*/
|
||||
void read(uint8 *buffer, uint32 length);
|
||||
|
||||
/**
|
||||
* @brief Transmit one byte/word.
|
||||
* @param data to transmit.
|
||||
* @brief Transmit a byte.
|
||||
* @param data Byte to transmit.
|
||||
*/
|
||||
void write(uint16 data);
|
||||
void write16(uint16 data); // write 2 bytes in 8 bit mode (DFF=0)
|
||||
// void write(uint8 data);
|
||||
|
||||
/**
|
||||
* @brief Transmit one byte/word a specified number of times.
|
||||
* @brief Transmit a half word.
|
||||
* @param data to transmit.
|
||||
*/
|
||||
void write(uint16 data, uint32 n);
|
||||
|
||||
void write(uint16 data);
|
||||
|
||||
/**
|
||||
* @brief Transmit multiple bytes/words.
|
||||
* @param buffer Bytes/words to transmit.
|
||||
* @param length Number of bytes/words in buffer to transmit.
|
||||
* @brief Transmit multiple bytes.
|
||||
* @param buffer Bytes to transmit.
|
||||
* @param length Number of bytes in buffer to transmit.
|
||||
*/
|
||||
void write(const void * buffer, uint32 length);
|
||||
void write(const uint8 *buffer, uint32 length);
|
||||
|
||||
/**
|
||||
* @brief Transmit a byte, then return the next unread byte.
|
||||
@@ -290,10 +261,9 @@ public:
|
||||
*/
|
||||
uint8 transfer(uint8 data) const;
|
||||
uint16_t transfer16(uint16_t data) const;
|
||||
|
||||
|
||||
/**
|
||||
* @brief Sets up a DMA Transfer for "length" bytes.
|
||||
* The transfer mode (8 or 16 bit mode) is evaluated from the SPI peripheral setting.
|
||||
*
|
||||
* This function transmits and receives to buffers.
|
||||
*
|
||||
@@ -301,25 +271,31 @@ public:
|
||||
* @param receiveBuf buffer Bytes to save received data.
|
||||
* @param length Number of bytes in buffer to transmit.
|
||||
*/
|
||||
uint8 dmaTransfer(const void * transmitBuf, void * receiveBuf, uint16 length);
|
||||
void dmaTransferSet(const void *transmitBuf, void *receiveBuf);
|
||||
uint8 dmaTransferRepeat(uint16 length);
|
||||
uint8 dmaTransfer(uint8 *transmitBuf, uint8 *receiveBuf, uint16 length);
|
||||
|
||||
/**
|
||||
* @brief Sets up a DMA Transmit for SPI 8 or 16 bit transfer mode.
|
||||
* The transfer mode (8 or 16 bit mode) is evaluated from the SPI peripheral setting.
|
||||
* @brief Sets up a DMA Transmit for bytes.
|
||||
*
|
||||
* This function only transmits and does not care about the RX fifo.
|
||||
* This function transmits and does not care about the RX fifo.
|
||||
*
|
||||
* @param data buffer half words to transmit,
|
||||
* @param transmitBuf buffer Bytes to transmit,
|
||||
* @param length Number of bytes in buffer to transmit.
|
||||
* @param minc Set to use Memory Increment mode, clear to use Circular mode.
|
||||
*/
|
||||
uint8 dmaSend(const void * transmitBuf, uint16 length, bool minc = 1);
|
||||
void dmaSendSet(const void * transmitBuf, bool minc);
|
||||
uint8 dmaSendRepeat(uint16 length);
|
||||
uint8 dmaSend(uint8 *transmitBuf, uint16 length, bool minc = 1);
|
||||
|
||||
/**
|
||||
* @brief Sets up a DMA Transmit for half words.
|
||||
* SPI PERFIPHERAL MUST BE SET TO 16 BIT MODE BEFORE
|
||||
*
|
||||
* This function transmits and does not care about the RX fifo.
|
||||
*
|
||||
* @param data buffer half words to transmit,
|
||||
* @param length Number of bytes in buffer to transmit.
|
||||
* @param minc Set to use Memory Increment mode (default if blank), clear to use Circular mode.
|
||||
*/
|
||||
uint8 dmaSend(uint16 *transmitBuf, uint16 length, bool minc = 1);
|
||||
|
||||
uint8 dmaSendAsync(const void * transmitBuf, uint16 length, bool minc = 1);
|
||||
/*
|
||||
* Pin accessors
|
||||
*/
|
||||
@@ -351,20 +327,23 @@ public:
|
||||
* this HardwareSPI instance.
|
||||
*/
|
||||
spi_dev* c_dev(void) { return _currentSetting->spi_d; }
|
||||
|
||||
|
||||
spi_dev *dev(){ return _currentSetting->spi_d;}
|
||||
|
||||
/**
|
||||
* @brief Sets the number of the SPI peripheral to be used by
|
||||
* this HardwareSPI instance.
|
||||
*
|
||||
* @param spi_num Number of the SPI port. 1-2 in low density devices
|
||||
* or 1-3 in high density devices.
|
||||
*/
|
||||
|
||||
void setModule(int spi_num)
|
||||
{
|
||||
_currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed
|
||||
}
|
||||
|
||||
spi_dev *dev(){ return _currentSetting->spi_d;}
|
||||
|
||||
/**
|
||||
* @brief Sets the number of the SPI peripheral to be used by
|
||||
* this HardwareSPI instance.
|
||||
*
|
||||
* @param spi_num Number of the SPI port. 1-2 in low density devices
|
||||
* or 1-3 in high density devices.
|
||||
*/
|
||||
void setModule(int spi_num)
|
||||
{
|
||||
_currentSetting=&_settings[spi_num-1];// SPI channels are called 1 2 and 3 but the array is zero indexed
|
||||
}
|
||||
|
||||
/* -- The following methods are deprecated --------------------------- */
|
||||
|
||||
@@ -397,25 +376,21 @@ public:
|
||||
* @see HardwareSPI::read()
|
||||
*/
|
||||
uint8 recv(void);
|
||||
|
||||
|
||||
private:
|
||||
|
||||
/*
|
||||
static inline void DMA1_CH3_Event() {
|
||||
dma1_ch3_Active = 0;
|
||||
// dma_disable(DMA1, DMA_CH3);
|
||||
// dma_disable(DMA1, DMA_CH2);
|
||||
|
||||
// To Do. Need to wait for
|
||||
}
|
||||
*/
|
||||
SPISettings _settings[BOARD_NR_SPI];
|
||||
SPISettings *_currentSetting;
|
||||
|
||||
|
||||
void updateSettings(void);
|
||||
/*
|
||||
* Functions added for DMA transfers with Callback.
|
||||
* Experimental.
|
||||
*/
|
||||
|
||||
void EventCallback(void);
|
||||
|
||||
static void _spi1EventCallback(void);
|
||||
static void _spi2EventCallback(void);
|
||||
#if BOARD_NR_SPI >= 3
|
||||
static void _spi3EventCallback(void);
|
||||
#endif
|
||||
/*
|
||||
spi_dev *spi_d;
|
||||
uint8_t _SSPin;
|
||||
|
||||
Reference in New Issue
Block a user