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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-07-12 17:57:53 +00:00
Use cc2500 fast frequency hopping
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c9fecafada
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@ -87,6 +87,7 @@ extern uint8_t xn297_addr_len;
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extern uint8_t xn297_tx_addr[];
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extern const uint8_t xn297_scramble[];
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extern const uint16_t PROGMEM xn297_crc_xorout_scrambled[];
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static uint8_t fscal1[MJXQ_RF_NUM_CHANNELS];
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static void __attribute__((unused)) XN297L_init()
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{
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@ -112,6 +113,7 @@ static void __attribute__((unused)) XN297L_init()
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// Sync Word Qualifier Mode = No preamble/sync
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// TX Power = 0
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// Whitening = false
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// Fast Frequency Hopping - no PLL auto calibration
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01); // Packet Automation Control
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control
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@ -125,7 +127,7 @@ static void __attribute__((unused)) XN297L_init()
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // Modem Configuration
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // Modem Configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x62); // Modem Deviation Setting
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CC2500_WriteReg(CC2500_18_MCSM0, 0x18); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x1C); // Bit Synchronization Configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0xC7); // AGC Control
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@ -189,6 +191,18 @@ static void __attribute__((unused)) XN297L_WritePayload(const uint8_t* msg, uint
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// transmit
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CC2500_Strobe(CC2500_STX);
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}
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static void __attribute__((unused)) calibrate_pll()
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{
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//calibrate hop channels
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for (uint8_t i = 0; i < MJXQ_RF_NUM_CHANNELS; i++) {
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[i]*3);
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CC2500_Strobe(CC2500_SCAL);
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delayMicroseconds(900);
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fscal1[i] = CC2500_ReadReg(CC2500_25_FSCAL1);
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}
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}
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#endif // CC2500_INSTALLED
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static uint8_t __attribute__((unused)) MJXQ_pan_tilt_value()
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@ -308,6 +322,8 @@ static void __attribute__((unused)) MJXQ_send_packet(uint8_t bind)
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if (sub_protocol == E010 || sub_protocol == PHOENIX) {
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// spacing is 333.25 kHz, must multiply xn297 channel by 3
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CC2500_WriteReg(CC2500_0A_CHANNR, hopping_frequency[hopping_frequency_no / 2] * 3);
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// PLL calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, fscal1[hopping_frequency_no / 2]);
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// Make sure that the radio is in IDLE state before flushing the FIFO
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CC2500_Strobe(CC2500_SIDLE);
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// Flush TX FIFO
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@ -364,6 +380,7 @@ static void __attribute__((unused)) MJXQ_init()
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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XN297L_SetTXAddr(addr, sizeof(addr));
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CC2500_SetPower();
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calibrate_pll();
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}
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else
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#endif
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@ -458,6 +475,9 @@ uint16_t MJXQ_callback()
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if (bind_counter == 0)
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{
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MJXQ_init2();
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#ifdef CC2500_INSTALLED
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calibrate_pll();
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#endif
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BIND_DONE;
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}
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else
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