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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
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Change XN297 emulation layer
Loads of protocols have been touched by this change. Some testing has been done but please test on all your models. The XN297 emulation selects in this order: - the CC2500 if it is available and bitrate=250K. Configure the option field automatically for RF tune. - the NRF for all bitrates if it is available - if NRF is not available and bitrate=1M then an invalid protocol is sent automatically to the radio. CC2500 @250K can now receive normal and enhanced payloads. OMP protocol supports telemetry on CC2500 and is also for NRF only modules including telemetry. Separation of E016H (new protocol) from E01X due to different structure. MJXQ, MT99XX, Q303 and XK: some sub protocols available on CC2500 only.
This commit is contained in:
Pascal Langer
@@ -195,6 +195,7 @@ void __attribute__((unused)) CC2500_250K_Init()
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// TX Power = 0
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// Whitening = false
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// Fast Frequency Hopping - no PLL auto calibration
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/* //Previous config
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x01); // Packet Automation Control
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control
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CC2500_WriteReg(CC2500_0C_FSCTRL0, option); // Frequency offset hack
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@@ -217,6 +218,42 @@ void __attribute__((unused)) CC2500_250K_Init()
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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*/
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x05); // Packet Automation Control, address check true auto append RSSI & LQI
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x00); // Packet Automation Control, fixed packet len
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0A); // Frequency Synthesizer Control (IF Frequency)
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CC2500_WriteReg(CC2500_0C_FSCTRL0, 0x00); // Frequency Synthesizer Control
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // Frequency Control Word, High Byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // Frequency Control Word, Middle Byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xC5); // Frequency Control Word, Low Byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x3D); // Modem Configuration Set to 406kHz BW filter
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x3B); // Modem Configuration
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration, GFSK, no preambule and no sync word -> TX by default
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x03); // Modem Configuration, 2 bytes of preamble
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // Modem Configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x62); // Modem Deviation Setting
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x1D); // Frequency Offset Compensation Configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x1C); // Bit Synchronization Configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0xC7); // AGC Control
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x00); // AGC Control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0xB0); // AGC Control
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CC2500_WriteReg(CC2500_21_FREND1, 0xB6); // Front End RX Configuration
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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//Prep RX
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// Set first 3 bytes of rx addr in [0]->SYNC1, [1]->SYNC0 and [2]->ADDR
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// CC2500_WriteReg(CC2500_04_SYNC1, [0]); // Sync word, high byte
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// CC2500_WriteReg(CC2500_05_SYNC0, [1]); // Sync word, low byte
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// CC2500_WriteReg(CC2500_09_ADDR, [2]); // Set addr
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//RX
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// CC2500_WriteReg(CC2500_12_MDMCFG2, 0x12); // Modem Configuration, GFSK, 16/16 Sync Word TX&RX
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//TX
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// CC2500_WriteReg(CC2500_12_MDMCFG2, 0x10); // Modem Configuration, GFSK, no preambule and no sync word
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// need to set packet length before sending/receiving
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// CC2500_WriteReg(CC2500_06_PKTLEN, cc2500_packet_len); // Packet len, fix packet len
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CC2500_SetTxRxMode(TX_EN);
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CC2500_SetPower();
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@@ -250,87 +287,4 @@ void __attribute__((unused)) CC2500_250K_RFChannel(uint8_t number)
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CC2500_Strobe(CC2500_SCAL);
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delayMicroseconds(900);
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}
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//NRF emulation layer with CRC16 enabled
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uint8_t cc2500_nrf_tx_addr[5], cc2500_nrf_addr_len;
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void __attribute__((unused)) CC2500_250K_NRF_SetTXAddr(uint8_t* addr, uint8_t len)
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{
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cc2500_nrf_addr_len = len;
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memcpy(cc2500_nrf_tx_addr, addr, len);
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}
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void __attribute__((unused)) CC2500_250K_NRF_WritePayload(uint8_t* msg, uint8_t len)
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{
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#if defined(ESKY150V2_CC2500_INO)
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uint8_t buf[158];
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#else
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uint8_t buf[35];
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#endif
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uint8_t last = 0;
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uint8_t i;
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//nrf preamble
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if(cc2500_nrf_tx_addr[cc2500_nrf_addr_len - 1] & 0x80)
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buf[0]=0xAA;
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else
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buf[0]=0x55;
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last++;
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// address
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for (i = 0; i < cc2500_nrf_addr_len; ++i)
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buf[last++] = cc2500_nrf_tx_addr[cc2500_nrf_addr_len - i - 1];
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// payload
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for (i = 0; i < len; ++i)
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buf[last++] = msg[i];
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// crc
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crc = 0xffff;
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for (uint8_t i = 1; i < last; ++i)
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crc16_update( buf[i], 8);
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buf[last++] = crc >> 8;
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buf[last++] = crc & 0xff;
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buf[last++] = 0;
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//for(uint8_t i=0;i<last;i++)
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// debug("%02X ",buf[i]);
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//debugln("");
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// stop TX/RX
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CC2500_Strobe(CC2500_SIDLE);
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// flush tx FIFO
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CC2500_Strobe(CC2500_SFTX);
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// packet length
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CC2500_WriteReg(CC2500_3F_TXFIFO, last);
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// transmit nrf packet
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uint8_t *buff=buf;
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uint8_t status;
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if(last>63)
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{
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buff, 63);
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CC2500_Strobe(CC2500_STX);
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last-=63;
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buff+=63;
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while(last)
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{//Loop until all the data is sent
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do
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{// Wait for the FIFO to become available
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status=CC2500_ReadReg(CC2500_3A_TXBYTES | CC2500_READ_BURST);
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}
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while((status&0x7F)>31 && (status&0x80)==0);
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if(last>31)
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{//Send 31 bytes
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buff, 31);
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last-=31;
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buff+=31;
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}
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else
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{//Send last bytes
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buff, last);
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last=0;
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}
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}
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}
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else
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{//Send packet
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CC2500_WriteRegisterMulti(CC2500_3F_TXFIFO, buff, last);
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CC2500_Strobe(CC2500_STX);
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}
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}
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#endif
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