gomaomao/DIY-Multiprotocol-TX-Module
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LT8900 emulator address convention changed, updated Shenqi protocol accordingly.

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This commit is contained in:
pascallanger 2016-04-15 15:46:32 +02:00
parent ed027fd3ce
commit 4486582006
7 changed files with 99 additions and 89 deletions
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3
Multiprotocol/A7105_SPI.ino
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@ -121,9 +121,8 @@ uint8_t A7105_Reset()
{ {
uint8_t result; uint8_t result;
delay(10); //wait 10ms for A7105 wakeup
A7105_WriteReg(0x00, 0x00); A7105_WriteReg(0x00, 0x00);
delay(1000); _delay_us(1000);
A7105_SetTxRxMode(TXRX_OFF); //Set both GPIO as output and low A7105_SetTxRxMode(TXRX_OFF); //Set both GPIO as output and low
result=A7105_ReadReg(0x10) == 0x9E; //check if is reset. result=A7105_ReadReg(0x10) == 0x9E; //check if is reset.
A7105_Strobe(A7105_STANDBY); A7105_Strobe(A7105_STANDBY);

2
Multiprotocol/CG023_nrf24l01.ino
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@ -25,7 +25,7 @@
#define CG023_INITIAL_WAIT 500 #define CG023_INITIAL_WAIT 500
#define CG023_PACKET_SIZE 15 // packets have 15-byte payload #define CG023_PACKET_SIZE 15 // packets have 15-byte payload
#define CG023_RF_BIND_CHANNEL 0x2D #define CG023_RF_BIND_CHANNEL 0x2D
#define CG023_BIND_COUNT 1000 // 8 seconds #define CG023_BIND_COUNT 500 // 4 seconds
#define YD829_PACKET_PERIOD 4100 // Timeout for callback in uSec #define YD829_PACKET_PERIOD 4100 // Timeout for callback in uSec
#define H8_3D_PACKET_PERIOD 1800 // Timeout for callback in uSec #define H8_3D_PACKET_PERIOD 1800 // Timeout for callback in uSec
#define H8_3D_PACKET_SIZE 20 #define H8_3D_PACKET_SIZE 20

5
Multiprotocol/CX10_nrf24l01.ino
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@ -182,7 +182,8 @@ static void __attribute__((unused)) CX10_init()
NRF24L01_SetPower(); NRF24L01_SetPower();
} }
uint16_t CX10_callback() { uint16_t CX10_callback()
{
switch (phase) { switch (phase) {
case CX10_BIND1: case CX10_BIND1:
if (bind_counter == 0) if (bind_counter == 0)
@ -219,7 +220,7 @@ uint16_t CX10_callback() {
NRF24L01_SetTxRxMode(TXRX_OFF); NRF24L01_SetTxRxMode(TXRX_OFF);
NRF24L01_SetTxRxMode(TX_EN); NRF24L01_SetTxRxMode(TX_EN);
CX10_Write_Packet(1); CX10_Write_Packet(1);
delayMicroseconds(400); // 300µs in deviation but not working so using 400µs instead _delay_us(1000);
// switch to RX mode // switch to RX mode
NRF24L01_SetTxRxMode(TXRX_OFF); NRF24L01_SetTxRxMode(TXRX_OFF);
NRF24L01_FlushRx(); NRF24L01_FlushRx();

1
Multiprotocol/FlySky_a7105.ino
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@ -192,7 +192,6 @@ uint16_t ReadFlySky()
} }
uint16_t initFlySky() { uint16_t initFlySky() {
//A7105_Reset();
A7105_Init(INIT_FLYSKY); //flysky_init(); A7105_Init(INIT_FLYSKY); //flysky_init();
if ((rx_tx_addr[3]&0xF0) > 0x90) // limit offset to 9 as higher values don't work with some RX (ie V912) if ((rx_tx_addr[3]&0xF0) > 0x90) // limit offset to 9 as higher values don't work with some RX (ie V912)

9
Multiprotocol/Multiprotocol.ino
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@ -217,6 +217,15 @@ void setup()
#ifdef CC2500_INSTALLED #ifdef CC2500_INSTALLED
CC2500_Reset(); CC2500_Reset();
#endif #endif
#ifdef A7105_INSTALLED
A7105_Reset();
#endif
#ifdef CYRF6936_INSTALLED
CYRF_Reset();
#endif
#ifdef NFR24L01_INSTALLED
NRF24L01_Reset();
#endif
//Protocol and interrupts initialization //Protocol and interrupts initialization
if(mode_select != MODE_SERIAL) if(mode_select != MODE_SERIAL)

126
Multiprotocol/NRF24l01_SPI.ino
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@ -246,7 +246,8 @@ void NRF24L01_Reset()
uint8_t NRF24L01_packet_ack() uint8_t NRF24L01_packet_ack()
{ {
switch (NRF24L01_ReadReg(NRF24L01_07_STATUS) & (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT))) { switch (NRF24L01_ReadReg(NRF24L01_07_STATUS) & (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT)))
{
case BV(NRF24L01_07_TX_DS): case BV(NRF24L01_07_TX_DS):
return PKT_ACKED; return PKT_ACKED;
case BV(NRF24L01_07_MAX_RT): case BV(NRF24L01_07_MAX_RT):
@ -411,47 +412,47 @@ void XN297_ReadPayload(uint8_t* msg, uint8_t len)
// End of XN297 emulation // End of XN297 emulation
/////////////// ///////////////
// LT8910 emulation layer // LT8900 emulation layer
uint8_t LT8910_buffer[64]; uint8_t LT8900_buffer[64];
uint8_t LT8910_buffer_start; uint8_t LT8900_buffer_start;
uint16_t LT8910_buffer_overhead_bits; uint16_t LT8900_buffer_overhead_bits;
uint8_t LT8910_addr[8]; uint8_t LT8900_addr[8];
uint8_t LT8910_addr_size; uint8_t LT8900_addr_size;
uint8_t LT8910_Preamble_Len; uint8_t LT8900_Preamble_Len;
uint8_t LT8910_Tailer_Len; uint8_t LT8900_Tailer_Len;
uint8_t LT8910_CRC_Initial_Data; uint8_t LT8900_CRC_Initial_Data;
uint8_t LT8910_Flags; uint8_t LT8900_Flags;
#define LT8910_CRC_ON 6 #define LT8900_CRC_ON 6
#define LT8910_SCRAMBLE_ON 5 #define LT8900_SCRAMBLE_ON 5
#define LT8910_PACKET_LENGTH_EN 4 #define LT8900_PACKET_LENGTH_EN 4
#define LT8910_DATA_PACKET_TYPE_1 3 #define LT8900_DATA_PACKET_TYPE_1 3
#define LT8910_DATA_PACKET_TYPE_0 2 #define LT8900_DATA_PACKET_TYPE_0 2
#define LT8910_FEC_TYPE_1 1 #define LT8900_FEC_TYPE_1 1
#define LT8910_FEC_TYPE_0 0 #define LT8900_FEC_TYPE_0 0
void LT8910_Config(uint8_t preamble_len, uint8_t trailer_len, uint8_t flags, uint8_t crc_init) void LT8900_Config(uint8_t preamble_len, uint8_t trailer_len, uint8_t flags, uint8_t crc_init)
{ {
//Preamble 1 to 8 bytes //Preamble 1 to 8 bytes
LT8910_Preamble_Len=preamble_len; LT8900_Preamble_Len=preamble_len;
//Trailer 4 to 18 bits //Trailer 4 to 18 bits
LT8910_Tailer_Len=trailer_len; LT8900_Tailer_Len=trailer_len;
//Flags //Flags
// CRC_ON: 1 on, 0 off // CRC_ON: 1 on, 0 off
// SCRAMBLE_ON: 1 on, 0 off // SCRAMBLE_ON: 1 on, 0 off
// PACKET_LENGTH_EN: 1 1st byte of payload is payload size // PACKET_LENGTH_EN: 1 1st byte of payload is payload size
// DATA_PACKET_TYPE: 00 NRZ, 01 Manchester, 10 8bit/10bit line code, 11 interleave data type // DATA_PACKET_TYPE: 00 NRZ, 01 Manchester, 10 8bit/10bit line code, 11 interleave data type
// FEC_TYPE: 00 No FEC, 01 FEC13, 10 FEC23, 11 reserved // FEC_TYPE: 00 No FEC, 01 FEC13, 10 FEC23, 11 reserved
LT8910_Flags=flags; LT8900_Flags=flags;
//CRC init constant //CRC init constant
LT8910_CRC_Initial_Data=crc_init; LT8900_CRC_Initial_Data=crc_init;
} }
void LT8910_SetChannel(uint8_t channel) void LT8900_SetChannel(uint8_t channel)
{ {
NRF24L01_WriteReg(NRF24L01_05_RF_CH, channel +2); //NRF24L01 is 2400+channel but LT8900 is 2402+channel NRF24L01_WriteReg(NRF24L01_05_RF_CH, channel +2); //NRF24L01 is 2400+channel but LT8900 is 2402+channel
} }
void LT8910_SetTxRxMode(enum TXRX_State mode) void LT8900_SetTxRxMode(enum TXRX_State mode)
{ {
if(mode == TX_EN) if(mode == TX_EN)
{ {
@ -477,61 +478,62 @@ void LT8910_SetTxRxMode(enum TXRX_State mode)
NRF24L01_SetTxRxMode(TXRX_OFF); NRF24L01_SetTxRxMode(TXRX_OFF);
} }
void LT8910_BuildOverhead() void LT8900_BuildOverhead()
{ {
uint8_t pos; uint8_t pos;
//Build overhead //Build overhead
//preamble //preamble
memset(LT8910_buffer,LT8910_addr[0]&0x01?0xAA:0x55,LT8910_Preamble_Len-1); memset(LT8900_buffer,LT8900_addr[0]&0x01?0xAA:0x55,LT8900_Preamble_Len-1);
pos=LT8910_Preamble_Len-1; pos=LT8900_Preamble_Len-1;
//address //address
for(uint8_t i=0;i<LT8910_addr_size;i++) for(uint8_t i=0;i<LT8900_addr_size;i++)
{ {
LT8910_buffer[pos]=bit_reverse(LT8910_addr[i]); LT8900_buffer[pos]=bit_reverse(LT8900_addr[i]);
pos++; pos++;
} }
//trailer //trailer
memset(LT8910_buffer+pos,(LT8910_buffer[pos-1]&0x01)==0?0xAA:0x55,3); memset(LT8900_buffer+pos,(LT8900_buffer[pos-1]&0x01)==0?0xAA:0x55,3);
LT8910_buffer_overhead_bits=pos*8+LT8910_Tailer_Len; LT8900_buffer_overhead_bits=pos*8+LT8900_Tailer_Len;
//nrf address length max is 5 //nrf address length max is 5
pos+=LT8910_Tailer_Len/8; pos+=LT8900_Tailer_Len/8;
LT8910_buffer_start=pos>5?5:pos; LT8900_buffer_start=pos>5?5:pos;
} }
void LT8910_SetAddress(uint8_t *address,uint8_t addr_size) void LT8900_SetAddress(uint8_t *address,uint8_t addr_size)
{ {
uint8_t addr[5]; uint8_t addr[5];
//Address size (SyncWord) 2 to 8 bytes, 16/32/48/64 bits //Address size (SyncWord) 2 to 8 bytes, 16/32/48/64 bits
LT8910_addr_size=addr_size; LT8900_addr_size=addr_size;
memcpy(LT8910_addr,address,LT8910_addr_size); for (uint8_t i = 0; i < addr_size; i++)
LT8900_addr[i] = address[addr_size-1-i];
//Build overhead //Build overhead
LT8910_BuildOverhead(); LT8900_BuildOverhead();
//Set NRF RX&TX address based on overhead content //Set NRF RX&TX address based on overhead content
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, LT8910_buffer_start-2); NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, LT8900_buffer_start-2);
for(uint8_t i=0;i<LT8910_buffer_start;i++) // reverse bytes order for(uint8_t i=0;i<LT8900_buffer_start;i++) // reverse bytes order
addr[i]=LT8910_buffer[LT8910_buffer_start-i-1]; addr[i]=LT8900_buffer[LT8900_buffer_start-i-1];
NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, addr,LT8910_buffer_start); NRF24L01_WriteRegisterMulti(NRF24L01_0A_RX_ADDR_P0, addr,LT8900_buffer_start);
NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, addr,LT8910_buffer_start); NRF24L01_WriteRegisterMulti(NRF24L01_10_TX_ADDR, addr,LT8900_buffer_start);
} }
uint8_t LT8910_ReadPayload(uint8_t* msg, uint8_t len) uint8_t LT8900_ReadPayload(uint8_t* msg, uint8_t len)
{ {
uint8_t i,pos=0,shift,end,buffer[32]; uint8_t i,pos=0,shift,end,buffer[32];
unsigned int crc=LT8910_CRC_Initial_Data,a; unsigned int crc=LT8900_CRC_Initial_Data,a;
pos=LT8910_buffer_overhead_bits/8-LT8910_buffer_start; pos=LT8900_buffer_overhead_bits/8-LT8900_buffer_start;
end=pos+len+(LT8910_Flags&_BV(LT8910_PACKET_LENGTH_EN)?1:0)+(LT8910_Flags&_BV(LT8910_CRC_ON)?2:0); end=pos+len+(LT8900_Flags&_BV(LT8900_PACKET_LENGTH_EN)?1:0)+(LT8900_Flags&_BV(LT8900_CRC_ON)?2:0);
//Read payload //Read payload
NRF24L01_ReadPayload(buffer,end+1); NRF24L01_ReadPayload(buffer,end+1);
//Check address + trail //Check address + trail
for(i=0;i<pos;i++) for(i=0;i<pos;i++)
if(LT8910_buffer[LT8910_buffer_start+i]!=buffer[i]) if(LT8900_buffer[LT8900_buffer_start+i]!=buffer[i])
return 0; // wrong address... return 0; // wrong address...
//Shift buffer to remove trail bits //Shift buffer to remove trail bits
shift=LT8910_buffer_overhead_bits&0x7; shift=LT8900_buffer_overhead_bits&0x7;
for(i=pos;i<end;i++) for(i=pos;i<end;i++)
{ {
a=(buffer[i]<<8)+buffer[i+1]; a=(buffer[i]<<8)+buffer[i+1];
@ -539,7 +541,7 @@ uint8_t LT8910_ReadPayload(uint8_t* msg, uint8_t len)
buffer[i]=(a>>8)&0xFF; buffer[i]=(a>>8)&0xFF;
} }
//Check len //Check len
if(LT8910_Flags&_BV(LT8910_PACKET_LENGTH_EN)) if(LT8900_Flags&_BV(LT8900_PACKET_LENGTH_EN))
{ {
crc=crc16_update(crc,buffer[pos]); crc=crc16_update(crc,buffer[pos]);
if(bit_reverse(len)!=buffer[pos++]) if(bit_reverse(len)!=buffer[pos++])
@ -552,7 +554,7 @@ uint8_t LT8910_ReadPayload(uint8_t* msg, uint8_t len)
msg[i]=bit_reverse(buffer[pos++]); msg[i]=bit_reverse(buffer[pos++]);
} }
//Check CRC //Check CRC
if(LT8910_Flags&_BV(LT8910_CRC_ON)) if(LT8900_Flags&_BV(LT8900_CRC_ON))
{ {
if(buffer[pos++]!=((crc>>8)&0xFF)) return 0; // wrong CRC... if(buffer[pos++]!=((crc>>8)&0xFF)) return 0; // wrong CRC...
if(buffer[pos]!=(crc&0xFF)) return 0; // wrong CRC... if(buffer[pos]!=(crc&0xFF)) return 0; // wrong CRC...
@ -561,12 +563,12 @@ uint8_t LT8910_ReadPayload(uint8_t* msg, uint8_t len)
return 1; return 1;
} }
void LT8910_WritePayload(uint8_t* msg, uint8_t len) void LT8900_WritePayload(uint8_t* msg, uint8_t len)
{ {
unsigned int crc=LT8910_CRC_Initial_Data,a,mask; unsigned int crc=LT8900_CRC_Initial_Data,a,mask;
uint8_t i, pos=0,tmp, buffer[64], pos_final,shift; uint8_t i, pos=0,tmp, buffer[64], pos_final,shift;
//Add packet len //Add packet len
if(LT8910_Flags&_BV(LT8910_PACKET_LENGTH_EN)) if(LT8900_Flags&_BV(LT8900_PACKET_LENGTH_EN))
{ {
tmp=bit_reverse(len); tmp=bit_reverse(len);
buffer[pos++]=tmp; buffer[pos++]=tmp;
@ -580,25 +582,25 @@ void LT8910_WritePayload(uint8_t* msg, uint8_t len)
crc=crc16_update(crc,tmp); crc=crc16_update(crc,tmp);
} }
//Add CRC //Add CRC
if(LT8910_Flags&_BV(LT8910_CRC_ON)) if(LT8900_Flags&_BV(LT8900_CRC_ON))
{ {
buffer[pos++]=crc>>8; buffer[pos++]=crc>>8;
buffer[pos++]=crc; buffer[pos++]=crc;
} }
//Shift everything to fit behind the trailer (4 to 18 bits) //Shift everything to fit behind the trailer (4 to 18 bits)
shift=LT8910_buffer_overhead_bits&0x7; shift=LT8900_buffer_overhead_bits&0x7;
pos_final=LT8910_buffer_overhead_bits/8; pos_final=LT8900_buffer_overhead_bits/8;
mask=~(0xFF<<(8-shift)); mask=~(0xFF<<(8-shift));
LT8910_buffer[pos_final+pos]=0xFF; LT8900_buffer[pos_final+pos]=0xFF;
for(i=pos-1;i!=0xFF;i--) for(i=pos-1;i!=0xFF;i--)
{ {
a=buffer[i]<<(8-shift); a=buffer[i]<<(8-shift);
LT8910_buffer[pos_final+i]=(LT8910_buffer[pos_final+i]&mask>>8)|a>>8; LT8900_buffer[pos_final+i]=(LT8900_buffer[pos_final+i]&mask>>8)|a>>8;
LT8910_buffer[pos_final+i+1]=(LT8910_buffer[pos_final+i+1]&mask)|a; LT8900_buffer[pos_final+i+1]=(LT8900_buffer[pos_final+i+1]&mask)|a;
} }
if(shift) if(shift)
pos++; pos++;
//Send everything //Send everything
NRF24L01_WritePayload(LT8910_buffer+LT8910_buffer_start,pos_final+pos-LT8910_buffer_start); NRF24L01_WritePayload(LT8900_buffer+LT8900_buffer_start,pos_final+pos-LT8900_buffer_start);
} }
// End of LT8910 emulation // End of LT8900 emulation

42
Multiprotocol/SHENQI_nrf24l01.ino
View File

@ -24,10 +24,10 @@ void SHENQI_init()
NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x03); // 5 bytes rx/tx address NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, 0x03); // 5 bytes rx/tx address
LT8910_Config(4, 8, _BV(LT8910_CRC_ON)|_BV(LT8910_PACKET_LENGTH_EN), 0xAA); LT8900_Config(4, 8, _BV(LT8900_CRC_ON)|_BV(LT8900_PACKET_LENGTH_EN), 0xAA);
LT8910_SetChannel(2); LT8900_SetChannel(2);
LT8910_SetAddress((uint8_t *)"\x9A\x9A\x9A\x9A",4); LT8900_SetAddress((uint8_t *)"\x9A\x9A\x9A\x9A",4);
LT8910_SetTxRxMode(RX_EN); LT8900_SetTxRxMode(RX_EN);
} }
void SHENQI_send_packet() void SHENQI_send_packet()
@ -36,32 +36,32 @@ void SHENQI_send_packet()
if(packet_count==0) if(packet_count==0)
{ {
uint8_t bind_addr[4]; uint8_t bind_addr[4];
bind_addr[0]=0x9A; bind_addr[0]=rx_tx_addr[0];
bind_addr[1]=0x9A; bind_addr[1]=rx_tx_addr[1];
bind_addr[2]=rx_tx_addr[2]; bind_addr[2]=0x9A;
bind_addr[3]=rx_tx_addr[3]; bind_addr[3]=0x9A;
LT8910_SetAddress(bind_addr,4); LT8900_SetAddress(bind_addr,4);
LT8910_SetChannel(2); LT8900_SetChannel(2);
packet[1]=rx_tx_addr[1]; packet[1]=rx_tx_addr[2];
packet[2]=rx_tx_addr[0]; packet[2]=rx_tx_addr[3];
packet_period=2508; packet_period=2508;
} }
else else
{ {
LT8910_SetAddress(rx_tx_addr,4); LT8900_SetAddress(rx_tx_addr,4);
packet[1]=255-convert_channel_8b(RUDDER); packet[1]=255-convert_channel_8b(RUDDER);
packet[2]=255-convert_channel_8b_scale(THROTTLE,0x60,0xA0); packet[2]=255-convert_channel_8b_scale(THROTTLE,0x60,0xA0);
uint8_t freq=pgm_read_byte_near(&SHENQI_Freq[hopping_frequency_no])+(rx_tx_addr[1]&0x0F); uint8_t freq=pgm_read_byte_near(&SHENQI_Freq[hopping_frequency_no])+(rx_tx_addr[2]&0x0F);
LT8910_SetChannel(freq); LT8900_SetChannel(freq);
hopping_frequency_no++; hopping_frequency_no++;
if(hopping_frequency_no==60) if(hopping_frequency_no==60)
hopping_frequency_no=0; hopping_frequency_no=0;
packet_period=1750; packet_period=1750;
} }
// Send packet + 1 retransmit - not sure why but needed (not present on original TX...) // Send packet + 1 retransmit - not sure why but needed (not present on original TX...)
LT8910_WritePayload(packet,3); LT8900_WritePayload(packet,3);
while(NRF24L01_packet_ack()!=PKT_ACKED); while(NRF24L01_packet_ack()!=PKT_ACKED);
LT8910_WritePayload(packet,3); LT8900_WritePayload(packet,3);
packet_count++; packet_count++;
if(packet_count==7) if(packet_count==7)
@ -81,12 +81,12 @@ uint16_t SHENQI_callback()
{ {
if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & BV(NRF24L01_07_RX_DR)) if( NRF24L01_ReadReg(NRF24L01_07_STATUS) & BV(NRF24L01_07_RX_DR))
{ {
if(LT8910_ReadPayload(packet, 3)) if(LT8900_ReadPayload(packet, 3))
{ {
BIND_DONE; BIND_DONE;
rx_tx_addr[3]=packet[1]; rx_tx_addr[0]=packet[1];
rx_tx_addr[2]=packet[2]; rx_tx_addr[1]=packet[2];
LT8910_SetTxRxMode(TX_EN); LT8900_SetTxRxMode(TX_EN);
packet_period=14000; packet_period=14000;
} }
NRF24L01_FlushRx(); NRF24L01_FlushRx();