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https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
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STM32 fix timer issues
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commit
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@ -19,7 +19,7 @@
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#define VERSION_MAJOR 1
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#define VERSION_MAJOR 1
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#define VERSION_MINOR 1
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#define VERSION_MINOR 1
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#define VERSION_REVISION 6
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#define VERSION_REVISION 6
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#define VERSION_PATCH_LEVEL 44
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#define VERSION_PATCH_LEVEL 45
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//******************
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//******************
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// Protocols
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// Protocols
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//******************
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//******************
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@ -53,7 +53,8 @@
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#include <libmaple/timer.h>
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#include <libmaple/timer.h>
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#include <SPI.h>
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#include <SPI.h>
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#include <EEPROM.h>
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#include <EEPROM.h>
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HardwareTimer timer(2);
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HardwareTimer HWTimer2(2);
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HardwareTimer HWTimer3(3);
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void PPM_decode();
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void PPM_decode();
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void ISR_COMPB();
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void ISR_COMPB();
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extern "C"
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extern "C"
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@ -270,8 +271,8 @@ void setup()
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pinMode(PB0, INPUT_ANALOG); // set up pin for analog input
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pinMode(PB0, INPUT_ANALOG); // set up pin for analog input
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pinMode(PB1, INPUT_ANALOG); // set up pin for analog input
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pinMode(PB1, INPUT_ANALOG); // set up pin for analog input
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//select the counter clock.
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//Timers
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start_timer2();//0.5us
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init_HWTimer(); //0.5us
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#else
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#else
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//ATMEGA328p
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//ATMEGA328p
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// all inputs
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// all inputs
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@ -494,7 +495,7 @@ void loop()
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#ifndef STM32_BOARD
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#ifndef STM32_BOARD
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TIFR1=OCF1A_bm; // clear compare A=callback flag
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TIFR1=OCF1A_bm; // clear compare A=callback flag
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#else
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#else
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TIMER2_BASE->SR &= ~TIMER_SR_CC1IF; //clear compare Flag
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TIMER2_BASE->SR &= ~TIMER_SR_CC1IF; // clear compare flag on channel 1
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#endif
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#endif
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sei(); // enable global int
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sei(); // enable global int
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if(Update_All()) // Protocol changed?
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if(Update_All()) // Protocol changed?
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@ -515,7 +516,7 @@ void loop()
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#ifndef STM32_BOARD
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#ifndef STM32_BOARD
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TIFR1=OCF1A_bm; // clear compare A=callback flag
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TIFR1=OCF1A_bm; // clear compare A=callback flag
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#else
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#else
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TIMER2_BASE->SR &= ~TIMER_SR_CC1IF; //clear compare Flag write zero
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TIMER2_BASE->SR &= ~TIMER_SR_CC1IF; // clear compare flag on channel 1
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#endif
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#endif
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diff=OCR1A-TCNT1; // compare timer and comparator
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diff=OCR1A-TCNT1; // compare timer and comparator
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sei(); // enable global int
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sei(); // enable global int
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@ -704,21 +705,6 @@ inline void tx_resume()
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#endif
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#endif
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}
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}
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#ifdef STM32_BOARD
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void start_timer2()
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{
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// Pause the timer while we're configuring it
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timer.pause();
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TIMER2_BASE->PSC = 35; //36-1;for 72 MHZ /0.5sec/(35+1)
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TIMER2_BASE->ARR = 0xFFFF; //count till max
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timer.setMode(TIMER_CH1, TIMER_OUTPUT_COMPARE);
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timer.setMode(TIMER_CH2, TIMER_OUTPUT_COMPARE);
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// Refresh the timer's count, prescale, and overflow
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timer.refresh();
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timer.resume();
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}
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#endif
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// Protocol start
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// Protocol start
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static void protocol_init()
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static void protocol_init()
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{
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{
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@ -1058,12 +1044,12 @@ static void protocol_init()
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}
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}
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cli(); // disable global int
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cli(); // disable global int
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OCR1A = TCNT1 + next_callback*2; // set compare A for callback
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OCR1A = TCNT1 + next_callback*2; // set compare A for callback
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sei(); // enable global int
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#ifndef STM32_BOARD
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#ifndef STM32_BOARD
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TIFR1 = OCF1A_bm ; // clear compare A flag
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TIFR1 = OCF1A_bm ; // clear compare A flag
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#else
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#else
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TIMER2_BASE->SR &= ~TIMER_SR_CC1IF; //clear compare Flag write zero
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TIMER2_BASE->SR &= ~TIMER_SR_CC1IF; //clear compare Flag write zero
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#endif
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#endif
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sei(); // enable global int
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BIND_BUTTON_FLAG_off; // do not bind/reset id anymore even if protocol change
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BIND_BUTTON_FLAG_off; // do not bind/reset id anymore even if protocol change
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}
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}
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@ -1280,6 +1266,28 @@ void modules_reset()
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usart_set_baud_rate(USART3, STM32_PCLK1, baud);
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usart_set_baud_rate(USART3, STM32_PCLK1, baud);
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usart_enable(USART3);
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usart_enable(USART3);
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}
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}
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void init_HWTimer()
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{
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// Pause the timer while we're configuring it
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HWTimer2.pause();
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TIMER2_BASE->PSC = 35; //36-1;for 72 MHZ /0.5sec/(35+1)
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TIMER2_BASE->ARR = 0xFFFF; //count till max
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HWTimer2.setMode(TIMER_CH1, TIMER_OUTPUT_COMPARE);
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// Refresh the timer's count, prescale, and overflow
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HWTimer2.refresh();
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HWTimer2.resume();
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HWTimer3.pause();
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TIMER3_BASE->PSC = 35; //36-1;for 72 MHZ /0.5sec/(35+1)
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TIMER3_BASE->ARR = 0xFFFF; //count till max
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HWTimer3.setMode(TIMER_CH2, TIMER_OUTPUT_COMPARE);
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TIMER3_BASE->SR &= ~TIMER_SR_CC2IF; // Clear Timer3/Comp2 interrupt flag
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HWTimer3.attachInterrupt(TIMER_CH2,ISR_COMPB); // assign function to Timer2/Comp2 interrupt
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TIMER3_BASE->DIER &= ~TIMER_DIER_CC2IE; // disable Timer2/Comp2 interrupt
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// Refresh the timer's count, prescale, and overflow
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HWTimer3.refresh();
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HWTimer3.resume();
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}
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#endif
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#endif
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#ifdef CHECK_FOR_BOOTLOADER
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#ifdef CHECK_FOR_BOOTLOADER
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@ -1500,10 +1508,9 @@ static uint32_t random_id(uint16_t address, uint8_t create_new)
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TX_RX_PAUSE_on;
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TX_RX_PAUSE_on;
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tx_pause();
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tx_pause();
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#if defined STM32_BOARD
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#if defined STM32_BOARD
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uint16_t OCR1B;
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TIMER3_BASE->CCR2=TIMER2_BASE->CNT+(6500L); // Full message should be received within timer of 3250us
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OCR1B =TCNT1+(6500L);
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TIMER3_BASE->SR &= ~TIMER_SR_CC2IF; // Clear Timer3/Comp2 interrupt flag
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timer.setCompare(TIMER_CH2,OCR1B);
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TIMER3_BASE->DIER |= TIMER_DIER_CC2IE; // Enable Timer3/Comp2 interrupt
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timer.attachInterrupt(TIMER_CH2,ISR_COMPB);
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#else
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#else
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OCR1B = TCNT1+(6500L) ; // Full message should be received within timer of 3250us
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OCR1B = TCNT1+(6500L) ; // Full message should be received within timer of 3250us
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TIFR1 = OCF1B_bm ; // clear OCR1B match flag
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TIFR1 = OCF1B_bm ; // clear OCR1B match flag
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@ -1537,12 +1544,7 @@ static uint32_t random_id(uint16_t address, uint8_t create_new)
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if(discard_frame==1)
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if(discard_frame==1)
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{
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{
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#ifdef STM32_BOARD
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#ifdef STM32_BOARD
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//For whatever reason the line below does not stop the interrupt to be called
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TIMER3_BASE->DIER &= ~TIMER_DIER_CC2IE; // Disable Timer3/Comp2 interrupt
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//timer.detachInterrupt(TIMER_CH2); // Disable interrupt on ch2
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//So I'm pushing the comparator out (32ms from now) so it does not come to interfer
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uint16_t OCR1B;
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OCR1B=TCNT1;
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timer.setCompare(TIMER_CH2,OCR1B);
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#else
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#else
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CLR_TIMSK1_OCIE1B; // Disable interrupt on compare B match
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CLR_TIMSK1_OCIE1B; // Disable interrupt on compare B match
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#endif
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#endif
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@ -1566,12 +1568,10 @@ static uint32_t random_id(uint16_t address, uint8_t create_new)
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{ // Timer1 compare B interrupt
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{ // Timer1 compare B interrupt
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discard_frame=1;
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discard_frame=1;
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#ifdef STM32_BOARD
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#ifdef STM32_BOARD
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//For whatever reason the line below does not stop the interrupt to be called
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TIMER3_BASE->DIER &= ~TIMER_DIER_CC2IE; // Disable Timer3/Comp2 interrupt
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//timer.detachInterrupt(TIMER_CH2); // Disable interrupt on ch2
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//So I leave the comparator as it is (32ms from now) so it does not come to interfer
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debugln("Bad frame timer");
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debugln("Bad frame timer");
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#else
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#else
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CLR_TIMSK1_OCIE1B; // Disable interrupt on compare B match
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CLR_TIMSK1_OCIE1B; // Disable interrupt on compare B match
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#endif
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#endif
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tx_resume();
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tx_resume();
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}
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}
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