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@@ -19,7 +19,6 @@
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//#define DSM_DEBUG_FWD_PGM
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//#define DEBUG_BIND 1
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//#define DSM_GR300
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#define CLONE_BIT_MASK 0x20
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@@ -110,7 +109,6 @@ static void __attribute__((unused)) DSM_build_bind_packet()
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#endif
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else // DSMX_2F && DSM_AUTO
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packet[12] = 0xb2; // DSMX/2048 2 packets
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packet[13] = 0x00; //???
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for(i = 8; i < 14; i++)
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@@ -137,8 +135,13 @@ static void __attribute__((unused)) DSM_update_channels()
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if(num_ch<3 || num_ch>12)
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num_ch=6; // Default to 6 channels if invalid choice...
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if(sub_protocol==DSMR && num_ch>7)
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num_ch=7; // Max 7 channels in DSMR
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#ifndef MULTI_AIR
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if(sub_protocol==DSMR && num_ch>7)
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num_ch=7; // Max 7 channels in DSMR
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if(sub_protocol==DSM2_SFC && num_ch>3)
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num_ch=3; // Max 3 channels in DSM2_SFC
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#endif
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// Create channel map based on number of channels and refresh rate
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uint8_t idx=num_ch-3;
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@@ -175,7 +178,7 @@ static void __attribute__((unused)) DSM_build_data_packet(uint8_t upper)
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}
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#ifndef MULTI_AIR
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if(sub_protocol == DSMR)
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if(sub_protocol == DSMR || sub_protocol == DSM2_SFC)
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{
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for (uint8_t i = 0; i < 7; i++)
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{
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@@ -266,12 +269,18 @@ static uint8_t __attribute__((unused)) DSM_Check_RX_packet()
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uint16_t DSM_callback()
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{
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#if defined MULTI_EU
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if(sub_protocol == DSM2_1F || sub_protocol == DSM2_2F)
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if(sub_protocol == DSM2_1F || sub_protocol == DSM2_2F || sub_protocol == DSM2_SFC)
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{
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SUB_PROTO_INVALID;
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return 11000;
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}
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#endif
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#if defined MULTI_AIR
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if(sub_protocol == DSMR)
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if(sub_protocol == DSMR || sub_protocol == DSM2_SFC)
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{
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SUB_PROTO_INVALID;
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return 11000;
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}
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#endif
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#define DSM_CH1_CH2_DELAY 4010 // Time between write of channel 1 and channel 2
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#ifdef STM32_BOARD
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@@ -286,11 +295,6 @@ uint16_t DSM_callback()
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#endif
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uint8_t start;
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#ifdef DSM_GR300
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uint16_t timing=5000+(convert_channel_8b(CH13)*100);
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debugln("T=%u",timing);
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#endif
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switch(phase)
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{
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case DSM_BIND_WRITE:
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@@ -371,18 +375,25 @@ uint16_t DSM_callback()
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CYRF_SetTxRxMode(TX_EN);
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hopping_frequency_no = 0;
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phase = DSM_CH1_WRITE_A; // in fact phase++
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#ifndef MULTI_AIR
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if(sub_protocol == DSMR)
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DSM_set_sop_data_crc(false, true);
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else
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#endif
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DSM_set_sop_data_crc(true, sub_protocol==DSMX_2F||sub_protocol==DSMX_1F); //prep CH1
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return 10000;
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case DSM_CH1_WRITE_A:
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#ifdef MULTI_SYNC
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telemetry_set_input_sync(11000); // Always request 11ms spacing even if we don't use half of it in 22ms mode
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if(sub_protocol!=DSM2_SFC)
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telemetry_set_input_sync(11000); // Always request 11ms spacing even if we don't use half of it in 22ms mode
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else
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telemetry_set_input_sync(6500);
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#endif
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#ifndef MULTI_AIR
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if(sub_protocol == DSMR)
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CYRF_SetPower(0x08); //Keep transmit power in sync
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else
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#endif
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CYRF_SetPower(0x28); //Keep transmit power in sync
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case DSM_CH1_WRITE_B:
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DSM_build_data_packet(phase == DSM_CH1_WRITE_B); // build lower or upper channels
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@@ -426,14 +437,14 @@ uint16_t DSM_callback()
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phase++; // change from CH2_CHECK to CH2_READ
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CYRF_SetTxRxMode(RX_EN); //Receive mode
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //0x80??? //Prepare to receive
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if(sub_protocol==DSMR)
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{
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phase = DSM_CH2_READ_B;
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return 11000 - DSM_WRITE_DELAY - DSM_READ_DELAY;
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}
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#ifdef DSM_GR300
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if(num_ch==3)
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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#ifndef MULTI_AIR
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if(sub_protocol==DSMR)
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{
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phase = DSM_CH2_READ_B;
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return 11000 - DSM_WRITE_DELAY - DSM_READ_DELAY;
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}
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if(sub_protocol==DSM2_SFC)
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return 6500 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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#endif
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return 11000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY - DSM_READ_DELAY;
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case DSM_CH2_READ_A:
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@@ -462,15 +473,15 @@ uint16_t DSM_callback()
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telemetry_link=1;
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}
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20); // Abort RX operation
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if (phase == DSM_CH2_READ_A && (sub_protocol==DSM2_1F || sub_protocol==DSMX_1F) && num_ch < 8) // 22ms mode
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if (phase == DSM_CH2_READ_A && (sub_protocol==DSM2_1F || sub_protocol==DSMX_1F || sub_protocol==DSM2_SFC) && num_ch < 8) // 22ms mode
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{
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CYRF_SetTxRxMode(RX_EN); // Force end state read
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CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00); // Clear abort RX operation
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CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x87); //0x80??? //Prepare to receive
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phase = DSM_CH2_READ_B;
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#ifdef DSM_GR300
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if(num_ch==3)
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return timing;
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#ifndef MULTI_AIR
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if(sub_protocol==DSM2_SFC)
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return 6500;
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#endif
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return 11000;
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}
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@@ -492,18 +503,18 @@ uint16_t DSM_callback()
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else
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{ //Normal mode 22ms
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phase = DSM_CH1_WRITE_A; // change from CH2_CHECK_A to CH1_WRITE_A (ie no upper)
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#ifdef DSM_GR300
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if(num_ch==3)
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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#ifndef MULTI_AIR
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if(sub_protocol==DSM2_SFC)
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return 6500 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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#endif
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return 22000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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}
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}
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else
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phase = DSM_CH1_WRITE_A; // change from CH2_CHECK_B to CH1_WRITE_A (upper already transmitted so transmit lower)
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#ifdef DSM_GR300
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if(num_ch==3)
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return timing - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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#ifndef MULTI_AIR
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if(sub_protocol==DSM2_SFC)
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return 6500 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY ;
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#endif
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return 11000 - DSM_CH1_CH2_DELAY - DSM_WRITE_DELAY;
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#endif
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@@ -547,15 +558,13 @@ void DSM_init()
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SUB_PROTO_INVALID;
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else
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{
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SUB_PROTO_VALID;
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//SUB_PROTO_VALID;
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uint8_t row = rx_tx_addr[3]%22;
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for(uint8_t i=0; i< 4; i++)
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cyrfmfg_id[i] = pgm_read_byte_near(&DSMR_ID_FREQ[row][i]);
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for(uint8_t i=0; i< 23; i++)
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hopping_frequency[i] = pgm_read_byte_near(&DSMR_ID_FREQ[row][i+4]);
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}
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#else
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SUB_PROTO_INVALID;
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#endif
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}
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else
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@@ -568,25 +577,25 @@ void DSM_init()
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uint16_t temp = DSM_CLONE_EEPROM_OFFSET;
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for(uint8_t i=0;i<4;i++)
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cyrfmfg_id[i] = eeprom_read_byte((EE_ADDR)temp++);
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#if DEBUG_BIND
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debugln("Using cloned ID");
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debug("Clone ID=")
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for(uint8_t i=0;i<4;i++)
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debug("%02x ", cyrfmfg_id[i]);
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debugln("");
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#endif
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#if DEBUG_BIND
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debugln("Using cloned ID");
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debug("Clone ID=")
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for(uint8_t i=0;i<4;i++)
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debug("%02x ", cyrfmfg_id[i]);
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debugln("");
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#endif
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}
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else
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{
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SUB_PROTO_INVALID;
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#if DEBUG_BIND
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#if DEBUG_BIND
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debugln("No valid cloned ID");
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#endif
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#endif
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}
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}
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else
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{
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SUB_PROTO_VALID;
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//SUB_PROTO_VALID;
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CYRF_GetMfgData(cyrfmfg_id);
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}
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}
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@@ -602,8 +611,8 @@ void DSM_init()
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//Fix for OrangeRX using wrong DSM_pncodes by preventing access to "Col 8"
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if(sop_col==0 && sub_protocol != DSMR)
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{
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cyrfmfg_id[rx_tx_addr[0]%3]^=0x01; //Change a bit so sop_col will be different from 0
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sop_col = (cyrfmfg_id[0] + cyrfmfg_id[1] + cyrfmfg_id[2] + 2) & 0x07;
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cyrfmfg_id[rx_tx_addr[0]%3]^=0x01; //Change a bit so sop_col will be different from 0
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sop_col = (cyrfmfg_id[0] + cyrfmfg_id[1] + cyrfmfg_id[2] + 2) & 0x07;
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}
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}
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@@ -639,10 +648,10 @@ void DSM_init()
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{
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DSM_initialize_bind_phase();
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phase = DSM_BIND_WRITE;
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bind_counter=DSM_BIND_COUNT;
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#if DEBUG_BIND
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debugln("Bind Started: write count=%d",bind_counter);
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#endif
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bind_counter=DSM_BIND_COUNT;
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#if DEBUG_BIND
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debugln("Bind Started: write count=%d",bind_counter);
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#endif
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}
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else
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phase = DSM_CHANSEL;
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