mirror of
https://github.com/pascallanger/DIY-Multiprotocol-TX-Module.git
synced 2025-07-13 10:17:55 +00:00
Enabling debug so I can test the actual protocol. Making changes to match those in an existing CFlie fork. Changing init flow so Binding actually completes. Packets are being sent, format is probably wrong.
This commit is contained in:
James Hagerman
parent
919cae26eb
commit
0377aa88e2
@ -187,7 +187,7 @@ enum {
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static void send_packet()
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{
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// clear packet status bits and Tx/Rx FIFOs
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NRF24L01_WriteReg(NRF24L01_07_STATUS, (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT)));
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NRF24L01_WriteReg(NRF24L01_07_STATUS, (_BV(NRF24L01_07_TX_DS) | _BV(NRF24L01_07_MAX_RT)));
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NRF24L01_FlushTx();
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NRF24L01_FlushRx();
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@ -213,6 +213,7 @@ static uint8_t packet_ack()
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{
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if (++dbg_cnt > 50) {
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// dbgprintf("S: %02x\n", NRF24L01_ReadReg(NRF24L01_07_STATUS));
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debugln("S: %02x\n", NRF24L01_ReadReg(NRF24L01_07_STATUS));
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dbg_cnt = 0;
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}
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switch (NRF24L01_ReadReg(NRF24L01_07_STATUS) & (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT))) {
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@ -395,18 +396,17 @@ static void send_crtp_cppm_emu_packet()
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cpkt.hdr.numAuxChannels = numAuxChannels;
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// Remap AETR to AERT (RPYT)
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cpkt.channelRoll = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(AILERON));
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cpkt.channelPitch = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(ELEVATOR));
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cpkt.channelYaw = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(RUDDER)); // T & R Swapped
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cpkt.channelThrust = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(THROTTLE));
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cpkt.channelRoll = convert_channel_10b(AILERON);
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cpkt.channelPitch = convert_channel_10b(ELEVATOR);
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// Note: T & R Swapped:
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cpkt.channelYaw = convert_channel_10b(RUDDER);
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cpkt.channelThrust = convert_channel_10b(THROTTLE);
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// Rescale the rest of the aux channels - RC channel 4 and up
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// TODO: Fix this if we care about PWM
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// uint8_t i;
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// for (i = 0; i < numAuxChannels; i++)
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// {
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// cpkt.channelAux[i] = RESCALE_RC_CHANNEL_TO_PWM(Channels[i + 4]);
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// }
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for (uint8_t i = 4; i < 14; i++)
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{
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cpkt.channelAux[i] = convert_channel_10b(i);
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}
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// Total size of the commander packet is a 1-byte header, 4 2-byte channels and
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// a variable number of 2-byte auxiliary channels
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@ -417,7 +417,7 @@ static void send_crtp_cppm_emu_packet()
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tx_packet[1] = CRTP_SETPOINT_GENERIC_CPPM_EMU_TYPE;
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// Copy the header (1) plus 4 2-byte channels (8) plus whatever number of 2-byte aux channels are in use
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memcpy(&tx_packet[2], (char*)&cpkt, commanderPacketSize);
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memcpy(&tx_packet[2], (char*)&cpkt, commanderPacketSize); // Why not use sizeof(cpkt) here??
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tx_payload_len = 2 + commanderPacketSize; // CRTP header, commander type, and packet
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send_packet();
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}
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@ -660,14 +660,14 @@ static int cflie_init()
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// CRC, radio on
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NRF24L01_SetTxRxMode(TX_EN);
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO) | BV(NRF24L01_00_PWR_UP));
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NRF24L01_WriteReg(NRF24L01_00_CONFIG, _BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP));
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NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x01); // Auto Acknowledgement for data pipe 0
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NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01); // Enable data pipe 0
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NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, TX_ADDR_SIZE-2); // 5-byte RX/TX address
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NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0x13); // 3 retransmits, 500us delay
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NRF24L01_WriteReg(NRF24L01_05_RF_CH, rf_channel); // Defined by model id
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NRF24L01_SetBitrate(data_rate); // Defined by model id
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NRF24L01_WriteReg(NRF24L01_05_RF_CH, rf_channel); // Defined in initialize_rx_tx_addr
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NRF24L01_SetBitrate(data_rate); // Defined in initialize_rx_tx_addr
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NRF24L01_SetPower();
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NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
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@ -691,8 +691,10 @@ static int cflie_init()
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// does something on nRF24L01
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NRF24L01_Activate(0x53); // magic for BK2421 bank switch
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// dbgprintf("Trying to switch banks\n");
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debugln("CFlie: Trying to switch banks\n");
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if (NRF24L01_ReadReg(NRF24L01_07_STATUS) & 0x80) {
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// dbgprintf("BK2421 detected\n");
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debugln("CFlie: BK2421 detected\n");
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long nul = 0;
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// Beken registers don't have such nice names, so we just mention
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// them by their numbers
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@ -716,9 +718,10 @@ static int cflie_init()
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NRF24L01_WriteRegisterMulti(0x04, (uint8_t *) "\xC7\x96\x9A\x1B", 4);
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NRF24L01_WriteRegisterMulti(0x04, (uint8_t *) "\xC1\x96\x9A\x1B", 4);
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}
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// else {
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else {
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// dbgprintf("nRF24L01 detected\n");
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// }
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debugln("CFlie: nRF24L01 detected");
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}
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NRF24L01_Activate(0x53); // switch bank back
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// 50ms delay in callback
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@ -821,6 +824,7 @@ static uint16_t cflie_callback()
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phase = CFLIE_DATA;
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// PROTOCOL_SetBindState(0);
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// MUSIC_Play(MUSIC_DONE_BINDING);
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BIND_DONE;
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break;
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case PKT_TIMEOUT:
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send_search_packet();
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@ -874,14 +878,24 @@ static uint8_t initialize_rx_tx_addr()
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// return CFLIE_INIT_DATA;
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// }
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// } else {
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data_rate = NRF24L01_BR_250K;
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rf_channel = 0;
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return CFLIE_INIT_SEARCH;
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// data_rate = NRF24L01_BR_250K;
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// rf_channel = 10;
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// return CFLIE_INIT_SEARCH;
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// }
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// Default 1
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data_rate = NRF24L01_BR_1M;
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rf_channel = 10;
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// Default 2
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// data_rate = NRF24L01_BR_2M;
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// rf_channel = 110;
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return CFLIE_INIT_SEARCH;
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}
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uint16_t initCFlie(void)
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{
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BIND_IN_PROGRESS; // autobind protocol
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phase = initialize_rx_tx_addr();
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@ -890,6 +904,8 @@ uint16_t initCFlie(void)
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int delay = cflie_init();
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debugln("CFlie init!");
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return delay;
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}
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@ -19,7 +19,7 @@
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#define VERSION_MAJOR 1
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#define VERSION_MINOR 2
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#define VERSION_REVISION 0
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#define VERSION_PATCH_LEVEL 17
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#define VERSION_PATCH_LEVEL 18
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//******************
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// Protocols
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//******************
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@ -557,6 +557,7 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
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ESKY150 35
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H8_3D 36
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CORONA 37
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CFlie 38
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BindBit=> 0x80 1=Bind/0=No
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AutoBindBit=> 0x40 1=Yes /0=No
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RangeCheck=> 0x20 1=Yes /0=No
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@ -23,7 +23,7 @@
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#include <avr/pgmspace.h>
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//#define DEBUG_PIN // Use pin TX for AVR and SPI_CS for STM32 => DEBUG_PIN_on, DEBUG_PIN_off, DEBUG_PIN_toggle
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//#define DEBUG_SERIAL // Only for STM32_BOARD compiled with Upload method "Serial"->usart1, "STM32duino bootloader"->USB serial
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#define DEBUG_SERIAL // Only for STM32_BOARD compiled with Upload method "Serial"->usart1, "STM32duino bootloader"->USB serial
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#ifdef __arm__ // Let's automatically select the board if arm is selected
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#define STM32_BOARD
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@ -1066,12 +1066,6 @@ static void protocol_init()
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remote_callback = BAYANG_callback;
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break;
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#endif
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#if defined(CFLIE_NRF24L01_INO)
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case PROTO_CFLIE:
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next_callback=initCFlie();
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remote_callback = cflie_callback;
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break;
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#endif
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#if defined(ESKY_NRF24L01_INO)
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case PROTO_ESKY:
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next_callback=initESKY();
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@ -1156,6 +1150,12 @@ static void protocol_init()
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remote_callback = H8_3D_callback;
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break;
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#endif
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#if defined(CFLIE_NRF24L01_INO)
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case PROTO_CFLIE:
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next_callback=initCFlie();
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remote_callback = cflie_callback;
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break;
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#endif
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#endif
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}
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}
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@ -171,6 +171,7 @@
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#undef CABELL_NRF24L01_INO
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#undef ESKY150_NRF24L01_INO
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#undef H8_3D_NRF24L01_INO
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#undef CFLIE_NRF24L01_INO
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#endif
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//Make sure telemetry is selected correctly
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@ -166,7 +166,6 @@
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//The protocols below need a NRF24L01 to be installed
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#define BAYANG_NRF24L01_INO
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#define CFLIE_NRF24L01_INO
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#define CG023_NRF24L01_INO
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#define CX10_NRF24L01_INO // Include Q2X2 protocol
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#define ESKY_NRF24L01_INO
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@ -189,6 +188,7 @@
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#define CABELL_NRF24L01_INO
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#define ESKY150_NRF24L01_INO
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#define H8_3D_NRF24L01_INO
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#define CFLIE_NRF24L01_INO
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/**************************/
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@ -544,6 +544,8 @@ const PPM_Parameters PPM_prot[14*NBR_BANKS]= {
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PROTO_CORONA
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COR_V1
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COR_V2
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PROTO_CFLIE
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NONE
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*/
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// RX_Num is used for TX & RX match. Using different RX_Num values for each receiver will prevent starting a model with the false config loaded...
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