From 0377aa88e267398ce4e06f7ad5d791f3959d5a5f Mon Sep 17 00:00:00 2001
From: James Hagerman <james.hagerman@gmail.com>
Date: Mon, 26 Mar 2018 00:03:00 -0700
Subject: [PATCH] Enabling debug so I can test the actual protocol. Making
 changes to match those in an existing CFlie fork. Changing init flow so
 Binding actually completes. Packets are being sent, format is probably wrong.

---
 Multiprotocol/CFlie_nrf24l01.ino | 56 ++++++++++++++++++++------------
 Multiprotocol/Multiprotocol.h    |  3 +-
 Multiprotocol/Multiprotocol.ino  | 14 ++++----
 Multiprotocol/Validate.h         |  1 +
 Multiprotocol/_Config.h          |  4 ++-
 5 files changed, 49 insertions(+), 29 deletions(-)

diff --git a/Multiprotocol/CFlie_nrf24l01.ino b/Multiprotocol/CFlie_nrf24l01.ino
index 8c46ee6..c476b10 100644
--- a/Multiprotocol/CFlie_nrf24l01.ino
+++ b/Multiprotocol/CFlie_nrf24l01.ino
@@ -187,7 +187,7 @@ enum {
 static void send_packet()
 {
     // clear packet status bits and Tx/Rx FIFOs
-    NRF24L01_WriteReg(NRF24L01_07_STATUS, (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT)));
+    NRF24L01_WriteReg(NRF24L01_07_STATUS, (_BV(NRF24L01_07_TX_DS) | _BV(NRF24L01_07_MAX_RT)));
     NRF24L01_FlushTx();
     NRF24L01_FlushRx();
 
@@ -213,6 +213,7 @@ static uint8_t packet_ack()
 {
     if (++dbg_cnt > 50) {
         // dbgprintf("S: %02x\n", NRF24L01_ReadReg(NRF24L01_07_STATUS));
+        debugln("S: %02x\n", NRF24L01_ReadReg(NRF24L01_07_STATUS));
         dbg_cnt = 0;
     }
     switch (NRF24L01_ReadReg(NRF24L01_07_STATUS) & (BV(NRF24L01_07_TX_DS) | BV(NRF24L01_07_MAX_RT))) {
@@ -395,18 +396,17 @@ static void send_crtp_cppm_emu_packet()
     cpkt.hdr.numAuxChannels = numAuxChannels;
 
     // Remap AETR to AERT (RPYT)
-    cpkt.channelRoll = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(AILERON));
-    cpkt.channelPitch = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(ELEVATOR));
-    cpkt.channelYaw = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(RUDDER)); // T & R Swapped
-    cpkt.channelThrust = RESCALE_RC_CHANNEL_TO_PWM(convert_channel_10b(THROTTLE));
+    cpkt.channelRoll = convert_channel_10b(AILERON);
+    cpkt.channelPitch = convert_channel_10b(ELEVATOR);
+    // Note: T & R Swapped:
+    cpkt.channelYaw = convert_channel_10b(RUDDER);
+    cpkt.channelThrust = convert_channel_10b(THROTTLE);
 
     // Rescale the rest of the aux channels - RC channel 4 and up
-    // TODO: Fix this if we care about PWM
-    // uint8_t i;
-    // for (i = 0; i < numAuxChannels; i++)
-    // {
-    //     cpkt.channelAux[i] = RESCALE_RC_CHANNEL_TO_PWM(Channels[i + 4]);
-    // }
+    for (uint8_t i = 4; i < 14; i++)
+    {
+        cpkt.channelAux[i] = convert_channel_10b(i);
+    }
 
     // Total size of the commander packet is a 1-byte header, 4 2-byte channels and
     // a variable number of 2-byte auxiliary channels
@@ -417,7 +417,7 @@ static void send_crtp_cppm_emu_packet()
     tx_packet[1] = CRTP_SETPOINT_GENERIC_CPPM_EMU_TYPE;
 
     // Copy the header (1) plus 4 2-byte channels (8) plus whatever number of 2-byte aux channels are in use
-    memcpy(&tx_packet[2], (char*)&cpkt, commanderPacketSize);
+    memcpy(&tx_packet[2], (char*)&cpkt, commanderPacketSize); // Why not use sizeof(cpkt) here??
     tx_payload_len = 2 + commanderPacketSize; // CRTP header, commander type, and packet
     send_packet();
 }
@@ -660,14 +660,14 @@ static int cflie_init()
 
     // CRC, radio on
     NRF24L01_SetTxRxMode(TX_EN);
-    NRF24L01_WriteReg(NRF24L01_00_CONFIG, BV(NRF24L01_00_EN_CRC) | BV(NRF24L01_00_CRCO) | BV(NRF24L01_00_PWR_UP)); 
+    NRF24L01_WriteReg(NRF24L01_00_CONFIG, _BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP)); 
     NRF24L01_WriteReg(NRF24L01_01_EN_AA, 0x01);              // Auto Acknowledgement for data pipe 0
     NRF24L01_WriteReg(NRF24L01_02_EN_RXADDR, 0x01);          // Enable data pipe 0
     NRF24L01_WriteReg(NRF24L01_03_SETUP_AW, TX_ADDR_SIZE-2); // 5-byte RX/TX address
     NRF24L01_WriteReg(NRF24L01_04_SETUP_RETR, 0x13);         // 3 retransmits, 500us delay
 
-    NRF24L01_WriteReg(NRF24L01_05_RF_CH, rf_channel);        // Defined by model id
-    NRF24L01_SetBitrate(data_rate);                          // Defined by model id
+    NRF24L01_WriteReg(NRF24L01_05_RF_CH, rf_channel);        // Defined in initialize_rx_tx_addr
+    NRF24L01_SetBitrate(data_rate);                          // Defined in initialize_rx_tx_addr
 
     NRF24L01_SetPower();
     NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);             // Clear data ready, data sent, and retransmit
@@ -691,8 +691,10 @@ static int cflie_init()
     // does something on nRF24L01
     NRF24L01_Activate(0x53); // magic for BK2421 bank switch
     // dbgprintf("Trying to switch banks\n");
+    debugln("CFlie: Trying to switch banks\n");
     if (NRF24L01_ReadReg(NRF24L01_07_STATUS) & 0x80) {
         // dbgprintf("BK2421 detected\n");
+        debugln("CFlie: BK2421 detected\n");
         long nul = 0;
         // Beken registers don't have such nice names, so we just mention
         // them by their numbers
@@ -716,9 +718,10 @@ static int cflie_init()
         NRF24L01_WriteRegisterMulti(0x04, (uint8_t *) "\xC7\x96\x9A\x1B", 4);
         NRF24L01_WriteRegisterMulti(0x04, (uint8_t *) "\xC1\x96\x9A\x1B", 4);
     }
-    //  else {
+     else {
     //     dbgprintf("nRF24L01 detected\n");
-    // }
+        debugln("CFlie: nRF24L01 detected");
+    }
     NRF24L01_Activate(0x53); // switch bank back
 
     // 50ms delay in callback
@@ -821,6 +824,7 @@ static uint16_t cflie_callback()
             phase = CFLIE_DATA;
             // PROTOCOL_SetBindState(0);
             // MUSIC_Play(MUSIC_DONE_BINDING);
+            BIND_DONE;
             break;
         case PKT_TIMEOUT:
             send_search_packet();
@@ -874,14 +878,24 @@ static uint8_t initialize_rx_tx_addr()
     //         return CFLIE_INIT_DATA;
     //     }
     // } else {
-        data_rate = NRF24L01_BR_250K;
-        rf_channel = 0;
-        return CFLIE_INIT_SEARCH;
+    //     data_rate = NRF24L01_BR_250K;
+    //     rf_channel = 10;
+    //     return CFLIE_INIT_SEARCH;
     // }
+
+    // Default 1
+    data_rate = NRF24L01_BR_1M;
+    rf_channel = 10;
+
+    // Default 2
+    // data_rate = NRF24L01_BR_2M;
+    // rf_channel = 110;
+    return CFLIE_INIT_SEARCH;
 }
 
 uint16_t initCFlie(void)
 {
+    
 	BIND_IN_PROGRESS;	// autobind protocol
 
     phase = initialize_rx_tx_addr();
@@ -890,6 +904,8 @@ uint16_t initCFlie(void)
 
     int delay = cflie_init();
 
+    debugln("CFlie init!");
+
 	return delay;
 }
 
diff --git a/Multiprotocol/Multiprotocol.h b/Multiprotocol/Multiprotocol.h
index 3bb212b..a082d0b 100644
--- a/Multiprotocol/Multiprotocol.h
+++ b/Multiprotocol/Multiprotocol.h
@@ -19,7 +19,7 @@
 #define VERSION_MAJOR		1
 #define VERSION_MINOR		2
 #define VERSION_REVISION	0
-#define VERSION_PATCH_LEVEL	17
+#define VERSION_PATCH_LEVEL	18
 //******************
 // Protocols
 //******************
@@ -557,6 +557,7 @@ Serial: 100000 Baud 8e2      _ xxxx xxxx p --
 					ESKY150		35
 					H8_3D		36
 					CORONA		37
+					CFlie		38
    BindBit=>		0x80	1=Bind/0=No
    AutoBindBit=>	0x40	1=Yes /0=No
    RangeCheck=>		0x20	1=Yes /0=No
diff --git a/Multiprotocol/Multiprotocol.ino b/Multiprotocol/Multiprotocol.ino
index 00e4b6b..377e3cb 100644
--- a/Multiprotocol/Multiprotocol.ino
+++ b/Multiprotocol/Multiprotocol.ino
@@ -23,7 +23,7 @@
 #include <avr/pgmspace.h>
 
 //#define DEBUG_PIN		// Use pin TX for AVR and SPI_CS for STM32 => DEBUG_PIN_on, DEBUG_PIN_off, DEBUG_PIN_toggle
-//#define DEBUG_SERIAL	// Only for STM32_BOARD compiled with Upload method "Serial"->usart1, "STM32duino bootloader"->USB serial
+#define DEBUG_SERIAL	// Only for STM32_BOARD compiled with Upload method "Serial"->usart1, "STM32duino bootloader"->USB serial
 
 #ifdef __arm__			// Let's automatically select the board if arm is selected
 	#define STM32_BOARD
@@ -1066,12 +1066,6 @@ static void protocol_init()
 						remote_callback = BAYANG_callback;
 						break;
 				#endif
-				#if defined(CFLIE_NRF24L01_INO)
-					case PROTO_CFLIE:
-						next_callback=initCFlie();
-						remote_callback = cflie_callback;
-						break;
-				#endif
 				#if defined(ESKY_NRF24L01_INO)
 					case PROTO_ESKY:
 						next_callback=initESKY();
@@ -1156,6 +1150,12 @@ static void protocol_init()
 						remote_callback = H8_3D_callback;
 						break;
 				#endif
+				#if defined(CFLIE_NRF24L01_INO)
+					case PROTO_CFLIE:
+						next_callback=initCFlie();
+						remote_callback = cflie_callback;
+						break;
+				#endif
 			#endif
 		}
 	}
diff --git a/Multiprotocol/Validate.h b/Multiprotocol/Validate.h
index e732468..6252ee9 100644
--- a/Multiprotocol/Validate.h
+++ b/Multiprotocol/Validate.h
@@ -171,6 +171,7 @@
 	#undef	CABELL_NRF24L01_INO
 	#undef	ESKY150_NRF24L01_INO
 	#undef	H8_3D_NRF24L01_INO
+	#undef	CFLIE_NRF24L01_INO
 #endif
 
 //Make sure telemetry is selected correctly
diff --git a/Multiprotocol/_Config.h b/Multiprotocol/_Config.h
index ee6ccfa..06cfb90 100644
--- a/Multiprotocol/_Config.h
+++ b/Multiprotocol/_Config.h
@@ -166,7 +166,6 @@
 
 //The protocols below need a NRF24L01 to be installed
 #define	BAYANG_NRF24L01_INO
-#define CFLIE_NRF24L01_INO
 #define	CG023_NRF24L01_INO
 #define	CX10_NRF24L01_INO		// Include Q2X2 protocol
 #define	ESKY_NRF24L01_INO
@@ -189,6 +188,7 @@
 #define	CABELL_NRF24L01_INO
 #define	ESKY150_NRF24L01_INO
 #define	H8_3D_NRF24L01_INO
+#define CFLIE_NRF24L01_INO
 
 
 /**************************/
@@ -544,6 +544,8 @@ const PPM_Parameters PPM_prot[14*NBR_BANKS]=	{
 	PROTO_CORONA
 		COR_V1
 		COR_V2
+	PROTO_CFLIE
+		NONE
 */
 
 // RX_Num is used for TX & RX match. Using different RX_Num values for each receiver will prevent starting a model with the false config loaded...