gomaomao/DIY-Multiprotocol-TX-Module
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E016 fix

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Pascal Langer 2019-04-02 09:16:13 +02:00
parent c250c91ab4
commit 0095071ebf
5 changed files with 101 additions and 36 deletions
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9
Multiprotocol/E01X_nrf24l01.ino
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@ -184,7 +184,7 @@ static void __attribute__((unused)) E01X_send_packet(uint8_t bind)
// trim commands // trim commands
packet[0] = 0; packet[0] = 0;
// aileron // aileron
uint16_t val = convert_channel_16b_limit(AILERON, 0x3ff, 0); uint16_t val = convert_channel_16b_limit(AILERON, 0, 0x3ff);
can_flip |= (val < 0x100) || (val > 0x300); can_flip |= (val < 0x100) || (val > 0x300);
packet[1] = val >> 8; packet[1] = val >> 8;
packet[2] = val & 0xff; packet[2] = val & 0xff;
@ -198,7 +198,7 @@ static void __attribute__((unused)) E01X_send_packet(uint8_t bind)
packet[5] = val >> 8; packet[5] = val >> 8;
packet[6] = val & 0xff; packet[6] = val & 0xff;
// rudder // rudder
val = convert_channel_16b_limit(RUDDER, 0x3ff, 0); val = convert_channel_16b_limit(RUDDER, 0, 0x3ff);
packet[7] = val >> 8; packet[7] = val >> 8;
packet[8] = val & 0xff; packet[8] = val & 0xff;
// flags // flags
@ -226,7 +226,10 @@ static void __attribute__((unused)) E01X_send_packet(uint8_t bind)
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
NRF24L01_FlushTx(); NRF24L01_FlushTx();
HS6200_WritePayload(packet, packet_length); if(sub_protocol==E016H)
XN297_WritePayload(packet, packet_length);
else
HS6200_WritePayload(packet, packet_length);
// Check and adjust transmission power. We do this after // Check and adjust transmission power. We do this after
// transmission to not bother with timeout after power // transmission to not bother with timeout after power

113
Multiprotocol/GD00X_nrf24l01.ino
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@ -26,40 +26,77 @@ Multiprotocol is distributed in the hope that it will be useful,
#define GD00X_PAYLOAD_SIZE 15 #define GD00X_PAYLOAD_SIZE 15
#define GD00X_BIND_COUNT 857 //3sec #define GD00X_BIND_COUNT 857 //3sec
#define GD00X_V2_BIND_PACKET_PERIOD 1700
#define GD00X_V2_RF_BIND_CHANNEL 0x43 //works on 0x43 0x53 0x63
#define GD00X_V2_PAYLOAD_SIZE 6
// flags going to packet[11] // flags going to packet[11]
#define GD00X_FLAG_DR 0x08 #define GD00X_FLAG_DR 0x08
#define GD00X_FLAG_LIGHT 0x04 #define GD00X_FLAG_LIGHT 0x04
// flags going to packet[4]
#define GD00X_V2_FLAG_DR 0x80
#define GD00X_V2_FLAG_LIGHT 0x40
static void __attribute__((unused)) GD00X_send_packet() static void __attribute__((unused)) GD00X_send_packet()
{ {
packet[0] = IS_BIND_IN_PROGRESS?0xAA:0x55; if(sub_protocol==GD_V1)
memcpy(packet+1,rx_tx_addr,4); {
uint16_t channel=convert_channel_ppm(AILERON); packet[0] = IS_BIND_IN_PROGRESS?0xAA:0x55;
packet[5 ] = channel; memcpy(packet+1,rx_tx_addr,4);
packet[6 ] = channel>>8; uint16_t channel=convert_channel_ppm(AILERON);
channel=convert_channel_ppm(THROTTLE); packet[5 ] = channel;
packet[7 ] = channel; packet[6 ] = channel>>8;
packet[8 ] = channel>>8; channel=convert_channel_ppm(THROTTLE);
channel=convert_channel_ppm(CH5); // TRIM packet[7 ] = channel;
packet[9 ] = channel; packet[8 ] = channel>>8;
packet[10] = channel>>8; channel=convert_channel_ppm(CH5); // TRIM
packet[11] = GD00X_FLAG_DR // Force high rate packet[9 ] = channel;
| GET_FLAG(CH6_SW, GD00X_FLAG_LIGHT); packet[10] = channel>>8;
packet[12] = 0x00; packet[11] = GD00X_FLAG_DR // Force high rate
packet[13] = 0x00; | GET_FLAG(CH6_SW, GD00X_FLAG_LIGHT);
packet[14] = 0x00; packet[12] = 0x00;
packet[13] = 0x00;
packet[14] = 0x00;
}
else
{//GD_V2
if(IS_BIND_IN_PROGRESS)
{
packet[0]=0x65;
packet[1]=0x00;
packet[2]=0x00;
packet[3]=0x95;
packet[4]='G';
}
else
{
packet[0]=convert_channel_16b_limit(THROTTLE,0,100); // 0..100
packet[1]=0x3F-(convert_channel_8b(AILERON)>>2); // 0x3F..0x20..0x00
packet[2]=0x20; // Trim: 0x3F..0x20..0x00
packet[4]=((packet_counter>>1)%5)
| GD00X_V2_FLAG_DR
| GET_FLAG(CH6_SW, GD00X_V2_FLAG_LIGHT);
packet[3]=(packet[0]+packet[1]+packet[2]+packet[4])^0x65;
packet_counter++;
packet_period=1350;
}
packet[5]='D';
}
// Power on, TX mode, CRC enabled // Power on, TX mode, CRC enabled
XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP)); XN297_Configure(_BV(NRF24L01_00_EN_CRC) | _BV(NRF24L01_00_CRCO) | _BV(NRF24L01_00_PWR_UP));
if(IS_BIND_DONE) if(IS_BIND_DONE)
{ {
if(sub_protocol==GD_V2)
hopping_frequency_no = 3;
NRF24L01_WriteReg(NRF24L01_05_RF_CH, hopping_frequency[hopping_frequency_no++]); NRF24L01_WriteReg(NRF24L01_05_RF_CH, hopping_frequency[hopping_frequency_no++]);
hopping_frequency_no &= 3; // 4 RF channels hopping_frequency_no &= 3; // 4 RF channels
} }
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70);
NRF24L01_FlushTx(); NRF24L01_FlushTx();
XN297_WritePayload(packet, GD00X_PAYLOAD_SIZE); XN297_WritePayload(packet, packet_length);
NRF24L01_SetPower(); // Set tx_power NRF24L01_SetPower(); // Set tx_power
} }
@ -68,8 +105,12 @@ static void __attribute__((unused)) GD00X_init()
{ {
NRF24L01_Initialize(); NRF24L01_Initialize();
NRF24L01_SetTxRxMode(TX_EN); NRF24L01_SetTxRxMode(TX_EN);
XN297_SetTXAddr((uint8_t*)"\xcc\xcc\xcc\xcc\xcc", 5); if(sub_protocol==GD_V1)
NRF24L01_WriteReg(NRF24L01_05_RF_CH, GD00X_RF_BIND_CHANNEL); // Bind channel XN297_SetTXAddr((uint8_t*)"\xcc\xcc\xcc\xcc\xcc", 5);
else
XN297_SetTXAddr((uint8_t*)"GDKNx", 5);
NRF24L01_WriteReg(NRF24L01_05_RF_CH, sub_protocol==GD_V1?GD00X_RF_BIND_CHANNEL:GD00X_V2_RF_BIND_CHANNEL); // Bind channel
NRF24L01_FlushTx(); NRF24L01_FlushTx();
NRF24L01_FlushRx(); NRF24L01_FlushRx();
NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit NRF24L01_WriteReg(NRF24L01_07_STATUS, 0x70); // Clear data ready, data sent, and retransmit
@ -81,17 +122,27 @@ static void __attribute__((unused)) GD00X_init()
static void __attribute__((unused)) GD00X_initialize_txid() static void __attribute__((unused)) GD00X_initialize_txid()
{ {
uint8_t start=76+(rx_tx_addr[0]&0x03); if(sub_protocol==GD_V1)
for(uint8_t i=0; i<4;i++) {
hopping_frequency[i]=start-(i<<1); uint8_t start=76+(rx_tx_addr[0]&0x03);
#ifdef FORCE_GD00X_ORIGINAL_ID
rx_tx_addr[0]=0x1F; // or 0xA5 or 0x26
rx_tx_addr[1]=0x39; // or 0x37 or 0x35
rx_tx_addr[2]=0x12; // Constant on 3 TXs
rx_tx_addr[3]=0x13; // Constant on 3 TXs
for(uint8_t i=0; i<4;i++) for(uint8_t i=0; i<4;i++)
hopping_frequency[i]=79-(i<<1); // or 77 or 78 hopping_frequency[i]=start-(i<<1);
#endif #ifdef FORCE_GD00X_ORIGINAL_ID
rx_tx_addr[0]=0x1F; // or 0xA5 or 0x26
rx_tx_addr[1]=0x39; // or 0x37 or 0x35
rx_tx_addr[2]=0x12; // Constant on 3 TXs
rx_tx_addr[3]=0x13; // Constant on 3 TXs
for(uint8_t i=0; i<4;i++)
hopping_frequency[i]=79-(i<<1); // or 77 or 78
#endif
}
else
{
hopping_frequency[0]=0x45;
hopping_frequency[1]=0x59;
hopping_frequency[2]=0x65;
hopping_frequency[3]=0x6d;
}
} }
uint16_t GD00X_callback() uint16_t GD00X_callback()
@ -100,7 +151,7 @@ uint16_t GD00X_callback()
if(--bind_counter==0) if(--bind_counter==0)
BIND_DONE; BIND_DONE;
GD00X_send_packet(); GD00X_send_packet();
return GD00X_PACKET_PERIOD; return packet_period;
} }
uint16_t initGD00X() uint16_t initGD00X()
@ -110,6 +161,8 @@ uint16_t initGD00X()
GD00X_init(); GD00X_init();
hopping_frequency_no = 0; hopping_frequency_no = 0;
bind_counter=GD00X_BIND_COUNT; bind_counter=GD00X_BIND_COUNT;
packet_period=sub_protocol==GD_V1?GD00X_PACKET_PERIOD:GD00X_V2_BIND_PACKET_PERIOD;
packet_length=sub_protocol==GD_V1?GD00X_PAYLOAD_SIZE:GD00X_V2_PAYLOAD_SIZE;
return GD00X_INITIAL_WAIT; return GD00X_INITIAL_WAIT;
} }

2
Multiprotocol/Multi.txt
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@ -44,5 +44,5 @@
44,NCC1701 44,NCC1701
45,E01X,E012,E015,E016H 45,E01X,E012,E015,E016H
46,V911S 46,V911S
47,GD00X 47,GD00X,V1,V2
63,Test 63,Test

10
Multiprotocol/Multiprotocol.h
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@ -19,7 +19,7 @@
#define VERSION_MAJOR 1 #define VERSION_MAJOR 1
#define VERSION_MINOR 2 #define VERSION_MINOR 2
#define VERSION_REVISION 1 #define VERSION_REVISION 1
#define VERSION_PATCH_LEVEL 29 #define VERSION_PATCH_LEVEL 30
//****************** //******************
// Protocols // Protocols
@ -256,6 +256,11 @@ enum E01X
E015 = 1, E015 = 1,
E016H = 2, E016H = 2,
}; };
enum PROTO_GD00X
{
GD_V1 = 0,
GD_V2 = 1,
};
#define NONE 0 #define NONE 0
#define P_HIGH 1 #define P_HIGH 1
@ -729,6 +734,9 @@ Serial: 100000 Baud 8e2 _ xxxx xxxx p --
E012 0 E012 0
E015 1 E015 1
E016H 2 E016H 2
sub_protocol==GD00X
GD_V1 0
GD_V2 1
Power value => 0x80 0=High/1=Low Power value => 0x80 0=High/1=Low
Stream[3] = option_protocol; Stream[3] = option_protocol;

3
Multiprotocol/_Config.h
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@ -528,7 +528,8 @@ const PPM_Parameters PPM_prot[14*NBR_BANKS]= {
FY326 FY326
FY319 FY319
PROTO_GD00X PROTO_GD00X
NONE GD_V1
GD_V2
PROTO_GW008 PROTO_GW008
NONE NONE
PROTO_H8_3D PROTO_H8_3D