2019-09-04 13:57:07 +02:00
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/*
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This project is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Multiprotocol is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Multiprotocol. If not, see <http://www.gnu.org/licenses/>.
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*/
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#if defined(SCANNER_CC2500_INO)
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// Ported from DeviationTX frequency scanner
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#include "iface_cc2500.h"
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struct Scanner {
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uint8_t rssi[255];
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uint8_t chan_min;
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uint8_t chan_max;
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uint16_t averaging;
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} Scanner;
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#define MIN_RADIOCHANNEL 0x00
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#define MAX_RADIOCHANNEL 255 //0x62
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#define CHANNEL_LOCK_TIME 300 // slow scan_channel requires 270 usec for synthesizer to settle
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#define INTERNAL_AVERAGE 1
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#define AVERAGE_INTVL 50
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static int scan_averages, scan_channel, scan_state;
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static uint32_t rssi_sum;
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static uint8_t calibration[MAX_RADIOCHANNEL];
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static uint8_t calibration_fscal2, calibration_fscal3;
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enum ScanStates {
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SCAN_CHANNEL_CHANGE = 0,
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SCAN_GET_RSSI = 1,
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};
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static void __attribute__((unused)) Scanner_cc2500_init()
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{
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/* Initialize CC2500 chip */
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/*CC2500_WriteReg(0x30, 0x3d); // soft reset
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CC2500_WriteReg(CC2500_07_PKTCTRL1, 0x00); // packet automation control
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x00); // packet automation control
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CC2500_WriteReg(CC2500_0A_CHANNR, 0x00); // scan_channel number
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x08); // frequency synthesizer control
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CC2500_WriteReg(CC2500_0C_FSCTRL0, 0x00); // frequency synthesizer control
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // frequency control word, high byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // frequency control word, middle byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xDE); // frequency control word, low byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x86); // modem configuration
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x83); // modem configuration
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x00); // modem configuration FSK for better sensitivity
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // modem configuration
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xA4); // modem configuration
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CC2500_WriteReg(CC2500_15_DEVIATN, 0x44); // modem deviation setting 38.085938
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CC2500_WriteReg(CC2500_17_MCSM1, 0x0F); // always stay in RX mode
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // disable auto-calibration
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x16); // frequency offset compensation configuration
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CC2500_WriteReg(CC2500_1A_BSCFG, 0x6C); // bit synchronization configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x03); // agc control
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x40); // agc control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91); // agc control
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CC2500_WriteReg(CC2500_21_FREND1, 0x56); // front end rx configuration
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CC2500_WriteReg(CC2500_22_FREND0, 0x10); // front end tx configuration
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xA9); // frequency synthesizer calibration
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CC2500_WriteReg(CC2500_24_FSCAL2, 0x0A); // frequency synthesizer calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // frequency synthesizer calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // frequency synthesizer calibration
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CC2500_WriteReg(CC2500_2C_TEST2, 0x88); // various test settings
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CC2500_WriteReg(CC2500_2D_TEST1, 0x31); // various test settings
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CC2500_WriteReg(CC2500_2E_TEST0, 0x0B); // various test settings
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CC2500_WriteReg(CC2500_3E_PATABLE, 0xfe);
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CC2500_SetTxRxMode(RX_EN); // Receive mode
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_Strobe(CC2500_SRX);*/
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CC2500_WriteReg(0x30, 0x3D); // software reset
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CC2500_WriteReg(CC2500_0B_FSCTRL1, 0x0F); // Frequency Synthesizer Control (0x0F)
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CC2500_WriteReg(CC2500_08_PKTCTRL0, 0x12); // Packet Automation Control (0x12)
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CC2500_WriteReg(CC2500_0D_FREQ2, 0x5C); // Frequency control word, high byte
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CC2500_WriteReg(CC2500_0E_FREQ1, 0x4E); // Frequency control word, middle byte
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CC2500_WriteReg(CC2500_0F_FREQ0, 0xDE); // Frequency control word, low byte
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CC2500_WriteReg(CC2500_10_MDMCFG4, 0x0D); // Modem Configuration
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CC2500_WriteReg(CC2500_11_MDMCFG3, 0x3B); // Modem Configuration (0x3B)
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CC2500_WriteReg(CC2500_12_MDMCFG2, 0x00); // Modem Configuration 0x30 - OOK modulation, 0x00 - FSK modulation (better sensitivity)
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CC2500_WriteReg(CC2500_13_MDMCFG1, 0x23); // Modem Configuration
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CC2500_WriteReg(CC2500_14_MDMCFG0, 0xFF); // Modem Configuration (0xFF)
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CC2500_WriteReg(CC2500_17_MCSM1, 0x0F); // Always stay in RX mode
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CC2500_WriteReg(CC2500_18_MCSM0, 0x08); // Main Radio Control State Machine Configuration (0x04)
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CC2500_WriteReg(CC2500_19_FOCCFG, 0x15); // Frequency Offset Compensation configuration
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CC2500_WriteReg(CC2500_1B_AGCCTRL2, 0x83); // AGC Control (0x83)
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CC2500_WriteReg(CC2500_1C_AGCCTRL1, 0x00); // AGC Control
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CC2500_WriteReg(CC2500_1D_AGCCTRL0, 0x91); // AGC Control
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CC2500_WriteReg(CC2500_23_FSCAL3, 0xEA); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_24_FSCAL2, 0x0A); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_25_FSCAL1, 0x00); // Frequency Synthesizer Calibration
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CC2500_WriteReg(CC2500_26_FSCAL0, 0x11); // Frequency Synthesizer Calibration
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CC2500_SetTxRxMode(RX_EN);
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delayMicroseconds(1000); // wait for RX to activate
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}
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static void __attribute__((unused)) _calibrate()
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{
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for (int c = 0; c < MAX_RADIOCHANNEL; c++) {
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_WriteReg(CC2500_0A_CHANNR, c);
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CC2500_Strobe(CC2500_SCAL);
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delayMicroseconds(900);
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calibration[c] = CC2500_ReadReg(CC2500_25_FSCAL1);
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}
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calibration_fscal3 = CC2500_ReadReg(CC2500_23_FSCAL3); // only needs to be done once
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calibration_fscal2 = CC2500_ReadReg(CC2500_24_FSCAL2); // only needs to be done once
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CC2500_Strobe(CC2500_SIDLE);
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}
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static void __attribute__((unused)) _scan_next()
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{
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CC2500_WriteReg(CC2500_0A_CHANNR, Scanner.chan_min + scan_channel);
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CC2500_WriteReg(CC2500_23_FSCAL3, calibration_fscal3);
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CC2500_WriteReg(CC2500_24_FSCAL2, calibration_fscal2);
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CC2500_WriteReg(CC2500_25_FSCAL1, calibration[scan_channel]);
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//debugln("_scan_next %d", Scanner.chan_min + scan_channel);
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}
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static int __attribute__((unused)) _scan_rssi()
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{
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uint8_t rssi = CC2500_ReadReg(0x40 | CC2500_34_RSSI); // 0.5 db/count, RSSI value read from the RSSI status register is a 2<>s complement number
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2019-09-04 14:58:52 +02:00
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2019-09-04 13:57:07 +02:00
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uint8_t rssi_rel;
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if (rssi >= 128) {
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rssi_rel = rssi - 128; // relative power levels 0-127 (equals -137 to -72 dBm)
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}
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else {
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rssi_rel = rssi + 128; // relativ power levels 128-255 (equals -73 to -10 dBm)
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}
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2019-09-04 14:58:52 +02:00
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debugln("rssi %d", rssi_rel);
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2019-09-04 13:57:07 +02:00
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return rssi_rel;
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}
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uint16 Scanner_callback()
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{
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int rssi_value;
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switch (scan_state) {
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case SCAN_CHANNEL_CHANGE:
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scan_channel++;
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if (scan_channel >= (Scanner.chan_max - Scanner.chan_min + 1))
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scan_channel = 0;
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_scan_next();
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scan_state = SCAN_GET_RSSI;
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return CHANNEL_LOCK_TIME;
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case SCAN_GET_RSSI:
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rssi_value = _scan_rssi();
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scan_state = SCAN_CHANNEL_CHANGE;
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// debugln("%d\t%d", scan_channel, CC2500_ReadReg(CC2500_34_RSSI));
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// send data to TX
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pkt[0] = scan_channel; // scan_channel
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pkt[1] = rssi_value; // Scanner.rssi[scan_channel]; // power
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telemetry_link = 1;
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}
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return AVERAGE_INTVL;
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}
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uint16_t initScanner(void)
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{
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Scanner.chan_min = 1;//MIN_RADIOCHANNEL;
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Scanner.chan_max = 1;//MAX_RADIOCHANNEL;
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scan_averages = 0;
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scan_channel = 0;
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scan_state = SCAN_CHANNEL_CHANGE;
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memset(Scanner.rssi, 0, sizeof(Scanner.rssi)); // clear old rssi values
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CC2500_Reset();
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Scanner_cc2500_init();
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CC2500_SetPower();
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CC2500_Strobe(CC2500_SRX);
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_calibrate();
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CC2500_Strobe(CC2500_SFSTXON);
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delayMicroseconds(800);
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CC2500_Strobe(CC2500_SIDLE);
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CC2500_SetTxRxMode(RX_EN);
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CC2500_Strobe(CC2500_SRX); // Receive mode
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BIND_DONE;
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return 1250;
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}
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#endif
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