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			265 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
		
		
			
		
	
	
			265 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
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								/******************************************************************************
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								 * The MIT License
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								 *
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								 * Copyright (c) 2011, 2012 LeafLabs, LLC.
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								 *
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								 * Permission is hereby granted, free of charge, to any person
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								 * obtaining a copy of this software and associated documentation
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								 * files (the "Software"), to deal in the Software without
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								 * restriction, including without limitation the rights to use, copy,
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								 * modify, merge, publish, distribute, sublicense, and/or sell copies
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								 * of the Software, and to permit persons to whom the Software is
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								 * furnished to do so, subject to the following conditions:
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								 *
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								 * The above copyright notice and this permission notice shall be
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								 * included in all copies or substantial portions of the Software.
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								 *
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								 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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								 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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								 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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								 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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								 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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								 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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								 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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								 * SOFTWARE.
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								*****************************************************************************/
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								/**
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								 * @file libmaple/stm32f2/include/series/gpio.h
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								 * @brief STM32F2 GPIO support.
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								 */
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								#ifndef _LIBMAPLE_STM32F2_GPIO_H_
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								#define _LIBMAPLE_STM32F2_GPIO_H_
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								#ifdef __cplusplus
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								extern "C"{
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								#endif
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								#include <libmaple/libmaple_types.h>
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								/*
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								 * GPIO register maps and devices
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								 */
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								/** GPIO register map type */
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								typedef struct gpio_reg_map {
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								    __io uint32 MODER;          /**< Mode register */
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								    __io uint32 OTYPER;         /**< Output type register */
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								    __io uint32 OSPEEDR;        /**< Output speed register */
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								    __io uint32 PUPDR;          /**< Pull-up/pull-down register */
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								    __io uint32 IDR;            /**< Input data register */
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								    __io uint32 ODR;            /**< Output data register */
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								    __io uint32 BSRR;           /**< Bit set/reset register */
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								    __io uint32 LCKR;           /**< Configuration lock register */
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								    __io uint32 AFRL;           /**< Alternate function low register */
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								    __io uint32 AFRH;           /**< Alternate function high register */
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								} gpio_reg_map;
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								/** GPIO port A register map base pointer */
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								#define GPIOA_BASE                      ((struct gpio_reg_map*)0x40020000)
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								/** GPIO port B register map base pointer */
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								#define GPIOB_BASE                      ((struct gpio_reg_map*)0x40020400)
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								/** GPIO port C register map base pointer */
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								#define GPIOC_BASE                      ((struct gpio_reg_map*)0x40020800)
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								/** GPIO port D register map base pointer */
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								#define GPIOD_BASE                      ((struct gpio_reg_map*)0x40020C00)
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								/** GPIO port E register map base pointer */
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								#define GPIOE_BASE                      ((struct gpio_reg_map*)0x40021000)
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								/** GPIO port F register map base pointer */
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								#define GPIOF_BASE                      ((struct gpio_reg_map*)0x40021400)
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								/** GPIO port G register map base pointer */
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								#define GPIOG_BASE                      ((struct gpio_reg_map*)0x40021800)
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								/** GPIO port H register map base pointer */
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								#define GPIOH_BASE                      ((struct gpio_reg_map*)0x40021C00)
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								/** GPIO port I register map base pointer */
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								#define GPIOI_BASE                      ((struct gpio_reg_map*)0x40022000)
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								struct gpio_dev;
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								extern struct gpio_dev* const GPIOA;
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								extern struct gpio_dev gpioa;
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								extern struct gpio_dev* const GPIOB;
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								extern struct gpio_dev gpiob;
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								extern struct gpio_dev* const GPIOC;
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								extern struct gpio_dev gpioc;
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								extern struct gpio_dev* const GPIOD;
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								extern struct gpio_dev gpiod;
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								extern struct gpio_dev* const GPIOE;
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								extern struct gpio_dev gpioe;
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								extern struct gpio_dev* const GPIOF;
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								extern struct gpio_dev gpiof;
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								extern struct gpio_dev* const GPIOG;
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								extern struct gpio_dev gpiog;
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								extern struct gpio_dev* const GPIOH;
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								extern struct gpio_dev gpioh;
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								extern struct gpio_dev* const GPIOI;
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								extern struct gpio_dev gpioi;
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								/*
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								 * Register bit definitions
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								 *
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								 * Currently, we only provide masks to be used for shifting for some
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								 * registers, rather than repeating the same values 16 times.
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								 */
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								/* Mode register */
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								#define GPIO_MODER_INPUT                0x0
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								#define GPIO_MODER_OUTPUT               0x1
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								#define GPIO_MODER_AF                   0x2
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								#define GPIO_MODER_ANALOG               0x3
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								/* Output type register */
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								#define GPIO_OTYPER_PP                  0x0
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								#define GPIO_OTYPER_OD                  0x1
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								/* Output speed register */
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								#define GPIO_OSPEEDR_LOW                0x0
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								#define GPIO_OSPEEDR_MED                0x1
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								#define GPIO_OSPEEDR_FAST               0x2
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								#define GPIO_OSPEEDR_HIGH               0x3
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								/* Pull-up/pull-down register */
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								#define GPIO_PUPDR_NOPUPD               0x0
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								#define GPIO_PUPDR_PU                   0x1
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								#define GPIO_PUPDR_PD                   0x2
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								/* Alternate function register low */
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								#define GPIO_AFRL_AF0                   (0xFU << 0)
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								#define GPIO_AFRL_AF1                   (0xFU << 4)
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								#define GPIO_AFRL_AF2                   (0xFU << 8)
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								#define GPIO_AFRL_AF3                   (0xFU << 12)
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								#define GPIO_AFRL_AF4                   (0xFU << 16)
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								#define GPIO_AFRL_AF5                   (0xFU << 20)
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								#define GPIO_AFRL_AF6                   (0xFU << 24)
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								#define GPIO_AFRL_AF7                   (0xFU << 28)
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								/* Alternate function register high */
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								#define GPIO_AFRH_AF8                   (0xFU << 0)
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								#define GPIO_AFRH_AF9                   (0xFU << 4)
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								#define GPIO_AFRH_AF10                  (0xFU << 8)
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								#define GPIO_AFRH_AF11                  (0xFU << 12)
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								#define GPIO_AFRH_AF12                  (0xFU << 16)
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								#define GPIO_AFRH_AF13                  (0xFU << 20)
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								#define GPIO_AFRH_AF14                  (0xFU << 24)
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								#define GPIO_AFRH_AF15                  (0xFU << 28)
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								/*
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								 * GPIO routines
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								 */
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								/**
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								 * @brief GPIO pin modes
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								 */
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								typedef enum gpio_pin_mode {
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								    GPIO_MODE_INPUT  = GPIO_MODER_INPUT,  /**< Input mode */
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								    GPIO_MODE_OUTPUT = GPIO_MODER_OUTPUT, /**< Output mode */
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								    GPIO_MODE_AF     = GPIO_MODER_AF,     /**< Alternate function mode */
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								    GPIO_MODE_ANALOG = GPIO_MODER_ANALOG, /**< Analog mode */
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								} gpio_pin_mode;
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								/**
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								 * @brief Additional flags to be used when setting a pin's mode.
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								 *
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								 * Beyond the basic modes (input, general purpose output, alternate
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								 * function, and analog), there are three parameters that can affect a
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								 * pin's mode:
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								 *
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								 * 1. Output type: push/pull or open-drain. This only has an effect
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								 *    for output modes. Choices are: GPIO_MODEF_TYPE_PP (the default)
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								 *    and GPIO_MODEF_TYPE_OD.
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								 *
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								 * 2. Output speed: specifies the frequency at which a pin changes
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								 *    state. This only has an effect for output modes. Choices are:
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								 *    GPIO_MODEF_SPEED_LOW (default), GPIO_MODEF_SPEED_MED,
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								 *    GPIO_MODEF_SPEED_FAST, and GPIO_MODEF_SPEED_HIGH.
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								 *
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								 * 3. Push/pull setting: All GPIO pins have weak pull-up and pull-down
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								 *    resistors that can be enabled when the pin's mode is
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								 *    set. Choices are: GPIO_MODEF_PUPD_NONE (default),
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								 *    GPIO_MODEF_PUPD_PU, and GPIO_MODEF_PUPD_PD.
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								 */
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								typedef enum gpio_mode_flags {
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								    /* Output type in bit 0 */
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								    GPIO_MODEF_TYPE_PP = GPIO_OTYPER_PP, /**< Output push/pull (default).
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								                                            Applies only when the mode
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								                                            specifies output. */
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								    GPIO_MODEF_TYPE_OD = GPIO_OTYPER_OD, /**< Output open drain.
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								                                            Applies only when the mode
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								                                            specifies output. */
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								    /* Speed in bits 2:1 */
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								    GPIO_MODEF_SPEED_LOW = GPIO_OSPEEDR_LOW << 1, /**< Low speed (default):
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								                                                     2 MHz. */
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								    GPIO_MODEF_SPEED_MED = GPIO_OSPEEDR_MED << 1, /**< Medium speed: 25 MHz. */
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								    GPIO_MODEF_SPEED_FAST = GPIO_OSPEEDR_FAST << 1, /**< Fast speed: 50 MHz. */
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								    GPIO_MODEF_SPEED_HIGH = GPIO_OSPEEDR_HIGH << 1, /**< High speed:
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								                                                       100 MHz on 30 pF,
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								                                                       80 MHz on 15 pF. */
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								    /* Pull-up/pull-down in bits 4:3 */
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								    GPIO_MODEF_PUPD_NONE = GPIO_PUPDR_NOPUPD << 3, /**< No pull-up/pull-down
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								                                                      (default). */
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								    GPIO_MODEF_PUPD_PU = GPIO_PUPDR_PU << 3, /**< Pull-up */
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								    GPIO_MODEF_PUPD_PD = GPIO_PUPDR_PD << 3, /**< Pull-down */
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								} gpio_mode_flags;
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								void gpio_set_modef(struct gpio_dev *dev,
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								                    uint8 bit,
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								                    gpio_pin_mode mode,
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								                    unsigned flags);
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								/**
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								 * @brief Set the mode of a GPIO pin.
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								 *
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								 * Calling this function is equivalent to calling gpio_set_modef(dev,
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								 * pin, mode, GPIO_MODE_SPEED_HIGH). Note that this overrides the
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								 * default speed.
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								 *
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								 * @param dev GPIO device.
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								 * @param bit Bit on the device whose mode to set, 0--15.
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								 * @param mode Mode to set the pin to.
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								 */
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								static inline void gpio_set_mode(struct gpio_dev *dev,
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								                                 uint8 bit,
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								                                 gpio_pin_mode mode) {
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								    gpio_set_modef(dev, bit, mode, GPIO_MODEF_SPEED_HIGH);
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								}
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								/**
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								 * @brief GPIO alternate functions.
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								 * Use these to select an alternate function for a pin.
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								 * @see gpio_set_af()
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								 */
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								typedef enum gpio_af {
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								    GPIO_AF_SYS                  = 0, /**< System. */
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								    GPIO_AF_TIM_1_2              = 1, /**< Timers 1 and 2. */
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						||
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								    GPIO_AF_TIM_3_4_5            = 2, /**< Timers 3, 4, and 5. */
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						||
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								 | 
							
								    GPIO_AF_TIM_8_9_10_11        = 3, /**< Timers 8 through 11. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_I2C                  = 4, /**< I2C 1, 2, and 3. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_SPI_1_2              = 5, /**< SPI1, SPI2/I2S2. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_SPI3                 = 6, /**< SPI3/I2S3. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_USART_1_2_3          = 7, /**< USART 1, 2, and 3. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_USART_4_5_6          = 8, /**< UART 4 and 5, USART 6. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_CAN_1_2_TIM_12_13_14 = 9, /**<
							 | 
						||
| 
								 | 
							
								                                       * CAN 1 and 2, timers 12, 13, and 14. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_USB_OTG_FS_HS        = 10, /**< USB OTG HS and FS. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_ETH                  = 11, /**< Ethernet MII and RMII. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_FSMC_SDIO_OTG_FS     = 12, /**< FSMC, SDIO, and USB OTG FS. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_DCMI                 = 13, /**< DCMI. */
							 | 
						||
| 
								 | 
							
								    GPIO_AF_EVENTOUT             = 15, /**< EVENTOUT. */
							 | 
						||
| 
								 | 
							
								} gpio_af;
							 | 
						||
| 
								 | 
							
								
							 | 
						||
| 
								 | 
							
								void gpio_set_af(struct gpio_dev *dev, uint8 bit, gpio_af af);
							 | 
						||
| 
								 | 
							
								
							 | 
						||
| 
								 | 
							
								#ifdef __cplusplus
							 | 
						||
| 
								 | 
							
								}
							 | 
						||
| 
								 | 
							
								#endif
							 | 
						||
| 
								 | 
							
								
							 | 
						||
| 
								 | 
							
								#endif
							 |